100 	u32 val, divff, divfi, divq;  in clk_pll_recalc_rate()  local
108 	divfi = FIELD_GET(PLL_INT_DIV_MASK, val);  in clk_pll_recalc_rate()
115 	rate = parent_rate * 8 * (divfi + 1);  in clk_pll_recalc_rate()
126 	u32 divff, divfi;  in clk_pll_round_rate()  local
133 	divfi = temp64;  in clk_pll_round_rate()
134 	temp64 = rate - divfi * parent_rate;  in clk_pll_round_rate()
143 	rate = parent_rate * divfi + temp64;  in clk_pll_round_rate()
159 	u32 val, divfi, divff;  in clk_pll_set_rate()  local
165 	divfi = rate / parent_rate;  in clk_pll_set_rate()
166 	temp64 = parent_rate * divfi;  in clk_pll_set_rate()
174 	val |= (divff << 7) | (divfi - 1);  in clk_pll_set_rate()