Lines Matching +full:reg +full:- +full:mux

1 // SPDX-License-Identifier: GPL-2.0+
8 #include <linux/clk-provider.h>
33 static int imx93_clk_composite_wait_ready(struct clk_hw *hw, void __iomem *reg)
38 	ret = readl_poll_timeout_atomic(reg + STAT_OFFSET, val, !(val & BIT(CCM_BUSY_SHIFT)),
50 	u32 reg;
52 	if (gate->lock)
53 		spin_lock_irqsave(gate->lock, flags);
55 	reg = readl(gate->reg);
58 		reg &= ~BIT(gate->bit_idx);
60 		reg |= BIT(gate->bit_idx);
62 	writel(reg, gate->reg);
64 	imx93_clk_composite_wait_ready(hw, gate->reg);
66 	if (gate->lock)
67 		spin_unlock_irqrestore(gate->lock, flags);
116 	value = divider_get_val(rate, parent_rate, divider->table, divider->width, divider->flags);
120 	if (divider->lock)
121 		spin_lock_irqsave(divider->lock, flags);
123 	val = readl(divider->reg);
124 	val &= ~(clk_div_mask(divider->width) << divider->shift);
125 	val |= (u32)value << divider->shift;
126 	writel(val, divider->reg);
128 	ret = imx93_clk_composite_wait_ready(hw, divider->reg);
130 	if (divider->lock)
131 		spin_unlock_irqrestore(divider->lock, flags);
149 	struct clk_mux *mux = to_clk_mux(hw);
150 	u32 val = clk_mux_index_to_val(mux->table, mux->flags, index);
152 	u32 reg;
155 	if (mux->lock)
156 		spin_lock_irqsave(mux->lock, flags);
158 	reg = readl(mux->reg);
159 	reg &= ~(mux->mask << mux->shift);
160 	val = val << mux->shift;
161 	reg |= val;
162 	writel(reg, mux->reg);
164 	ret = imx93_clk_composite_wait_ready(hw, mux->reg);
166 	if (mux->lock)
167 		spin_unlock_irqrestore(mux->lock, flags);
185 					 int num_parents, void __iomem *reg, u32 domain_id,
188 	struct clk_hw *hw = ERR_PTR(-ENOMEM), *mux_hw;
192 	struct clk_mux *mux = NULL;
196 	mux = kzalloc(sizeof(*mux), GFP_KERNEL);
197 	if (!mux)
200 	mux_hw = &mux->hw;
201 	mux->reg = reg;
202 	mux->shift = CCM_MUX_SHIFT;
203 	mux->mask = CCM_MUX_MASK;
204 	mux->lock = &imx_ccm_lock;
210 	div_hw = &div->hw;
211 	div->reg = reg;
212 	div->shift = CCM_DIV_SHIFT;
213 	div->width = CCM_DIV_WIDTH;
214 	div->lock = &imx_ccm_lock;
215 	div->flags = CLK_DIVIDER_ROUND_CLOSEST;
217 	authen = readl(reg + AUTHEN_OFFSET);
230 		gate_hw = &gate->hw;
231 		gate->reg = reg;
232 		gate->bit_idx = CCM_OFF_SHIFT;
233 		gate->lock = &imx_ccm_lock;
234 		gate->flags = CLK_GATE_SET_TO_DISABLE;
251 	kfree(mux);