Lines Matching +full:clk +full:- +full:phase +full:-

1 // SPDX-License-Identifier: GPL-2.0
5 * Simple HiSilicon phase clock implementation.
14 #include "clk.h"
30 static int hisi_phase_regval_to_degrees(struct clk_hisi_phase *phase, in hisi_phase_regval_to_degrees() argument
35 for (i = 0; i < phase->phase_num; i++) in hisi_phase_regval_to_degrees()
36 if (phase->phase_regvals[i] == regval) in hisi_phase_regval_to_degrees()
37 return phase->phase_degrees[i]; in hisi_phase_regval_to_degrees()
39 return -EINVAL; in hisi_phase_regval_to_degrees()
44 struct clk_hisi_phase *phase = to_clk_hisi_phase(hw); in hisi_clk_get_phase() local
47 regval = readl(phase->reg); in hisi_clk_get_phase()
48 regval = (regval & phase->mask) >> phase->shift; in hisi_clk_get_phase()
50 return hisi_phase_regval_to_degrees(phase, regval); in hisi_clk_get_phase()
53 static int hisi_phase_degrees_to_regval(struct clk_hisi_phase *phase, in hisi_phase_degrees_to_regval() argument
58 for (i = 0; i < phase->phase_num; i++) in hisi_phase_degrees_to_regval()
59 if (phase->phase_degrees[i] == degrees) in hisi_phase_degrees_to_regval()
60 return phase->phase_regvals[i]; in hisi_phase_degrees_to_regval()
62 return -EINVAL; in hisi_phase_degrees_to_regval()
67 struct clk_hisi_phase *phase = to_clk_hisi_phase(hw); in hisi_clk_set_phase() local
72 regval = hisi_phase_degrees_to_regval(phase, degrees); in hisi_clk_set_phase()
76 spin_lock_irqsave(phase->lock, flags); in hisi_clk_set_phase()
78 val = readl(phase->reg); in hisi_clk_set_phase()
79 val &= ~phase->mask; in hisi_clk_set_phase()
80 val |= regval << phase->shift; in hisi_clk_set_phase()
81 writel(val, phase->reg); in hisi_clk_set_phase()
83 spin_unlock_irqrestore(phase->lock, flags); in hisi_clk_set_phase()
93 struct clk *clk_register_hisi_phase(struct device *dev, in clk_register_hisi_phase()
97 struct clk_hisi_phase *phase; in clk_register_hisi_phase() local
100 phase = devm_kzalloc(dev, sizeof(struct clk_hisi_phase), GFP_KERNEL); in clk_register_hisi_phase()
101 if (!phase) in clk_register_hisi_phase()
102 return ERR_PTR(-ENOMEM); in clk_register_hisi_phase()
104 init.name = clks->name; in clk_register_hisi_phase()
106 init.flags = clks->flags; in clk_register_hisi_phase()
107 init.parent_names = clks->parent_names ? &clks->parent_names : NULL; in clk_register_hisi_phase()
108 init.num_parents = clks->parent_names ? 1 : 0; in clk_register_hisi_phase()
110 phase->reg = base + clks->offset; in clk_register_hisi_phase()
111 phase->shift = clks->shift; in clk_register_hisi_phase()
112 phase->mask = (BIT(clks->width) - 1) << clks->shift; in clk_register_hisi_phase()
113 phase->lock = lock; in clk_register_hisi_phase()
114 phase->phase_degrees = clks->phase_degrees; in clk_register_hisi_phase()
115 phase->phase_regvals = clks->phase_regvals; in clk_register_hisi_phase()
116 phase->phase_num = clks->phase_num; in clk_register_hisi_phase()
117 phase->hw.init = &init; in clk_register_hisi_phase()
119 return devm_clk_register(dev, &phase->hw); in clk_register_hisi_phase()