1 // SPDX-License-Identifier: GPL-2.0
8 #include <linux/clk-provider.h>
39 /* Max freq depends on speed grade */
45 /* VCO range is 10.8 .. 12.1 GHz, max depends on speed grade */
68  * struct clk_si544_muldiv - Multiplier/divider settings
73  *                      If ls_div_bits is non-zero, hs_div must be even
74  * @delta_m:		Frequency shift for small -950..+950 ppm changes, 24 bit
87 	return regmap_update_bits(data->regmap, SI544_REG_OE_STATE,  in si544_enable_output()
111 	err = regmap_read(data->regmap, SI544_REG_OE_STATE, &val);  in si544_is_prepared()
125 	err = regmap_bulk_read(data->regmap, SI544_REG_HS_DIV, reg, 2);  in si544_get_muldiv()
129 	settings->ls_div_bits = (reg[1] >> 4) & 0x07;  in si544_get_muldiv()
130 	settings->hs_div = (reg[1] & 0x07) << 8 | reg[0];  in si544_get_muldiv()
132 	err = regmap_bulk_read(data->regmap, SI544_REG_FBDIV0, reg, 6);  in si544_get_muldiv()
136 	settings->fb_div_int = reg[4] | (reg[5] & 0x07) << 8;  in si544_get_muldiv()
137 	settings->fb_div_frac = reg[0] | reg[1] << 8 | reg[2] << 16 |  in si544_get_muldiv()
140 	err = regmap_bulk_read(data->regmap, SI544_REG_ADPLL_DELTA_M0, reg, 3);  in si544_get_muldiv()
144 	/* Interpret as 24-bit signed number */  in si544_get_muldiv()
145 	settings->delta_m = reg[0] << 8 | reg[1] << 16 | reg[2] << 24;  in si544_get_muldiv()
146 	settings->delta_m >>= 8;  in si544_get_muldiv()
159 	return regmap_bulk_write(data->regmap, SI544_REG_ADPLL_DELTA_M0,  in si544_set_delta_m()
169 	reg[0] = settings->hs_div;  in si544_set_muldiv()
170 	reg[1] = settings->hs_div >> 8 | settings->ls_div_bits << 4;  in si544_set_muldiv()
172 	err = regmap_bulk_write(data->regmap, SI544_REG_HS_DIV, reg, 2);  in si544_set_muldiv()
176 	reg[0] = settings->fb_div_frac;  in si544_set_muldiv()
177 	reg[1] = settings->fb_div_frac >> 8;  in si544_set_muldiv()
178 	reg[2] = settings->fb_div_frac >> 16;  in si544_set_muldiv()
179 	reg[3] = settings->fb_div_frac >> 24;  in si544_set_muldiv()
180 	reg[4] = settings->fb_div_int;  in si544_set_muldiv()
181 	reg[5] = settings->fb_div_int >> 8;  in si544_set_muldiv()
187 	return regmap_bulk_write(data->regmap, SI544_REG_FBDIV0, reg, 6);  in si544_set_muldiv()
196 	return frequency <= data->max_freq;  in is_valid_frequency()
210 	settings->ls_div_bits = 0;  in si544_calc_muldiv()
213 		settings->ls_div_bits = 0;  in si544_calc_muldiv()
223 		settings->ls_div_bits = res;  in si544_calc_muldiv()
228 	vco = FVCO_MIN + ls_freq - 1;  in si544_calc_muldiv()
230 	settings->hs_div = vco;  in si544_calc_muldiv()
233 	if ((settings->hs_div & 1) &&  in si544_calc_muldiv()
234 	    (settings->hs_div > HS_DIV_MAX_ODD || settings->ls_div_bits))  in si544_calc_muldiv()
235 		++settings->hs_div;  in si544_calc_muldiv()
238 	vco = (u64)ls_freq * settings->hs_div;  in si544_calc_muldiv()
242 	settings->fb_div_int = vco;  in si544_calc_muldiv()
248 	settings->fb_div_frac = vco;  in si544_calc_muldiv()
251 	settings->delta_m = 0;  in si544_calc_muldiv()
260 	u32 d = settings->hs_div * BIT(settings->ls_div_bits);  in si544_calc_center_rate()
264 	vco = (u64)settings->fb_div_frac * FXO;  in si544_calc_center_rate()
269 	vco += (u64)settings->fb_div_int * FXO;  in si544_calc_center_rate()
280 	s64 delta = (s64)rate * (DELTA_M_FRAC_NUM * settings->delta_m);  in si544_calc_rate()
287 	if (settings->delta_m < 0)  in si544_calc_rate()
288 		delta -= ((s64)DELTA_M_MAX * DELTA_M_FRAC_DEN) / 2;  in si544_calc_rate()
316 		return -EINVAL;  in si544_round_rate()
352 		return -EINVAL;  in si544_set_rate()
361 	delta = rate - center;  in si544_set_rate()
372 	err = regmap_read(data->regmap, SI544_REG_OE_STATE, &old_oe_state);  in si544_set_rate()
379 	err = regmap_write(data->regmap, SI544_REG_FCAL_OVR, 0);  in si544_set_rate()
392 	err = regmap_write(data->regmap, SI544_REG_CONTROL,  in si544_set_rate()
440 	data = devm_kzalloc(&client->dev, sizeof(*data), GFP_KERNEL);  in si544_probe()
442 		return -ENOMEM;  in si544_probe()
447 	data->hw.init = &init;  in si544_probe()
448 	data->i2c_client = client;  in si544_probe()
449 	data->max_freq = (uintptr_t)i2c_get_match_data(client);  in si544_probe()
451 	if (of_property_read_string(client->dev.of_node, "clock-output-names",  in si544_probe()
453 		init.name = client->dev.of_node->name;  in si544_probe()
455 	data->regmap = devm_regmap_init_i2c(client, &si544_regmap_config);  in si544_probe()
456 	if (IS_ERR(data->regmap))  in si544_probe()
457 		return PTR_ERR(data->regmap);  in si544_probe()
462 	err = regmap_write(data->regmap, SI544_REG_PAGE_SELECT, 0);  in si544_probe()
466 	err = devm_clk_hw_register(&client->dev, &data->hw);  in si544_probe()
468 		dev_err(&client->dev, "clock registration failed\n");  in si544_probe()
471 	err = devm_of_clk_add_hw_provider(&client->dev, of_clk_hw_simple_get,  in si544_probe()
472 					  &data->hw);  in si544_probe()
474 		dev_err(&client->dev, "unable to add clk provider\n");  in si544_probe()