Lines Matching +full:max +full:- +full:clk +full:- +full:rate +full:- +full:hz
1 // SPDX-License-Identifier: GPL-2.0
8 #include <linux/clk-provider.h>
39 /* Max freq depends on speed grade */
45 /* VCO range is 10.8 .. 12.1 GHz, max depends on speed grade */
68 * struct clk_si544_muldiv - Multiplier/divider settings
73 * If ls_div_bits is non-zero, hs_div must be even
74 * @delta_m: Frequency shift for small -950..+950 ppm changes, 24 bit
87 return regmap_update_bits(data->regmap, SI544_REG_OE_STATE,
111 err = regmap_read(data->regmap, SI544_REG_OE_STATE, &val);
125 err = regmap_bulk_read(data->regmap, SI544_REG_HS_DIV, reg, 2);
129 settings->ls_div_bits = (reg[1] >> 4) & 0x07;
130 settings->hs_div = (reg[1] & 0x07) << 8 | reg[0];
132 err = regmap_bulk_read(data->regmap, SI544_REG_FBDIV0, reg, 6);
136 settings->fb_div_int = reg[4] | (reg[5] & 0x07) << 8;
137 settings->fb_div_frac = reg[0] | reg[1] << 8 | reg[2] << 16 |
140 err = regmap_bulk_read(data->regmap, SI544_REG_ADPLL_DELTA_M0, reg, 3);
144 /* Interpret as 24-bit signed number */
145 settings->delta_m = reg[0] << 8 | reg[1] << 16 | reg[2] << 24;
146 settings->delta_m >>= 8;
159 return regmap_bulk_write(data->regmap, SI544_REG_ADPLL_DELTA_M0,
169 reg[0] = settings->hs_div;
170 reg[1] = settings->hs_div >> 8 | settings->ls_div_bits << 4;
172 err = regmap_bulk_write(data->regmap, SI544_REG_HS_DIV, reg, 2);
176 reg[0] = settings->fb_div_frac;
177 reg[1] = settings->fb_div_frac >> 8;
178 reg[2] = settings->fb_div_frac >> 16;
179 reg[3] = settings->fb_div_frac >> 24;
180 reg[4] = settings->fb_div_int;
181 reg[5] = settings->fb_div_int >> 8;
187 return regmap_bulk_write(data->regmap, SI544_REG_FBDIV0, reg, 6);
196 return frequency <= data->max_freq;
210 settings->ls_div_bits = 0;
213 settings->ls_div_bits = 0;
223 settings->ls_div_bits = res;
228 vco = FVCO_MIN + ls_freq - 1;
230 settings->hs_div = vco;
233 if ((settings->hs_div & 1) &&
234 (settings->hs_div > HS_DIV_MAX_ODD || settings->ls_div_bits))
235 ++settings->hs_div;
238 vco = (u64)ls_freq * settings->hs_div;
242 settings->fb_div_int = vco;
248 settings->fb_div_frac = vco;
251 settings->delta_m = 0;
260 u32 d = settings->hs_div * BIT(settings->ls_div_bits);
264 vco = (u64)settings->fb_div_frac * FXO;
269 vco += (u64)settings->fb_div_int * FXO;
279 unsigned long rate = si544_calc_center_rate(settings);
280 s64 delta = (s64)rate * (DELTA_M_FRAC_NUM * settings->delta_m);
283 * The clock adjustment is much smaller than 1 Hz, round to the
287 if (settings->delta_m < 0)
288 delta -= ((s64)DELTA_M_MAX * DELTA_M_FRAC_DEN) / 2;
293 return rate + delta;
310 static long si544_round_rate(struct clk_hw *hw, unsigned long rate,
315 if (!is_valid_frequency(data, rate))
316 return -EINVAL;
318 /* The accuracy is less than 1 Hz, so any rate is possible */
319 return rate;
322 /* Calculates the maximum "small" change, 950 * rate / 1000000 */
323 static unsigned long si544_max_delta(unsigned long rate)
325 u64 num = rate;
340 static int si544_set_rate(struct clk_hw *hw, unsigned long rate,
351 if (!is_valid_frequency(data, rate))
352 return -EINVAL;
361 delta = rate - center;
368 err = si544_calc_muldiv(&settings, rate);
372 err = regmap_read(data->regmap, SI544_REG_OE_STATE, &old_oe_state);
379 err = regmap_write(data->regmap, SI544_REG_FCAL_OVR, 0);
392 err = regmap_write(data->regmap, SI544_REG_CONTROL,
440 data = devm_kzalloc(&client->dev, sizeof(*data), GFP_KERNEL);
442 return -ENOMEM;
447 data->hw.init = &init;
448 data->i2c_client = client;
449 data->max_freq = (uintptr_t)i2c_get_match_data(client);
451 if (of_property_read_string(client->dev.of_node, "clock-output-names",
453 init.name = client->dev.of_node->name;
455 data->regmap = devm_regmap_init_i2c(client, &si544_regmap_config);
456 if (IS_ERR(data->regmap))
457 return PTR_ERR(data->regmap);
462 err = regmap_write(data->regmap, SI544_REG_PAGE_SELECT, 0);
466 err = devm_clk_hw_register(&client->dev, &data->hw);
468 dev_err(&client->dev, "clock registration failed\n");
471 err = devm_of_clk_add_hw_provider(&client->dev, of_clk_hw_simple_get,
472 &data->hw);
474 dev_err(&client->dev, "unable to add clk provider\n");