Lines Matching +full:ti +full:- +full:nspire

1 // SPDX-License-Identifier: GPL-2.0-only
7 #include <linux/clk-provider.h>
44 		clk->base_clock = 48 * MHZ;  in nspire_clkinfo_cx()
46 		clk->base_clock = 6 * EXTRACT(val, CX_BASE) * MHZ;  in nspire_clkinfo_cx()
48 	clk->base_cpu_ratio = EXTRACT(val, BASE_CPU) * EXTRACT(val, CX_UNKNOWN);  in nspire_clkinfo_cx()
49 	clk->base_ahb_ratio = clk->base_cpu_ratio * (EXTRACT(val, CPU_AHB) + 1);  in nspire_clkinfo_cx()
55 		clk->base_clock = 27 * MHZ;  in nspire_clkinfo_classic()
57 		clk->base_clock = (300 - 6 * EXTRACT(val, CLASSIC_BASE)) * MHZ;  in nspire_clkinfo_classic()
59 	clk->base_cpu_ratio = EXTRACT(val, BASE_CPU) * 2;  in nspire_clkinfo_classic()
60 	clk->base_ahb_ratio = clk->base_cpu_ratio * (EXTRACT(val, CPU_AHB) + 1);  in nspire_clkinfo_classic()
69 	const char *clk_name = node->name;  in nspire_ahbdiv_setup()
81 	of_property_read_string(node, "clock-output-names", &clk_name);  in nspire_ahbdiv_setup()
100 CLK_OF_DECLARE(nspire_ahbdiv_cx, "lsi,nspire-cx-ahb-divider",
102 CLK_OF_DECLARE(nspire_ahbdiv_classic, "lsi,nspire-classic-ahb-divider",
111 	const char *clk_name = node->name;  in nspire_clk_setup()
122 	of_property_read_string(node, "clock-output-names", &clk_name);  in nspire_clk_setup()
131 	pr_info("TI-NSPIRE Base: %uMHz CPU: %uMHz AHB: %uMHz\n",  in nspire_clk_setup()
147 CLK_OF_DECLARE(nspire_clk_cx, "lsi,nspire-cx-clock", nspire_clk_setup_cx);
148 CLK_OF_DECLARE(nspire_clk_classic, "lsi,nspire-classic-clock",