Lines Matching +full:clkout +full:- +full:clock
1 // SPDX-License-Identifier: GPL-2.0
3 * Lochnagar clock control
5 * Copyright (c) 2017-2018 Cirrus Logic, Inc. and
11 #include <linux/clk-provider.h>
22 #include <dt-bindings/clock/lochnagar.h>
49 LN_PARENT("ln-none"),
50 LN_PARENT("ln-spdif-mclk"),
51 LN_PARENT("ln-psia1-mclk"),
52 LN_PARENT("ln-psia2-mclk"),
53 LN_PARENT("ln-cdc-clkout"),
54 LN_PARENT("ln-dsp-clkout"),
55 LN_PARENT("ln-pmic-32k"),
56 LN_PARENT("ln-gf-mclk1"),
57 LN_PARENT("ln-gf-mclk3"),
58 LN_PARENT("ln-gf-mclk2"),
59 LN_PARENT("ln-gf-mclk4"),
63 LN_PARENT("ln-none"),
64 LN_PARENT("ln-cdc-clkout"),
65 LN_PARENT("ln-dsp-clkout"),
66 LN_PARENT("ln-pmic-32k"),
67 LN_PARENT("ln-spdif-mclk"),
68 LN_PARENT("ln-clk-12m"),
69 LN_PARENT("ln-clk-11m"),
70 LN_PARENT("ln-clk-24m"),
71 LN_PARENT("ln-clk-22m"),
72 LN_PARENT("ln-clk-8m"),
73 LN_PARENT("ln-usb-clk-24m"),
74 LN_PARENT("ln-gf-mclk1"),
75 LN_PARENT("ln-gf-mclk3"),
76 LN_PARENT("ln-gf-mclk2"),
77 LN_PARENT("ln-psia1-mclk"),
78 LN_PARENT("ln-psia2-mclk"),
79 LN_PARENT("ln-spdif-clkout"),
80 LN_PARENT("ln-adat-mclk"),
81 LN_PARENT("ln-usb-clk-12m"),
103 LN1_CLK(CDC_MCLK1, "ln-cdc-mclk1", CDC_AIF_CTRL2),
104 LN1_CLK(CDC_MCLK2, "ln-cdc-mclk2", CDC_AIF_CTRL2),
105 LN1_CLK(DSP_CLKIN, "ln-dsp-clkin", DSP_AIF),
106 LN1_CLK(GF_CLKOUT1, "ln-gf-clkout1", GF_AIF1),
110 LN2_CLK(CDC_MCLK1, "ln-cdc-mclk1"),
111 LN2_CLK(CDC_MCLK2, "ln-cdc-mclk2"),
112 LN2_CLK(DSP_CLKIN, "ln-dsp-clkin"),
113 LN2_CLK(GF_CLKOUT1, "ln-gf-clkout1"),
114 LN2_CLK(GF_CLKOUT2, "ln-gf-clkout2"),
115 LN2_CLK(PSIA1_MCLK, "ln-psia1-mclk"),
116 LN2_CLK(PSIA2_MCLK, "ln-psia2-mclk"),
117 LN2_CLK(SPDIF_MCLK, "ln-spdif-mclk"),
118 LN2_CLK(ADAT_MCLK, "ln-adat-mclk"),
119 LN2_CLK(SOUNDCARD_MCLK, "ln-soundcard-mclk"),
148 struct lochnagar_clk_priv *priv = lclk->priv; in lochnagar_clk_prepare()
149 struct regmap *regmap = priv->regmap; in lochnagar_clk_prepare()
152 ret = regmap_update_bits(regmap, lclk->cfg_reg, in lochnagar_clk_prepare()
153 lclk->ena_mask, lclk->ena_mask); in lochnagar_clk_prepare()
155 dev_dbg(priv->dev, "Failed to prepare %s: %d\n", in lochnagar_clk_prepare()
156 lclk->name, ret); in lochnagar_clk_prepare()
164 struct lochnagar_clk_priv *priv = lclk->priv; in lochnagar_clk_unprepare()
165 struct regmap *regmap = priv->regmap; in lochnagar_clk_unprepare()
168 ret = regmap_update_bits(regmap, lclk->cfg_reg, lclk->ena_mask, 0); in lochnagar_clk_unprepare()
170 dev_dbg(priv->dev, "Failed to unprepare %s: %d\n", in lochnagar_clk_unprepare()
171 lclk->name, ret); in lochnagar_clk_unprepare()
177 struct lochnagar_clk_priv *priv = lclk->priv; in lochnagar_clk_set_parent()
178 struct regmap *regmap = priv->regmap; in lochnagar_clk_set_parent()
181 ret = regmap_update_bits(regmap, lclk->src_reg, lclk->src_mask, index); in lochnagar_clk_set_parent()
183 dev_dbg(priv->dev, "Failed to reparent %s: %d\n", in lochnagar_clk_set_parent()
184 lclk->name, ret); in lochnagar_clk_set_parent()
192 struct lochnagar_clk_priv *priv = lclk->priv; in lochnagar_clk_get_parent()
193 struct regmap *regmap = priv->regmap; in lochnagar_clk_get_parent()
197 ret = regmap_read(regmap, lclk->src_reg, &val); in lochnagar_clk_get_parent()
199 dev_dbg(priv->dev, "Failed to read parent of %s: %d\n", in lochnagar_clk_get_parent()
200 lclk->name, ret); in lochnagar_clk_get_parent()
204 val &= lclk->src_mask; in lochnagar_clk_get_parent()
221 unsigned int idx = clkspec->args[0]; in lochnagar_of_clk_hw_get()
223 if (idx >= ARRAY_SIZE(priv->lclks)) { in lochnagar_of_clk_hw_get()
224 dev_err(priv->dev, "Invalid index %u\n", idx); in lochnagar_of_clk_hw_get()
225 return ERR_PTR(-EINVAL); in lochnagar_of_clk_hw_get()
228 return &priv->lclks[idx].hw; in lochnagar_of_clk_hw_get()
232 { .compatible = "cirrus,lochnagar1-clk", .data = &lochnagar1_conf },
233 { .compatible = "cirrus,lochnagar2-clk", .data = &lochnagar2_conf },
243 struct device *dev = &pdev->dev; in lochnagar_clk_probe()
251 return -ENOMEM; in lochnagar_clk_probe()
253 priv->dev = dev; in lochnagar_clk_probe()
254 priv->regmap = dev_get_regmap(dev->parent, NULL); in lochnagar_clk_probe()
257 memcpy(priv->lclks, conf->clks, sizeof(priv->lclks)); in lochnagar_clk_probe()
259 clk_init.parent_data = conf->parents; in lochnagar_clk_probe()
260 clk_init.num_parents = conf->nparents; in lochnagar_clk_probe()
262 for (i = 0; i < ARRAY_SIZE(priv->lclks); i++) { in lochnagar_clk_probe()
263 lclk = &priv->lclks[i]; in lochnagar_clk_probe()
265 if (!lclk->name) in lochnagar_clk_probe()
268 clk_init.name = lclk->name; in lochnagar_clk_probe()
270 lclk->priv = priv; in lochnagar_clk_probe()
271 lclk->hw.init = &clk_init; in lochnagar_clk_probe()
273 ret = devm_clk_hw_register(dev, &lclk->hw); in lochnagar_clk_probe()
276 lclk->name, ret); in lochnagar_clk_probe()
290 .name = "lochnagar-clk",
298 MODULE_DESCRIPTION("Clock driver for Cirrus Logic Lochnagar Board");