29 	do_div(rate, fix->div);  in clk_factor_recalc_rate()
41 		best_parent = (req->rate / fix->mult) * fix->div;  in clk_factor_determine_rate()
45 	req->rate = (req->best_parent_rate / fix->div) * fix->mult;  in clk_factor_determine_rate()
97 		unsigned long flags, unsigned int mult, unsigned int div,  in __clk_hw_register_fixed_factor()  argument
119 	fix->div = div;  in __clk_hw_register_fixed_factor()
167 		unsigned int mult, unsigned int div)  in devm_clk_hw_register_fixed_factor_index()  argument
172 					      flags, mult, div, 0, 0, true);  in devm_clk_hw_register_fixed_factor_index()
191 		unsigned long flags, unsigned int mult, unsigned int div)  in devm_clk_hw_register_fixed_factor_parent_hw()  argument
196 					      &pdata, flags, mult, div, 0, 0, true);  in devm_clk_hw_register_fixed_factor_parent_hw()
202 		unsigned long flags, unsigned int mult, unsigned int div)  in clk_hw_register_fixed_factor_parent_hw()  argument
207 					      &pdata, flags, mult, div, 0, 0, false);  in clk_hw_register_fixed_factor_parent_hw()
213 		unsigned int mult, unsigned int div)  in clk_hw_register_fixed_factor()  argument
218 					      &pdata, flags, mult, div, 0, 0, false);  in clk_hw_register_fixed_factor()
224 		unsigned long flags, unsigned int mult, unsigned int div)  in clk_hw_register_fixed_factor_fwname()  argument
229 			&pdata, flags, mult, div, 0, 0, false);  in clk_hw_register_fixed_factor_fwname()
235 		unsigned long flags, unsigned int mult, unsigned int div,  in clk_hw_register_fixed_factor_with_accuracy_fwname()  argument
241 			&pdata, flags, mult, div, acc,  in clk_hw_register_fixed_factor_with_accuracy_fwname()
248 		unsigned int mult, unsigned int div)  in clk_hw_register_fixed_factor_index()  argument
253 					      flags, mult, div, 0, 0, false);  in clk_hw_register_fixed_factor_index()
259 		unsigned int mult, unsigned int div)  in clk_register_fixed_factor()  argument
264 					  div);  in clk_register_fixed_factor()
297 		unsigned int mult, unsigned int div)  in devm_clk_hw_register_fixed_factor()  argument
302 			&pdata, flags, mult, div, 0, 0, true);  in devm_clk_hw_register_fixed_factor()
308 		unsigned long flags, unsigned int mult, unsigned int div)  in devm_clk_hw_register_fixed_factor_fwname()  argument
313 			&pdata, flags, mult, div, 0, 0, true);  in devm_clk_hw_register_fixed_factor_fwname()
319 		unsigned long flags, unsigned int mult, unsigned int div,  in devm_clk_hw_register_fixed_factor_with_accuracy_fwname()  argument
325 			&pdata, flags, mult, div, acc,  in devm_clk_hw_register_fixed_factor_with_accuracy_fwname()
336 	u32 div, mult;  in _of_fixed_factor_clk_setup()  local
339 	if (of_property_read_u32(node, "clock-div", &div)) {  in _of_fixed_factor_clk_setup()
354 					    &pdata, 0, mult, div, 0, 0, false);  in _of_fixed_factor_clk_setup()