1 // SPDX-License-Identifier: GPL-2.0
6 #include <linux/clk-provider.h>
13  * DOC: basic fixed multiplier and divider clock that cannot gate
15  * Traits of this clock:
16  * prepare - clk_prepare only ensures that parents are prepared
17  * enable - clk_enable only ensures that parents are enabled
18  * rate - rate is fixed.  clk->rate = parent->rate / div * mult
19  * parent - fixed parent.  No clk_set_parent support
28 	rate = (unsigned long long int)parent_rate * fix->mult;  in clk_factor_recalc_rate()
29 	do_div(rate, fix->div);  in clk_factor_recalc_rate()
41 		best_parent = (req->rate / fix->mult) * fix->div;  in clk_factor_determine_rate()
42 		req->best_parent_rate = clk_hw_round_rate(clk_hw_get_parent(hw), best_parent);  in clk_factor_determine_rate()
45 	req->rate = (req->best_parent_rate / fix->div) * fix->mult;  in clk_factor_determine_rate()
67 	if (fix->flags & CLK_FIXED_FACTOR_FIXED_ACCURACY)  in clk_factor_recalc_accuracy()
68 		return fix->acc;  in clk_factor_recalc_accuracy()
90 	clk_hw_unregister(&fix->hw);  in devm_clk_hw_register_fixed_factor_release()
107 		return ERR_PTR(-EINVAL);  in __clk_hw_register_fixed_factor()
115 		return ERR_PTR(-ENOMEM);  in __clk_hw_register_fixed_factor()
118 	fix->mult = mult;  in __clk_hw_register_fixed_factor()
119 	fix->div = div;  in __clk_hw_register_fixed_factor()
120 	fix->hw.init = &init;  in __clk_hw_register_fixed_factor()
121 	fix->acc = acc;  in __clk_hw_register_fixed_factor()
122 	fix->flags = fixflags;  in __clk_hw_register_fixed_factor()
135 	hw = &fix->hw;  in __clk_hw_register_fixed_factor()
153  * devm_clk_hw_register_fixed_factor_index - Register a fixed factor clock with
155  * @dev: device that is registering this clock
156  * @name: name of this clock
158  * @flags: fixed factor flags
162  * Return: Pointer to fixed factor clk_hw structure that was registered or
177  * devm_clk_hw_register_fixed_factor_parent_hw - Register a fixed factor clock with
178  * pointer to parent clock
179  * @dev: device that is registering this clock
180  * @name: name of this clock
182  * @flags: fixed factor flags
186  * Return: Pointer to fixed factor clk_hw structure that was registered or
193 	const struct clk_parent_data pdata = { .index = -1 };  in devm_clk_hw_register_fixed_factor_parent_hw()
204 	const struct clk_parent_data pdata = { .index = -1 };  in clk_hw_register_fixed_factor_parent_hw()
215 	const struct clk_parent_data pdata = { .index = -1 };  in clk_hw_register_fixed_factor()
226 	const struct clk_parent_data pdata = { .index = -1, .fw_name = fw_name };  in clk_hw_register_fixed_factor_fwname()
238 	const struct clk_parent_data pdata = { .index = -1, .fw_name = fw_name };  in clk_hw_register_fixed_factor_with_accuracy_fwname()
267 	return hw->clk;  in clk_register_fixed_factor()
299 	const struct clk_parent_data pdata = { .index = -1 };  in devm_clk_hw_register_fixed_factor()
310 	const struct clk_parent_data pdata = { .index = -1, .fw_name = fw_name };  in devm_clk_hw_register_fixed_factor_fwname()
322 	const struct clk_parent_data pdata = { .index = -1, .fw_name = fw_name };  in devm_clk_hw_register_fixed_factor_with_accuracy_fwname()
334 	const char *clk_name = node->name;  in _of_fixed_factor_clk_setup()
339 	if (of_property_read_u32(node, "clock-div", &div)) {  in _of_fixed_factor_clk_setup()
340 		pr_err("%s Fixed factor clock <%pOFn> must have a clock-div property\n",  in _of_fixed_factor_clk_setup()
342 		return ERR_PTR(-EIO);  in _of_fixed_factor_clk_setup()
345 	if (of_property_read_u32(node, "clock-mult", &mult)) {  in _of_fixed_factor_clk_setup()
346 		pr_err("%s Fixed factor clock <%pOFn> must have a clock-mult property\n",  in _of_fixed_factor_clk_setup()
348 		return ERR_PTR(-EIO);  in _of_fixed_factor_clk_setup()
351 	of_property_read_string(node, "clock-output-names", &clk_name);  in _of_fixed_factor_clk_setup()
357 		 * Clear OF_POPULATED flag so that clock registration can be  in _of_fixed_factor_clk_setup()
374  * of_fixed_factor_clk_setup() - Setup function for simple fixed factor clock
375  * @node:	device node for the clock
381 CLK_OF_DECLARE(fixed_factor_clk, "fixed-factor-clock",
388 	of_clk_del_provider(pdev->dev.of_node);  in of_fixed_factor_clk_remove()
400 	clk = _of_fixed_factor_clk_setup(pdev->dev.of_node);  in of_fixed_factor_clk_probe()
410 	{ .compatible = "fixed-factor-clock" },