Lines Matching refs:width

46 				      u8 width)  in _get_table_maxdiv()  argument
48 unsigned int maxdiv = 0, mask = clk_div_mask(width); in _get_table_maxdiv()
68 static unsigned int _get_maxdiv(const struct clk_div_table *table, u8 width, in _get_maxdiv() argument
72 return clk_div_mask(width); in _get_maxdiv()
74 return 1 << clk_div_mask(width); in _get_maxdiv()
76 return 2 * (clk_div_mask(width) + 1); in _get_maxdiv()
78 return _get_table_maxdiv(table, width); in _get_maxdiv()
79 return clk_div_mask(width) + 1; in _get_maxdiv()
94 unsigned int val, unsigned long flags, u8 width) in _get_div() argument
101 return val ? val : clk_div_mask(width) + 1; in _get_div()
121 unsigned int div, unsigned long flags, u8 width) in _get_val() argument
128 return (div == clk_div_mask(width) + 1) ? 0 : div; in _get_val()
139 unsigned long flags, unsigned long width) in divider_recalc_rate() argument
143 div = _get_div(table, val, flags, width); in divider_recalc_rate()
162 val &= clk_div_mask(divider->width); in clk_divider_recalc_rate()
165 divider->flags, divider->width); in clk_divider_recalc_rate()
298 const struct clk_div_table *table, u8 width, in clk_divider_bestdiv() argument
308 maxdiv = _get_maxdiv(table, width, flags); in clk_divider_bestdiv()
345 bestdiv = _get_maxdiv(table, width, flags); in clk_divider_bestdiv()
353 const struct clk_div_table *table, u8 width, in divider_determine_rate() argument
359 &req->best_parent_rate, table, width, flags); in divider_determine_rate()
368 const struct clk_div_table *table, u8 width, in divider_ro_determine_rate() argument
373 div = _get_div(table, val, flags, width); in divider_ro_determine_rate()
393 u8 width, unsigned long flags) in divider_round_rate_parent() argument
402 ret = divider_determine_rate(hw, &req, table, width, flags); in divider_round_rate_parent()
414 const struct clk_div_table *table, u8 width, in divider_ro_round_rate_parent() argument
424 ret = divider_ro_determine_rate(hw, &req, table, width, flags, val); in divider_ro_round_rate_parent()
444 val &= clk_div_mask(divider->width); in clk_divider_determine_rate()
447 divider->width, in clk_divider_determine_rate()
451 return divider_determine_rate(hw, req, divider->table, divider->width, in clk_divider_determine_rate()
456 const struct clk_div_table *table, u8 width, in divider_get_val() argument
466 value = _get_val(table, div, flags, width); in divider_get_val()
468 return min_t(unsigned int, value, clk_div_mask(width)); in divider_get_val()
481 divider->width, divider->flags); in clk_divider_set_rate()
491 val = clk_div_mask(divider->width) << (divider->shift + 16); in clk_divider_set_rate()
494 val &= ~(clk_div_mask(divider->width) << divider->shift); in clk_divider_set_rate()
524 void __iomem *reg, u8 shift, u8 width, in __clk_hw_register_divider() argument
534 if (width + shift > 16) { in __clk_hw_register_divider()
562 div->width = width; in __clk_hw_register_divider()
596 void __iomem *reg, u8 shift, u8 width, in clk_register_divider_table() argument
603 NULL, flags, reg, shift, width, clk_divider_flags, in clk_register_divider_table()
651 void __iomem *reg, u8 shift, u8 width, in __devm_clk_hw_register_divider() argument
662 parent_data, flags, reg, shift, width, in __devm_clk_hw_register_divider()