Lines Matching refs:scu_g6_base
71 static void __iomem *scu_g6_base;
544 scu_g6_base + ASPEED_G6_CLK_SELECTION1, 11, 1,
550 0, scu_g6_base + ASPEED_G6_CLK_SELECTION1,
557 scu_g6_base +
567 scu_g6_base + ASPEED_G6_CLK_SELECTION4, 31, 0,
572 0, scu_g6_base + ASPEED_G6_CLK_SELECTION4, 28, 3, 0,
586 scu_g6_base + ASPEED_G6_CLK_SELECTION1, 16, 3, 0,
595 scu_g6_base + ASPEED_MAC12_CLK_DLY, 29, 0,
603 scu_g6_base + ASPEED_MAC12_CLK_DLY, 30, 0,
616 scu_g6_base + 0x310, 24, 3, 0,
625 scu_g6_base + ASPEED_MAC34_CLK_DLY, 29, 0,
633 scu_g6_base + ASPEED_MAC34_CLK_DLY, 30, 0,
641 scu_g6_base + ASPEED_G6_CLK_SELECTION1, 20, 3, 0,
653 scu_g6_base + ASPEED_G6_CLK_SELECTION1, 8, 3, 0,
664 scu_g6_base + ASPEED_G6_CLK_SELECTION1, 20, 3, 0,
674 scu_g6_base + ASPEED_G6_CLK_SELECTION2, 12, 3, 0,
682 scu_g6_base + ASPEED_G6_CLK_SELECTION1, 28, 3, 0,
835 scu_g6_base = of_iomap(np, 0);
836 if (!scu_g6_base)
839 soc_rev = (readl(scu_g6_base + ASPEED_G6_SILICON_REV) & CHIP_REVISION_ID) >> 16;