Lines Matching +full:berlin2q +full:- +full:clk
1 // SPDX-License-Identifier: GPL-2.0
5 * Alexandre Belloni <alexandre.belloni@free-electrons.com>
9 #include <linux/clk.h>
10 #include <linux/clk-provider.h>
17 #include <dt-bindings/clock/berlin2q.h>
19 #include "berlin2-div.h"
20 #include "berlin2-pll.h"
284 struct clk *clk; in berlin2q_clock_setup() local
293 clk_data->num = MAX_CLKS; in berlin2q_clock_setup()
294 hws = clk_data->hws; in berlin2q_clock_setup()
313 clk = of_clk_get_by_name(np, clk_names[REFCLK]); in berlin2q_clock_setup()
314 if (!IS_ERR(clk)) { in berlin2q_clock_setup()
315 clk_names[REFCLK] = __clk_get_name(clk); in berlin2q_clock_setup()
316 clk_put(clk); in berlin2q_clock_setup()
342 for (k = 0; k < dd->num_parents; k++) in berlin2q_clock_setup()
343 parent_names[k] = clk_names[dd->parent_ids[k]]; in berlin2q_clock_setup()
345 hws[CLKID_SYS + n] = berlin2_div_register(&dd->map, gbase, in berlin2q_clock_setup()
346 dd->name, dd->div_flags, parent_names, in berlin2q_clock_setup()
347 dd->num_parents, dd->flags, &lock); in berlin2q_clock_setup()
354 hws[CLKID_GFX2DAXI + n] = clk_hw_register_gate(NULL, gd->name, in berlin2q_clock_setup()
355 gd->parent_name, gd->flags, gbase + REG_CLKENABLE, in berlin2q_clock_setup()
356 gd->bit_idx, 0, &lock); in berlin2q_clock_setup()
376 /* register clk-provider */ in berlin2q_clock_setup()
385 CLK_OF_DECLARE(berlin2q_clk, "marvell,berlin2q-clk",