1 // SPDX-License-Identifier: GPL-2.0-only
7 #include "clk-kona.h"
12 #include <linux/clk-provider.h>
17  * "Normal", and "Turbo".)  A lower policy number has lower power
27 /* Produces a mask of set bits covering a range of a 32-bit value */
30 	return ((1 << width) - 1) << shift;  in bitfield_mask()
52 	return (u64)reg_div + ((u64)1 << div->u.s.frac_width);  in scaled_div_value()
62 	u64 combined;  in scaled_div_build()  local
67 	combined = (u64)div_value * BILLION + billionths;  in scaled_div_build()
68 	combined <<= div->u.s.frac_width;  in scaled_div_build()
70 	return DIV_ROUND_CLOSEST_ULL(combined, BILLION);  in scaled_div_build()
78 		return (u64)div->u.fixed;  in scaled_div_min()
89 		return (u64)div->u.fixed;  in scaled_div_max()
91 	reg_div = ((u32)1 << div->u.s.width) - 1;  in scaled_div_max()
106 	return (u32)(scaled_div - ((u64)1 << div->u.s.frac_width));  in divider()
116 	return (u64)rate << div->u.s.frac_width;  in scale_rate()
121 /* Read a 32-bit register value from a CCU's address space. */
124 	return readl(ccu->base + reg_offset);  in __ccu_read()
127 /* Write a 32-bit register value into a CCU's address space. */
131 	writel(reg_val, ccu->base + reg_offset);  in __ccu_write()
138 	spin_lock_irqsave(&ccu->lock, flags);  in ccu_lock()
144 	spin_unlock_irqrestore(&ccu->lock, flags);  in ccu_unlock()
153 	if (ccu->write_enabled) {  in __ccu_write_enable()
155 			ccu->name);  in __ccu_write_enable()
158 	ccu->write_enabled = true;  in __ccu_write_enable()
164 	if (!ccu->write_enabled) {  in __ccu_write_disable()
166 			ccu->name);  in __ccu_write_disable()
171 	ccu->write_enabled = false;  in __ccu_write_disable()
199 		ccu->name, reg_offset, bit, want ? "set" : "clear");  in __ccu_wait_bit()
208 	struct bcm_policy_ctl *control = &ccu->policy.control;  in __ccu_policy_engine_start()
218 	offset = control->offset;  in __ccu_policy_engine_start()
219 	go_bit = control->go_bit;  in __ccu_policy_engine_start()
225 			__func__, ccu->name);  in __ccu_policy_engine_start()
239 	 * (ATL bit clear) and setting the request auto-copy (AC bit  in __ccu_policy_engine_start()
242 	 * Note, we do NOT read-modify-write this register.  in __ccu_policy_engine_start()
246 		mask |= 1 << control->atl_bit;  in __ccu_policy_engine_start()
248 		mask |= 1 << control->ac_bit;  in __ccu_policy_engine_start()
255 			__func__, ccu->name);  in __ccu_policy_engine_start()
262 	struct bcm_lvm_en *enable = &ccu->policy.enable;  in __ccu_policy_engine_stop()
272 	offset = enable->offset;  in __ccu_policy_engine_stop()
273 	enable_bit = enable->bit;  in __ccu_policy_engine_stop()
277 			__func__, ccu->name);  in __ccu_policy_engine_stop()
281 	/* Now set the bit to stop the engine (NO read-modify-write) */  in __ccu_policy_engine_stop()
288 			__func__, ccu->name);  in __ccu_policy_engine_stop()
299  * four registers, and the 32-bit registers are at consecutive
318 			__func__, ccu->name);  in policy_init()
326 	offset = policy->offset;  in policy_init()
327 	mask = (u32)1 << policy->bit;  in policy_init()
341 			__func__, ccu->name);  in policy_init()
359 	bit_mask = 1 << gate->status_bit;  in __is_clk_gate_enabled()
360 	reg_val = __ccu_read(ccu, gate->offset);  in __is_clk_gate_enabled()
398 	reg_val = __ccu_read(ccu, gate->offset);  in __gate_commit()
402 		mask = (u32)1 << gate->hw_sw_sel_bit;  in __gate_commit()
416 	mask = (u32)1 << gate->en_bit;  in __gate_commit()
423 	__ccu_write(ccu, gate->offset, reg_val);  in __gate_commit()
430 	return __ccu_wait_bit(ccu, gate->offset, gate->status_bit, enabled);  in __gate_commit()
477 /* Enable or disable a gate.  Returns 0 if successful, -EIO otherwise */
507 	return -EIO;  in clk_gate()
513  * If a clock gate requires a turn-off delay it will have
528 	offset = hyst->offset;  in hyst_init()
529 	mask = (u32)1 << hyst->en_bit;  in hyst_init()
530 	mask |= (u32)1 << hyst->val_bit;  in hyst_init()
548 	__ccu_write(ccu, trig->offset, 1 << trig->bit);  in __clk_trigger()
550 	return __ccu_wait_bit(ccu, trig->offset, trig->bit, false);  in __clk_trigger()
563 		return (u64)div->u.fixed;  in divider_read_scaled()
566 	reg_val = __ccu_read(ccu, div->u.s.offset);  in divider_read_scaled()
570 	reg_div = bitfield_extract(reg_val, div->u.s.shift, div->u.s.width);  in divider_read_scaled()
580  * Returns 0 on success.  Returns -EINVAL for invalid arguments.
581  * Returns -ENXIO if gating failed, and -EIO if a trigger failed.
598 	if (div->u.s.scaled_div == BAD_SCALED_DIV_VALUE) {  in __div_commit()
599 		reg_val = __ccu_read(ccu, div->u.s.offset);  in __div_commit()
600 		reg_div = bitfield_extract(reg_val, div->u.s.shift,  in __div_commit()
601 						div->u.s.width);  in __div_commit()
602 		div->u.s.scaled_div = scaled_div_value(div, reg_div);  in __div_commit()
608 	reg_div = divider(div, div->u.s.scaled_div);  in __div_commit()
613 		ret = -ENXIO;  in __div_commit()
618 	reg_val = __ccu_read(ccu, div->u.s.offset);  in __div_commit()
619 	reg_val = bitfield_replace(reg_val, div->u.s.shift, div->u.s.width,  in __div_commit()
621 	__ccu_write(ccu, div->u.s.offset, reg_val);  in __div_commit()
625 		ret = -EIO;  in __div_commit()
629 		ret = ret ? ret : -ENXIO;	/* return first error */  in __div_commit()
657 	previous = div->u.s.scaled_div;  in divider_write()
661 	div->u.s.scaled_div = scaled_div;  in divider_write()
672 		div->u.s.scaled_div = previous;		/* Revert the change */  in divider_write()
682  * into account a divider and an optional pre-divider.  The
683  * pre-divider register pointer may be NULL.
700 	 * If there is a pre-divider, divide the scaled parent rate  in clk_recalc_rate()
701 	 * by the pre-divider value first.  In this case--to improve  in clk_recalc_rate()
702 	 * accuracy--scale the parent rate by *both* the pre-divider  in clk_recalc_rate()
704 	 * result of the pre-divider.  in clk_recalc_rate()
733  * into two dividers.  The pre-divider can be NULL, and even if it's
734  * non-null it may be nonexistent.  It's also OK for the divider to
735  * be nonexistent, and in that case the pre-divider is also ignored.
737  * If scaled_div is non-null, it is used to return the scaled divisor
756 	 * If there is a pre-divider, divide the scaled parent rate  in round_rate()
757 	 * by the pre-divider value first.  In this case--to improve  in round_rate()
758 	 * accuracy--scale the parent rate by *both* the pre-divider  in round_rate()
760 	 * result of the pre-divider.  in round_rate()
764 	 * For simplicity we treat the pre-divider as fixed (for now).  in round_rate()
817 	BUG_ON(sel->parent_count > (u32)U8_MAX);  in parent_index()
818 	for (i = 0; i < sel->parent_count; i++)  in parent_index()
819 		if (sel->parent_sel[i] == parent_sel)  in parent_index()
845 	reg_val = __ccu_read(ccu, sel->offset);  in selector_read_index()
848 	parent_sel = bitfield_extract(reg_val, sel->shift, sel->width);  in selector_read_index()
853 		pr_err("%s: out-of-range parent selector %u (%s 0x%04x)\n",  in selector_read_index()
854 			__func__, parent_sel, ccu->name, sel->offset);  in selector_read_index()
862  * Returns 0 on success.  Returns -EINVAL for invalid arguments.
863  * Returns -ENXIO if gating failed, and -EIO if a trigger failed.
881 	if (sel->clk_index == BAD_CLK_INDEX) {  in __sel_commit()
884 		reg_val = __ccu_read(ccu, sel->offset);  in __sel_commit()
885 		parent_sel = bitfield_extract(reg_val, sel->shift, sel->width);  in __sel_commit()
888 			return -EINVAL;  in __sel_commit()
889 		sel->clk_index = index;  in __sel_commit()
894 	BUG_ON((u32)sel->clk_index >= sel->parent_count);  in __sel_commit()
895 	parent_sel = sel->parent_sel[sel->clk_index];  in __sel_commit()
900 		return -ENXIO;  in __sel_commit()
903 	reg_val = __ccu_read(ccu, sel->offset);  in __sel_commit()
904 	reg_val = bitfield_replace(reg_val, sel->shift, sel->width, parent_sel);  in __sel_commit()
905 	__ccu_write(ccu, sel->offset, reg_val);  in __sel_commit()
909 		ret = -EIO;  in __sel_commit()
913 		ret = ret ? ret : -ENXIO;	/* return first error */  in __sel_commit()
944 	previous = sel->clk_index;  in selector_write()
948 	sel->clk_index = index;  in selector_write()
959 		sel->clk_index = previous;	/* Revert the change */  in selector_write()
969 	struct bcm_clk_gate *gate = &bcm_clk->u.peri->gate;  in kona_peri_clk_enable()
971 	return clk_gate(bcm_clk->ccu, bcm_clk->init_data.name, gate, true);  in kona_peri_clk_enable()
977 	struct bcm_clk_gate *gate = &bcm_clk->u.peri->gate;  in kona_peri_clk_disable()
979 	(void)clk_gate(bcm_clk->ccu, bcm_clk->init_data.name, gate, false);  in kona_peri_clk_disable()
985 	struct bcm_clk_gate *gate = &bcm_clk->u.peri->gate;  in kona_peri_clk_is_enabled()
987 	return is_clk_gate_enabled(bcm_clk->ccu, gate) ? 1 : 0;  in kona_peri_clk_is_enabled()
994 	struct peri_clk_data *data = bcm_clk->u.peri;  in kona_peri_clk_recalc_rate()
996 	return clk_recalc_rate(bcm_clk->ccu, &data->div, &data->pre_div,  in kona_peri_clk_recalc_rate()
1004 	struct bcm_clk_div *div = &bcm_clk->u.peri->div;  in kona_peri_clk_round_rate()
1010 	return round_rate(bcm_clk->ccu, div, &bcm_clk->u.peri->pre_div,  in kona_peri_clk_round_rate()
1015 					struct clk_rate_request *req)  in kona_peri_clk_determine_rate()  argument
1030 	WARN_ON_ONCE(bcm_clk->init_data.flags & CLK_SET_RATE_NO_REPARENT);  in kona_peri_clk_determine_rate()
1031 	parent_count = (u32)bcm_clk->init_data.num_parents;  in kona_peri_clk_determine_rate()
1033 		rate = kona_peri_clk_round_rate(hw, req->rate,  in kona_peri_clk_determine_rate()
1034 						&req->best_parent_rate);  in kona_peri_clk_determine_rate()
1038 		req->rate = rate;  in kona_peri_clk_determine_rate()
1045 	best_rate = kona_peri_clk_round_rate(hw, req->rate, &parent_rate);  in kona_peri_clk_determine_rate()
1046 	best_delta = abs(best_rate - req->rate);  in kona_peri_clk_determine_rate()
1060 		other_rate = kona_peri_clk_round_rate(hw, req->rate,  in kona_peri_clk_determine_rate()
1062 		delta = abs(other_rate - req->rate);  in kona_peri_clk_determine_rate()
1066 			req->best_parent_hw = parent;  in kona_peri_clk_determine_rate()
1067 			req->best_parent_rate = parent_rate;  in kona_peri_clk_determine_rate()
1071 	req->rate = best_rate;  in kona_peri_clk_determine_rate()
1078 	struct peri_clk_data *data = bcm_clk->u.peri;  in kona_peri_clk_set_parent()
1079 	struct bcm_clk_sel *sel = &data->sel;  in kona_peri_clk_set_parent()
1083 	BUG_ON(index >= sel->parent_count);  in kona_peri_clk_set_parent()
1091 	 * pre-trigger we want to use that instead.  in kona_peri_clk_set_parent()
1093 	trig = trigger_exists(&data->pre_trig) ? &data->pre_trig  in kona_peri_clk_set_parent()
1094 					       : &data->trig;  in kona_peri_clk_set_parent()
1096 	ret = selector_write(bcm_clk->ccu, &data->gate, sel, trig, index);  in kona_peri_clk_set_parent()
1097 	if (ret == -ENXIO) {  in kona_peri_clk_set_parent()
1099 			bcm_clk->init_data.name);  in kona_peri_clk_set_parent()
1100 		ret = -EIO;	/* Don't proliferate weird errors */  in kona_peri_clk_set_parent()
1101 	} else if (ret == -EIO) {  in kona_peri_clk_set_parent()
1103 			trig == &data->pre_trig ? "pre-" : "",  in kona_peri_clk_set_parent()
1104 			bcm_clk->init_data.name);  in kona_peri_clk_set_parent()
1113 	struct peri_clk_data *data = bcm_clk->u.peri;  in kona_peri_clk_get_parent()
1116 	index = selector_read_index(bcm_clk->ccu, &data->sel);  in kona_peri_clk_get_parent()
1118 	/* Not all callers would handle an out-of-range value gracefully */  in kona_peri_clk_get_parent()
1126 	struct peri_clk_data *data = bcm_clk->u.peri;  in kona_peri_clk_set_rate()
1127 	struct bcm_clk_div *div = &data->div;  in kona_peri_clk_set_rate()
1132 		return -EINVAL;  in kona_peri_clk_set_rate()
1138 		return rate == parent_rate ? 0 : -EINVAL;  in kona_peri_clk_set_rate()
1142 	 * pre-divider be, but for now we never actually try to  in kona_peri_clk_set_rate()
1143 	 * change that.)  Tolerate a request for a no-op change.  in kona_peri_clk_set_rate()
1145 	if (divider_is_fixed(&data->div))  in kona_peri_clk_set_rate()
1146 		return rate == parent_rate ? 0 : -EINVAL;  in kona_peri_clk_set_rate()
1153 	(void)round_rate(bcm_clk->ccu, div, &data->pre_div,  in kona_peri_clk_set_rate()
1157 	 * We aren't updating any pre-divider at this point, so  in kona_peri_clk_set_rate()
1160 	ret = divider_write(bcm_clk->ccu, &data->gate, &data->div,  in kona_peri_clk_set_rate()
1161 				&data->trig, scaled_div);  in kona_peri_clk_set_rate()
1162 	if (ret == -ENXIO) {  in kona_peri_clk_set_rate()
1164 			bcm_clk->init_data.name);  in kona_peri_clk_set_rate()
1165 		ret = -EIO;	/* Don't proliferate weird errors */  in kona_peri_clk_set_rate()
1166 	} else if (ret == -EIO) {  in kona_peri_clk_set_rate()
1168 			bcm_clk->init_data.name);  in kona_peri_clk_set_rate()
1188 	struct ccu_data *ccu = bcm_clk->ccu;  in __peri_clk_init()
1189 	struct peri_clk_data *peri = bcm_clk->u.peri;  in __peri_clk_init()
1190 	const char *name = bcm_clk->init_data.name;  in __peri_clk_init()
1193 	BUG_ON(bcm_clk->type != bcm_clk_peri);  in __peri_clk_init()
1195 	if (!policy_init(ccu, &peri->policy)) {  in __peri_clk_init()
1200 	if (!gate_init(ccu, &peri->gate)) {  in __peri_clk_init()
1204 	if (!hyst_init(ccu, &peri->hyst)) {  in __peri_clk_init()
1208 	if (!div_init(ccu, &peri->gate, &peri->div, &peri->trig)) {  in __peri_clk_init()
1215 	 * For the pre-divider and selector, the pre-trigger is used  in __peri_clk_init()
1218 	trig = trigger_exists(&peri->pre_trig) ? &peri->pre_trig  in __peri_clk_init()
1219 					       : &peri->trig;  in __peri_clk_init()
1221 	if (!div_init(ccu, &peri->gate, &peri->pre_div, trig)) {  in __peri_clk_init()
1222 		pr_err("%s: error initializing pre-divider for %s\n", __func__,  in __peri_clk_init()
1227 	if (!sel_init(ccu, &peri->gate, &peri->sel, trig)) {  in __peri_clk_init()
1238 	switch (bcm_clk->type) {  in __kona_clk_init()
1252 	struct kona_clk *kona_clks = ccu->kona_clks;  in kona_ccu_init()
1258 	for (which = 0; which < ccu->clk_num; which++) {  in kona_ccu_init()
1261 		if (!bcm_clk->ccu)  in kona_ccu_init()