Lines Matching +full:pll +full:- +full:reset

1 /* SPDX-License-Identifier: GPL-2.0-only */
13 #include <linux/clk-provider.h>
17 #define bit_mask(width) ((1 << (width)) - 1)
22 /* PLL that requires gating through ASIU */
25 /* PLL that has fractional part of the NDIV */
29  * Some of the iProc PLL/clocks may have an ASIC bug that requires read back
36  * Some PLLs require the PLL SW override bit to be set before changes can be
37  * applied to the PLL
43  * the PLL control register
69  * Some PLLs have an active low reset
74  * Calculate the PLL parameters are runtime, instead of using table
106  * Control of powering on/off of a PLL
108  * Before powering off a PLL, input isolation (ISO) needs to be enabled
118  * Control of the PLL reset
140  * To enable SW control of the PLL
153  * Main PLL control parameters
159 	struct iproc_pll_reset_ctrl reset;  member
171  * Controls enabling/disabling a PLL derived clock