Lines Matching +full:0 +full:xc08

15 #define IPROC_CLK_MAX_FREQ_POLICY                    0x3
16 #define IPROC_CLK_POLICY_FREQ_OFFSET                 0x008
18 #define IPROC_CLK_POLICY_FREQ_POLICY_FREQ_MASK       0x7
20 #define IPROC_CLK_PLLARMA_OFFSET                     0xc00
23 #define IPROC_CLK_PLLARMA_PDIV_MASK                  0xf
25 #define IPROC_CLK_PLLARMA_NDIV_INT_MASK              0x3ff
27 #define IPROC_CLK_PLLARMB_OFFSET                     0xc04
28 #define IPROC_CLK_PLLARMB_NDIV_FRAC_MASK             0xfffff
30 #define IPROC_CLK_PLLARMC_OFFSET                     0xc08
32 #define IPROC_CLK_PLLARMC_MDIV_MASK                  0xff
34 #define IPROC_CLK_PLLARMCTL5_OFFSET                  0xc20
35 #define IPROC_CLK_PLLARMCTL5_H_MDIV_MASK             0xff
37 #define IPROC_CLK_PLLARM_OFFSET_OFFSET               0xc24
40 #define IPROC_CLK_PLLARM_NDIV_INT_OFFSET_MASK        0xff
41 #define IPROC_CLK_PLLARM_NDIV_FRAC_OFFSET_MASK       0xfffff
43 #define IPROC_CLK_ARM_DIV_OFFSET                     0xe00
45 #define IPROC_CLK_ARM_DIV_ARM_PLL_SELECT_MASK        0xf
47 #define IPROC_CLK_POLICY_DBG_OFFSET                  0xec0
49 #define IPROC_CLK_POLICY_DBG_ACT_FREQ_MASK           0x7
52 	ARM_PLL_FID_CRYSTAL_CLK   = 0,
75 		policy = 0;  in __get_fid()
103  *    - PLL channel 0 (slow clock)
123 		if (mdiv == 0)  in __get_mdiv()
130 		if (mdiv == 0)  in __get_mdiv()
154 		if (ndiv_int == 0)  in __get_ndiv()
163 		if (ndiv_int == 0)  in __get_ndiv()
204 		pll->rate = 0;  in iproc_arm_pll_recalc_rate()
205 		return 0;  in iproc_arm_pll_recalc_rate()
210 	if (pdiv == 0)  in iproc_arm_pll_recalc_rate()
215 	if (mdiv <= 0) {  in iproc_arm_pll_recalc_rate()
216 		pll->rate = 0;  in iproc_arm_pll_recalc_rate()
217 		return 0;  in iproc_arm_pll_recalc_rate()
245 	pll->base = of_iomap(node, 0);  in iproc_armpll_setup()
251 	init.flags = 0;  in iproc_armpll_setup()
252 	parent_name = of_clk_get_parent_name(node, 0);  in iproc_armpll_setup()
254 	init.num_parents = (parent_name ? 1 : 0);  in iproc_armpll_setup()