1 // SPDX-License-Identifier: GPL-2.0-only
3  * ARTPEC-6 clock initialization
5  * Copyright 2015-2016 Axis Communications AB.
8 #include <linux/clk-provider.h>
15 #include <dt-bindings/clock/axis,artpec6-clkctrl.h>
46 	i = of_property_match_string(np, "clock-names", "sys_refclk");  in of_artpec6_clkctrl_setup()
56 	clks = clkdata->clk_table;  in of_artpec6_clkctrl_setup()
59 		clks[i] = ERR_PTR(-EPROBE_DEFER);  in of_artpec6_clkctrl_setup()
61 	clkdata->syscon_base = of_iomap(np, 0);  in of_artpec6_clkctrl_setup()
62 	BUG_ON(clkdata->syscon_base == NULL);  in of_artpec6_clkctrl_setup()
65 	pll_mode = (readl(clkdata->syscon_base) >> 6) & 3;  in of_artpec6_clkctrl_setup()
67 	case 0:		/* DDR3-2133 mode */  in of_artpec6_clkctrl_setup()
71 	case 1:		/* DDR3-1866 mode */  in of_artpec6_clkctrl_setup()
75 	case 2:		/* DDR3-1600 mode */  in of_artpec6_clkctrl_setup()
79 	case 3:		/* DDR3-1333 mode */  in of_artpec6_clkctrl_setup()
107 	clkdata->clk_data.clks = clkdata->clk_table;  in of_artpec6_clkctrl_setup()
108 	clkdata->clk_data.clk_num = ARTPEC6_CLK_NUMCLOCKS;  in of_artpec6_clkctrl_setup()
110 	of_clk_add_provider(np, of_clk_src_onecell_get, &clkdata->clk_data);  in of_artpec6_clkctrl_setup()
113 CLK_OF_DECLARE_DRIVER(artpec6_clkctrl, "axis,artpec6-clkctrl",
119 	struct device_node *np = pdev->dev.of_node;  in artpec6_clkctrl_probe()
120 	struct device *dev = &pdev->dev;  in artpec6_clkctrl_probe()
121 	struct clk **clks = clkdata->clk_table;  in artpec6_clkctrl_probe()
131 	propidx = of_property_match_string(np, "clock-names", "sys_refclk");  in artpec6_clkctrl_probe()
133 		return -EINVAL;  in artpec6_clkctrl_probe()
138 	propidx = of_property_match_string(np, "clock-names", "i2s_refclk");  in artpec6_clkctrl_probe()
142 	propidx = of_property_match_string(np, "clock-names", "frac_clk0");  in artpec6_clkctrl_probe()
145 	propidx = of_property_match_string(np, "clock-names", "frac_clk1");  in artpec6_clkctrl_probe()
149 	spin_lock_init(&clkdata->i2scfg_lock);  in artpec6_clkctrl_probe()
182 					     clkdata->syscon_base + 0x14, i, 1,  in artpec6_clkctrl_probe()
183 					     0, &clkdata->i2scfg_lock);  in artpec6_clkctrl_probe()
186 			muxreg = readl(clkdata->syscon_base + 0x14);  in artpec6_clkctrl_probe()
188 			writel(muxreg, clkdata->syscon_base + 0x14);  in artpec6_clkctrl_probe()
195 			muxreg = readl(clkdata->syscon_base + 0x14);  in artpec6_clkctrl_probe()
197 			writel(muxreg, clkdata->syscon_base + 0x14);  in artpec6_clkctrl_probe()
215 		if (IS_ERR(clks[i]) && PTR_ERR(clks[i]) != -EPROBE_DEFER) {  in artpec6_clkctrl_probe()
227 	{ .compatible = "axis,artpec6-clkctrl" },