38 	struct sam9x60_pll_core core;  member
45 	struct sam9x60_pll_core core;  member
52 #define to_sam9x60_frac(core)	container_of(core, struct sam9x60_frac, core)  argument
53 #define to_sam9x60_div(core)	container_of(core, struct sam9x60_div, core)  argument
74 	struct sam9x60_pll_core *core = to_sam9x60_pll_core(hw);  in sam9x60_frac_pll_recalc_rate()  local
75 	struct sam9x60_frac *frac = to_sam9x60_frac(core);  in sam9x60_frac_pll_recalc_rate()
81 	if (core->layout->div2)  in sam9x60_frac_pll_recalc_rate()
87 static int sam9x60_frac_pll_set(struct sam9x60_pll_core *core)  in sam9x60_frac_pll_set()  argument
89 	struct sam9x60_frac *frac = to_sam9x60_frac(core);  in sam9x60_frac_pll_set()
90 	struct regmap *regmap = core->regmap;  in sam9x60_frac_pll_set()
94 	spin_lock_irqsave(core->lock, flags);  in sam9x60_frac_pll_set()
97 			   AT91_PMC_PLL_UPDT_ID_MSK, core->id);  in sam9x60_frac_pll_set()
99 	cmul = (val & core->layout->mul_mask) >> core->layout->mul_shift;  in sam9x60_frac_pll_set()
100 	cfrac = (val & core->layout->frac_mask) >> core->layout->frac_shift;  in sam9x60_frac_pll_set()
102 	if (sam9x60_frac_pll_ready(regmap, core->id) &&  in sam9x60_frac_pll_set()
107 	if (core->characteristics->upll)  in sam9x60_frac_pll_set()
114 		     (frac->mul << core->layout->mul_shift) |  in sam9x60_frac_pll_set()
115 		     (frac->frac << core->layout->frac_shift));  in sam9x60_frac_pll_set()
117 	if (core->characteristics->upll) {  in sam9x60_frac_pll_set()
133 			   AT91_PMC_PLL_UPDT_UPDATE | core->id);  in sam9x60_frac_pll_set()
141 			   AT91_PMC_PLL_UPDT_UPDATE | core->id);  in sam9x60_frac_pll_set()
143 	while (!sam9x60_pll_ready(regmap, core->id))  in sam9x60_frac_pll_set()
147 	spin_unlock_irqrestore(core->lock, flags);  in sam9x60_frac_pll_set()
154 	struct sam9x60_pll_core *core = to_sam9x60_pll_core(hw);  in sam9x60_frac_pll_prepare()  local
156 	return sam9x60_frac_pll_set(core);  in sam9x60_frac_pll_prepare()
161 	struct sam9x60_pll_core *core = to_sam9x60_pll_core(hw);  in sam9x60_frac_pll_unprepare()  local
162 	struct regmap *regmap = core->regmap;  in sam9x60_frac_pll_unprepare()
165 	spin_lock_irqsave(core->lock, flags);  in sam9x60_frac_pll_unprepare()
168 			   AT91_PMC_PLL_UPDT_ID_MSK, core->id);  in sam9x60_frac_pll_unprepare()
172 	if (core->characteristics->upll)  in sam9x60_frac_pll_unprepare()
178 			   AT91_PMC_PLL_UPDT_UPDATE | core->id);  in sam9x60_frac_pll_unprepare()
180 	spin_unlock_irqrestore(core->lock, flags);  in sam9x60_frac_pll_unprepare()
185 	struct sam9x60_pll_core *core = to_sam9x60_pll_core(hw);  in sam9x60_frac_pll_is_prepared()  local
187 	return sam9x60_pll_ready(core->regmap, core->id);  in sam9x60_frac_pll_is_prepared()
190 static long sam9x60_frac_pll_compute_mul_frac(struct sam9x60_pll_core *core,  in sam9x60_frac_pll_compute_mul_frac()  argument
195 	struct sam9x60_frac *frac = to_sam9x60_frac(core);  in sam9x60_frac_pll_compute_mul_frac()
200 	if (rate < core->characteristics->core_output[0].min ||  in sam9x60_frac_pll_compute_mul_frac()
201 	    rate > core->characteristics->core_output[0].max)  in sam9x60_frac_pll_compute_mul_frac()
221 	if (tmprate < core->characteristics->core_output[0].min ||  in sam9x60_frac_pll_compute_mul_frac()
222 	    tmprate > core->characteristics->core_output[0].max)  in sam9x60_frac_pll_compute_mul_frac()
236 	struct sam9x60_pll_core *core = to_sam9x60_pll_core(hw);  in sam9x60_frac_pll_round_rate()  local
238 	return sam9x60_frac_pll_compute_mul_frac(core, rate, *parent_rate, false);  in sam9x60_frac_pll_round_rate()
244 	struct sam9x60_pll_core *core = to_sam9x60_pll_core(hw);  in sam9x60_frac_pll_set_rate()  local
246 	return sam9x60_frac_pll_compute_mul_frac(core, rate, parent_rate, true);  in sam9x60_frac_pll_set_rate()
252 	struct sam9x60_pll_core *core = to_sam9x60_pll_core(hw);  in sam9x60_frac_pll_set_rate_chg()  local
253 	struct sam9x60_frac *frac = to_sam9x60_frac(core);  in sam9x60_frac_pll_set_rate_chg()
254 	struct regmap *regmap = core->regmap;  in sam9x60_frac_pll_set_rate_chg()
259 	ret = sam9x60_frac_pll_compute_mul_frac(core, rate, parent_rate, true);  in sam9x60_frac_pll_set_rate_chg()
263 	spin_lock_irqsave(core->lock, irqflags);  in sam9x60_frac_pll_set_rate_chg()
266 			   core->id);  in sam9x60_frac_pll_set_rate_chg()
268 	cmul = (val & core->layout->mul_mask) >> core->layout->mul_shift;  in sam9x60_frac_pll_set_rate_chg()
269 	cfrac = (val & core->layout->frac_mask) >> core->layout->frac_shift;  in sam9x60_frac_pll_set_rate_chg()
275 		     (frac->mul << core->layout->mul_shift) |  in sam9x60_frac_pll_set_rate_chg()
276 		     (frac->frac << core->layout->frac_shift));  in sam9x60_frac_pll_set_rate_chg()
280 			   AT91_PMC_PLL_UPDT_UPDATE | core->id);  in sam9x60_frac_pll_set_rate_chg()
289 			   AT91_PMC_PLL_UPDT_UPDATE | core->id);  in sam9x60_frac_pll_set_rate_chg()
291 	while (!sam9x60_pll_ready(regmap, core->id))  in sam9x60_frac_pll_set_rate_chg()
295 	spin_unlock_irqrestore(core->lock, irqflags);  in sam9x60_frac_pll_set_rate_chg()
302 	struct sam9x60_pll_core *core = to_sam9x60_pll_core(hw);  in sam9x60_frac_pll_save_context()  local
303 	struct sam9x60_frac *frac = to_sam9x60_frac(core);  in sam9x60_frac_pll_save_context()
305 	frac->pms.status = sam9x60_pll_ready(core->regmap, core->id);  in sam9x60_frac_pll_save_context()
312 	struct sam9x60_pll_core *core = to_sam9x60_pll_core(hw);  in sam9x60_frac_pll_restore_context()  local
313 	struct sam9x60_frac *frac = to_sam9x60_frac(core);  in sam9x60_frac_pll_restore_context()
316 		sam9x60_frac_pll_set(core);  in sam9x60_frac_pll_restore_context()
342 static void sam9x60_div_pll_set_div(struct sam9x60_pll_core *core, u32 div,  in sam9x60_div_pll_set_div()  argument
345 	struct regmap *regmap = core->regmap;  in sam9x60_div_pll_set_div()
346 	u32 ena_msk = enable ? core->layout->endiv_mask : 0;  in sam9x60_div_pll_set_div()
347 	u32 ena_val = enable ? (1 << core->layout->endiv_shift) : 0;  in sam9x60_div_pll_set_div()
350 			   core->layout->div_mask | ena_msk,  in sam9x60_div_pll_set_div()
351 			   (div << core->layout->div_shift) | ena_val);  in sam9x60_div_pll_set_div()
355 			   AT91_PMC_PLL_UPDT_UPDATE | core->id);  in sam9x60_div_pll_set_div()
357 	while (!sam9x60_pll_ready(regmap, core->id))  in sam9x60_div_pll_set_div()
361 static int sam9x60_div_pll_set(struct sam9x60_pll_core *core)  in sam9x60_div_pll_set()  argument
363 	struct sam9x60_div *div = to_sam9x60_div(core);  in sam9x60_div_pll_set()
364 	struct regmap *regmap = core->regmap;  in sam9x60_div_pll_set()
368 	spin_lock_irqsave(core->lock, flags);  in sam9x60_div_pll_set()
370 			   AT91_PMC_PLL_UPDT_ID_MSK, core->id);  in sam9x60_div_pll_set()
372 	cdiv = (val & core->layout->div_mask) >> core->layout->div_shift;  in sam9x60_div_pll_set()
375 	if (!!(val & core->layout->endiv_mask) && cdiv == div->div)  in sam9x60_div_pll_set()
378 	sam9x60_div_pll_set_div(core, div->div, 1);  in sam9x60_div_pll_set()
381 	spin_unlock_irqrestore(core->lock, flags);  in sam9x60_div_pll_set()
388 	struct sam9x60_pll_core *core = to_sam9x60_pll_core(hw);  in sam9x60_div_pll_prepare()  local
390 	return sam9x60_div_pll_set(core);  in sam9x60_div_pll_prepare()
395 	struct sam9x60_pll_core *core = to_sam9x60_pll_core(hw);  in sam9x60_div_pll_unprepare()  local
396 	struct regmap *regmap = core->regmap;  in sam9x60_div_pll_unprepare()
399 	spin_lock_irqsave(core->lock, flags);  in sam9x60_div_pll_unprepare()
402 			   AT91_PMC_PLL_UPDT_ID_MSK, core->id);  in sam9x60_div_pll_unprepare()
405 			   core->layout->endiv_mask, 0);  in sam9x60_div_pll_unprepare()
409 			   AT91_PMC_PLL_UPDT_UPDATE | core->id);  in sam9x60_div_pll_unprepare()
411 	spin_unlock_irqrestore(core->lock, flags);  in sam9x60_div_pll_unprepare()
416 	struct sam9x60_pll_core *core = to_sam9x60_pll_core(hw);  in sam9x60_div_pll_is_prepared()  local
417 	struct regmap *regmap = core->regmap;  in sam9x60_div_pll_is_prepared()
421 	spin_lock_irqsave(core->lock, flags);  in sam9x60_div_pll_is_prepared()
424 			   AT91_PMC_PLL_UPDT_ID_MSK, core->id);  in sam9x60_div_pll_is_prepared()
427 	spin_unlock_irqrestore(core->lock, flags);  in sam9x60_div_pll_is_prepared()
429 	return !!(val & core->layout->endiv_mask);  in sam9x60_div_pll_is_prepared()
435 	struct sam9x60_pll_core *core = to_sam9x60_pll_core(hw);  in sam9x60_div_pll_recalc_rate()  local
436 	struct sam9x60_div *div = to_sam9x60_div(core);  in sam9x60_div_pll_recalc_rate()
447 static long sam9x60_div_pll_compute_div(struct sam9x60_pll_core *core,  in sam9x60_div_pll_compute_div()  argument
452 							core->characteristics;  in sam9x60_div_pll_compute_div()
453 	struct clk_hw *parent = clk_hw_get_parent(&core->hw);  in sam9x60_div_pll_compute_div()
465 	for (divid = 1; divid < core->layout->div_mask; divid++) {  in sam9x60_div_pll_compute_div()
493 	struct sam9x60_pll_core *core = to_sam9x60_pll_core(hw);  in sam9x60_div_pll_round_rate()  local
495 	return sam9x60_div_pll_compute_div(core, parent_rate, rate);  in sam9x60_div_pll_round_rate()
501 	struct sam9x60_pll_core *core = to_sam9x60_pll_core(hw);  in sam9x60_div_pll_set_rate()  local
502 	struct sam9x60_div *div = to_sam9x60_div(core);  in sam9x60_div_pll_set_rate()
512 	struct sam9x60_pll_core *core = to_sam9x60_pll_core(hw);  in sam9x60_div_pll_set_rate_chg()  local
513 	struct sam9x60_div *div = to_sam9x60_div(core);  in sam9x60_div_pll_set_rate_chg()
514 	struct regmap *regmap = core->regmap;  in sam9x60_div_pll_set_rate_chg()
520 	spin_lock_irqsave(core->lock, irqflags);  in sam9x60_div_pll_set_rate_chg()
522 			   core->id);  in sam9x60_div_pll_set_rate_chg()
524 	cdiv = (val & core->layout->div_mask) >> core->layout->div_shift;  in sam9x60_div_pll_set_rate_chg()
530 	sam9x60_div_pll_set_div(core, div->div, 0);  in sam9x60_div_pll_set_rate_chg()
533 	spin_unlock_irqrestore(core->lock, irqflags);  in sam9x60_div_pll_set_rate_chg()
540 	struct sam9x60_pll_core *core = to_sam9x60_pll_core(hw);  in sam9x60_div_pll_save_context()  local
541 	struct sam9x60_div *div = to_sam9x60_div(core);  in sam9x60_div_pll_save_context()
550 	struct sam9x60_pll_core *core = to_sam9x60_pll_core(hw);  in sam9x60_div_pll_restore_context()  local
551 	struct sam9x60_div *div = to_sam9x60_div(core);  in sam9x60_div_pll_restore_context()
554 		sam9x60_div_pll_set(core);  in sam9x60_div_pll_restore_context()
561 	struct sam9x60_pll_core core = div->core;  in sam9x60_div_pll_notifier_fn()  local
562 	struct regmap *regmap = core.regmap;  in sam9x60_div_pll_notifier_fn()
576 	spin_lock_irqsave(core.lock, irqflags);  in sam9x60_div_pll_notifier_fn()
578 			   core.id);  in sam9x60_div_pll_notifier_fn()
580 	cdiv = (val & core.layout->div_mask) >> core.layout->div_shift;  in sam9x60_div_pll_notifier_fn()
586 	sam9x60_div_pll_set_div(&core, div->div, 0);  in sam9x60_div_pll_notifier_fn()
590 	spin_unlock_irqrestore(core.lock, irqflags);  in sam9x60_div_pll_notifier_fn()
665 	frac->core.id = id;  in sam9x60_clk_register_frac_pll()
666 	frac->core.hw.init = &init;  in sam9x60_clk_register_frac_pll()
667 	frac->core.characteristics = characteristics;  in sam9x60_clk_register_frac_pll()
668 	frac->core.layout = layout;  in sam9x60_clk_register_frac_pll()
669 	frac->core.regmap = regmap;  in sam9x60_clk_register_frac_pll()
670 	frac->core.lock = lock;  in sam9x60_clk_register_frac_pll()
672 	spin_lock_irqsave(frac->core.lock, irqflags);  in sam9x60_clk_register_frac_pll()
693 		ret = sam9x60_frac_pll_compute_mul_frac(&frac->core,  in sam9x60_clk_register_frac_pll()
701 	spin_unlock_irqrestore(frac->core.lock, irqflags);  in sam9x60_clk_register_frac_pll()
703 	hw = &frac->core.hw;  in sam9x60_clk_register_frac_pll()
713 	spin_unlock_irqrestore(frac->core.lock, irqflags);  in sam9x60_clk_register_frac_pll()
760 	div->core.id = id;  in sam9x60_clk_register_div_pll()
761 	div->core.hw.init = &init;  in sam9x60_clk_register_div_pll()
762 	div->core.characteristics = characteristics;  in sam9x60_clk_register_div_pll()
763 	div->core.layout = layout;  in sam9x60_clk_register_div_pll()
764 	div->core.regmap = regmap;  in sam9x60_clk_register_div_pll()
765 	div->core.lock = lock;  in sam9x60_clk_register_div_pll()
768 	spin_lock_irqsave(div->core.lock, irqflags);  in sam9x60_clk_register_div_pll()
775 	spin_unlock_irqrestore(div->core.lock, irqflags);  in sam9x60_clk_register_div_pll()
777 	hw = &div->core.hw;  in sam9x60_clk_register_div_pll()