1 // SPDX-License-Identifier: GPL-2.0+
6 // Author: David Liu <liuwei@actions-semi.com>
11 #include <linux/clk-provider.h>
16 #include "owl-pll.h"
22 	mul = DIV_ROUND_CLOSEST(rate, pll_hw->bfreq);  in owl_pll_calculate_mul()
23 	if (mul < pll_hw->min_mul)  in owl_pll_calculate_mul()
24 		mul = pll_hw->min_mul;  in owl_pll_calculate_mul()
25 	else if (mul > pll_hw->max_mul)  in owl_pll_calculate_mul()
26 		mul = pll_hw->max_mul;  in owl_pll_calculate_mul()
36 	for (clkt = table; clkt->rate; clkt++)  in _get_table_rate()
37 		if (clkt->val == val)  in _get_table_rate()
38 			return clkt->rate;  in _get_table_rate()
48 	for (clkt = table; clkt->rate; clkt++) {  in _get_pll_table()
49 		if (clkt->rate == rate) {  in _get_pll_table()
52 		} else if (clkt->rate < rate)  in _get_pll_table()
63 	struct owl_pll_hw *pll_hw = &pll->pll_hw;  in owl_pll_determine_rate()
67 	if (pll_hw->table) {  in owl_pll_determine_rate()
68 		clkt = _get_pll_table(pll_hw->table, req->rate);  in owl_pll_determine_rate()
69 		req->rate = clkt->rate;  in owl_pll_determine_rate()
74 	/* fixed frequency */  in owl_pll_determine_rate()
75 	if (pll_hw->width == 0) {  in owl_pll_determine_rate()
76 		req->rate = pll_hw->bfreq;  in owl_pll_determine_rate()
81 	mul = owl_pll_calculate_mul(pll_hw, req->rate);  in owl_pll_determine_rate()
83 	req->rate = pll_hw->bfreq * mul;  in owl_pll_determine_rate()
92 	struct owl_pll_hw *pll_hw = &pll->pll_hw;  in owl_pll_recalc_rate()
93 	const struct owl_clk_common *common = &pll->common;  in owl_pll_recalc_rate()
96 	if (pll_hw->table) {  in owl_pll_recalc_rate()
97 		regmap_read(common->regmap, pll_hw->reg, &val);  in owl_pll_recalc_rate()
99 		val = val >> pll_hw->shift;  in owl_pll_recalc_rate()
102 		return _get_table_rate(pll_hw->table, val);  in owl_pll_recalc_rate()
105 	/* fixed frequency */  in owl_pll_recalc_rate()
106 	if (pll_hw->width == 0)  in owl_pll_recalc_rate()
107 		return pll_hw->bfreq;  in owl_pll_recalc_rate()
109 	regmap_read(common->regmap, pll_hw->reg, &val);  in owl_pll_recalc_rate()
111 	val = val >> pll_hw->shift;  in owl_pll_recalc_rate()
114 	return pll_hw->bfreq * val;  in owl_pll_recalc_rate()
120 	struct owl_pll_hw *pll_hw = &pll->pll_hw;  in owl_pll_is_enabled()
121 	const struct owl_clk_common *common = &pll->common;  in owl_pll_is_enabled()
124 	regmap_read(common->regmap, pll_hw->reg, &reg);  in owl_pll_is_enabled()
126 	return !!(reg & BIT(pll_hw->bit_idx));  in owl_pll_is_enabled()
130 		       const struct owl_pll_hw *pll_hw, bool enable)  in owl_pll_set()  argument
134 	regmap_read(common->regmap, pll_hw->reg, &reg);  in owl_pll_set()
136 	if (enable)  in owl_pll_set()
137 		reg |= BIT(pll_hw->bit_idx);  in owl_pll_set()
139 		reg &= ~BIT(pll_hw->bit_idx);  in owl_pll_set()
141 	regmap_write(common->regmap, pll_hw->reg, reg);  in owl_pll_set()
147 	const struct owl_clk_common *common = &pll->common;  in owl_pll_enable()
149 	owl_pll_set(common, &pll->pll_hw, true);  in owl_pll_enable()
157 	const struct owl_clk_common *common = &pll->common;  in owl_pll_disable()
159 	owl_pll_set(common, &pll->pll_hw, false);  in owl_pll_disable()
166 	struct owl_pll_hw *pll_hw = &pll->pll_hw;  in owl_pll_set_rate()
167 	const struct owl_clk_common *common = &pll->common;  in owl_pll_set_rate()
171 	/* fixed frequency */  in owl_pll_set_rate()
172 	if (pll_hw->width == 0)  in owl_pll_set_rate()
175 	if (pll_hw->table) {  in owl_pll_set_rate()
176 		clkt = _get_pll_table(pll_hw->table, rate);  in owl_pll_set_rate()
177 		val = clkt->val;  in owl_pll_set_rate()
182 	regmap_read(common->regmap, pll_hw->reg, &reg);  in owl_pll_set_rate()
185 	reg |= val << pll_hw->shift;  in owl_pll_set_rate()
187 	regmap_write(common->regmap, pll_hw->reg, reg);  in owl_pll_set_rate()
189 	udelay(pll_hw->delay);  in owl_pll_set_rate()
195 	.enable = owl_pll_enable,