703 	int howmany = 0, bufpos = 0, bufidx = 0, bufferdone = 0;  in xillybus_read()  local
724 			bufidx = channel->wr_host_buf_idx;  in xillybus_read()
726 			howmany = ((channel->wr_buffers[bufidx]->end_offset  in xillybus_read()
741 				if (bufidx == channel->wr_fpga_buf_idx) {  in xillybus_read()
747 				if (bufidx >= (channel->num_wr_buffers - 1))  in xillybus_read()
774 							channel->wr_buffers[bufidx]->dma_addr,  in xillybus_read()
780 				    channel->wr_buffers[bufidx]->addr  in xillybus_read()
789 							   channel->wr_buffers[bufidx]->dma_addr,  in xillybus_read()
802 					  (bufidx << 12),  in xillybus_read()
1020 	int bufidx, bufidx_minus1;  in xillybus_myflush()  local
1040 	bufidx = channel->rd_host_buf_idx;  in xillybus_myflush()
1042 	bufidx_minus1 = (bufidx == 0) ?  in xillybus_myflush()
1044 		bufidx - 1;  in xillybus_myflush()
1054 		unsigned char *tail = channel->rd_buffers[bufidx]->addr +  in xillybus_myflush()
1082 		if (bufidx == channel->rd_fpga_buf_idx)  in xillybus_myflush()
1086 		if (bufidx >= (channel->num_rd_buffers - 1))  in xillybus_myflush()
1092 					   channel->rd_buffers[bufidx]->dma_addr,  in xillybus_myflush()
1103 			  (bufidx << 12),  in xillybus_myflush()
1107 	} else if (bufidx == 0) {  in xillybus_myflush()
1108 		bufidx = channel->num_rd_buffers - 1;  in xillybus_myflush()
1110 		bufidx--;  in xillybus_myflush()
1129 		if (bufidx != channel->rd_fpga_buf_idx)  in xillybus_myflush()
1213 	int howmany = 0, bufpos = 0, bufidx = 0, bufferdone = 0;  in xillybus_write()  local
1231 			bufidx = channel->rd_host_buf_idx;  in xillybus_write()
1270 						rd_buffers[bufidx]->addr +  in xillybus_write()
1281 				if (bufidx == channel->rd_fpga_buf_idx)  in xillybus_write()
1284 				if (bufidx >= (channel->num_rd_buffers - 1))  in xillybus_write()
1305 				channel->rd_buffers[bufidx]->addr;  in xillybus_write()
1311 							channel->rd_buffers[bufidx]->dma_addr,  in xillybus_write()
1323 				    channel->rd_buffers[bufidx]->addr + bufpos,  in xillybus_write()
1332 							   channel->rd_buffers[bufidx]->dma_addr,  in xillybus_write()
1344 					  (bufidx << 12),  in xillybus_write()