Lines Matching refs:nvidia_private
36 } nvidia_private;
124 pci_write_config_dword(nvidia_private.dev_2, NVIDIA_2_APBASE, apbase);
125 pci_write_config_dword(nvidia_private.dev_2, NVIDIA_2_APLIMIT, aplimit);
126 pci_write_config_dword(nvidia_private.dev_3, NVIDIA_3_APBASE, apbase);
127 pci_write_config_dword(nvidia_private.dev_3, NVIDIA_3_APLIMIT, aplimit);
133 nvidia_private.num_active_entries = current_size->num_entries;
134 nvidia_private.pg_offset = 0;
137 nvidia_private.num_active_entries /= (64 / current_size->size);
138 nvidia_private.pg_offset = (apbase & (64 * 1024 * 1024 - 1) &
144 pci_write_config_dword(nvidia_private.dev_2, NVIDIA_2_ATTBASE(i),
149 pci_read_config_dword(nvidia_private.dev_2, NVIDIA_2_GARTCTRL, &temp);
150 pci_write_config_dword(nvidia_private.dev_2, NVIDIA_2_GARTCTRL, temp | 0x11);
158 nvidia_private.aperture =
161 if (!nvidia_private.aperture)
177 pci_read_config_dword(nvidia_private.dev_2, NVIDIA_2_GARTCTRL, &temp);
178 pci_write_config_dword(nvidia_private.dev_2, NVIDIA_2_GARTCTRL, temp & ~(0x11));
181 iounmap((void __iomem *) nvidia_private.aperture);
215 (nvidia_private.num_active_entries - agp_memory_reserved/PAGE_SIZE))
219 if (!PGE_EMPTY(agp_bridge, readl(agp_bridge->gatt_table+nvidia_private.pg_offset+j)))
230 agp_bridge->gatt_table+nvidia_private.pg_offset+j);
234 readl(agp_bridge->gatt_table+nvidia_private.pg_offset+j - 1);
255 writel(agp_bridge->scratch_page, agp_bridge->gatt_table+nvidia_private.pg_offset+i);
270 if (nvidia_private.wbc_mask) {
271 pci_read_config_dword(nvidia_private.dev_1, NVIDIA_1_WBC, &wbc_reg);
272 wbc_reg |= nvidia_private.wbc_mask;
273 pci_write_config_dword(nvidia_private.dev_1, NVIDIA_1_WBC, wbc_reg);
277 pci_read_config_dword(nvidia_private.dev_1,
283 } while (wbc_reg & nvidia_private.wbc_mask);
288 temp = readl(nvidia_private.aperture+(i * PAGE_SIZE / sizeof(u32)));
290 temp = readl(nvidia_private.aperture+(i * PAGE_SIZE / sizeof(u32)));
344 nvidia_private.dev_1 =
348 nvidia_private.dev_2 =
352 nvidia_private.dev_3 =
357 if (!nvidia_private.dev_1 || !nvidia_private.dev_2 || !nvidia_private.dev_3) {
370 nvidia_private.wbc_mask = 0x00010000;
374 nvidia_private.wbc_mask = 0x80000000;
387 bridge->dev_private_data = &nvidia_private;
458 pci_dev_put(nvidia_private.dev_1);
459 pci_dev_put(nvidia_private.dev_2);
460 pci_dev_put(nvidia_private.dev_3);