Lines Matching +full:cpu +full:- +full:ports
17 #include <linux/arm-cci.h>
49 {.compatible = "arm,cci-400", .data = CCI400_PORTS_DATA },
52 { .compatible = "arm,cci-500", },
53 { .compatible = "arm,cci-550", },
59 OF_DEV_AUXDATA("arm,cci-400-pmu", 0, NULL, &cci_ctrl_base),
60 OF_DEV_AUXDATA("arm,cci-400-pmu,r0", 0, NULL, &cci_ctrl_base),
61 OF_DEV_AUXDATA("arm,cci-400-pmu,r1", 0, NULL, &cci_ctrl_base),
62 OF_DEV_AUXDATA("arm,cci-500-pmu,r0", 0, NULL, &cci_ctrl_base),
63 OF_DEV_AUXDATA("arm,cci-550-pmu,r0", 0, NULL, &cci_ctrl_base),
67 #define DRIVER_NAME "ARM-CCI"
72 return -ENODEV; in cci_platform_probe()
74 return of_platform_populate(pdev->dev.of_node, NULL, in cci_platform_probe()
75 arm_cci_auxdata, &pdev->dev); in cci_platform_probe()
113 static struct cci_ace_port *ports; variable
124 * Code disabling CCI cpu ports runs with D-cache invalidated
134 port->port = PORT_VALID | index; in init_cpu_port()
135 port->mpidr = mpidr; in init_cpu_port()
140 return !!(port->port & PORT_VALID); in cpu_port_is_valid()
145 return port->mpidr == (mpidr & MPIDR_HWID_BITMASK); in cpu_port_match()
151 * __cci_ace_get_port - Function to retrieve the port index connected to
152 * a cpu or device.
154 * @dn: device node of the device to look-up
158 * - CCI port index if success
159 * - -ENODEV if failure
167 cci_portn = of_parse_phandle(dn, "cci-control-port", 0); in __cci_ace_get_port()
169 ace_match = ports[i].type == type; in __cci_ace_get_port()
170 if (ace_match && cci_portn == ports[i].dn) in __cci_ace_get_port()
173 return -ENODEV; in __cci_ace_get_port()
184 int port, cpu; in cci_ace_init_ports() local
188 * Port index look-up speeds up the function disabling ports by CPU, in cci_ace_init_ports()
194 for_each_possible_cpu(cpu) { in cci_ace_init_ports()
195 /* too early to use cpu->of_node */ in cci_ace_init_ports()
196 cpun = of_get_cpu_node(cpu, NULL); in cci_ace_init_ports()
198 if (WARN(!cpun, "Missing cpu device node\n")) in cci_ace_init_ports()
205 init_cpu_port(&cpu_port[cpu], port, cpu_logical_map(cpu)); in cci_ace_init_ports()
208 for_each_possible_cpu(cpu) { in cci_ace_init_ports()
209 WARN(!cpu_port_is_valid(&cpu_port[cpu]), in cci_ace_init_ports()
210 "CPU %u does not have an associated CCI port\n", in cci_ace_init_ports()
211 cpu); in cci_ace_init_ports()
217 * They are called by low-level power management code to disable slave
221 * no explicit locking since they may run with D-cache disabled, so normal
228 * cci_port_control() - function to control a CCI port
235 void __iomem *base = ports[port].base; in cci_port_control()
251 * cci_disable_port_by_cpu() - function to disable a CCI port by CPU
254 * @mpidr: mpidr of the CPU whose CCI port should be disabled
256 * Disabling a CCI port for a CPU implies disabling the CCI port
257 * controlling that CPU cluster. Code disabling CPU CCI ports
258 * must make sure that the CPU running the code is the last active CPU
263 * -ENODEV on port look-up failure
267 int cpu; in cci_disable_port_by_cpu() local
269 for (cpu = 0; cpu < nr_cpu_ids; cpu++) { in cci_disable_port_by_cpu()
270 is_valid = cpu_port_is_valid(&cpu_port[cpu]); in cci_disable_port_by_cpu()
271 if (is_valid && cpu_port_match(&cpu_port[cpu], mpidr)) { in cci_disable_port_by_cpu()
272 cci_port_control(cpu_port[cpu].port, false); in cci_disable_port_by_cpu()
276 return -ENODEV; in cci_disable_port_by_cpu()
281 * cci_enable_port_for_self() - enable a CCI port for calling CPU
283 * Enabling a CCI port for the calling CPU implies enabling the CCI
284 * port controlling that CPU's cluster. Caller must make sure that the
285 * CPU running the code is the first active CPU in the cluster and all
286 * other CPUs are quiescent in a low power state or waiting for this CPU
301 " .arch armv7-a\n" in cci_enable_port_for_self()
324 /* CCI port not found -- cheaply try to stall this CPU */ in cci_enable_port_for_self()
330 /* Use matched port index to look up the corresponding ports entry */ in cci_enable_port_for_self()
334 " sub r1, r1, r0 @ virt - phys \n" in cci_enable_port_for_self()
335 " ldr r0, [r0, r2] @ *(&ports) \n" in cci_enable_port_for_self()
337 " mla r0, r2, r3, r0 @ &ports[index] \n" in cci_enable_port_for_self()
357 "5: .word cpu_port - . \n" in cci_enable_port_for_self()
359 " .word ports - 6b \n" in cci_enable_port_for_self()
360 "7: .word cci_ctrl_phys - . \n" in cci_enable_port_for_self()
377 * __cci_control_port_by_device() - function to control a CCI port by device
386 * -ENODEV on port look-up failure
393 return -ENODEV; in __cci_control_port_by_device()
396 if (WARN_ONCE(port < 0, "node %pOF ACE lite port look-up failure\n", in __cci_control_port_by_device()
398 return -ENODEV; in __cci_control_port_by_device()
405 * __cci_control_port_by_index() - function to control a CCI port by port index
412 * -ENODEV on port index out of range
413 * -EPERM if operation carried out on an ACE PORT
417 if (port >= nb_cci_ports || ports[port].type == ACE_INVALID_PORT) in __cci_control_port_by_index()
418 return -ENODEV; in __cci_control_port_by_index()
420 * CCI control for ports connected to CPUS is extremely fragile in __cci_control_port_by_index()
423 * indexing is therefore disabled for ACE ports. in __cci_control_port_by_index()
425 if (ports[port].type == ACE_PORT) in __cci_control_port_by_index()
426 return -EPERM; in __cci_control_port_by_index()
434 {.compatible = "arm,cci-400-ctrl-if", },
448 cci_config = of_match_node(arm_cci_matches, np)->data; in cci_probe_ports()
450 return -ENODEV; in cci_probe_ports()
452 nb_cci_ports = cci_config->nb_ace + cci_config->nb_ace_lite; in cci_probe_ports()
454 ports = kcalloc(nb_cci_ports, sizeof(*ports), GFP_KERNEL); in cci_probe_ports()
455 if (!ports) in cci_probe_ports()
456 return -ENOMEM; in cci_probe_ports()
467 if (of_property_read_string(cp, "interface-type", in cci_probe_ports()
469 WARN(1, "node %pOF missing interface-type property\n", in cci_probe_ports()
474 if (!is_ace && strcmp(match_str, "ace-lite")) { in cci_probe_ports()
475 WARN(1, "node %pOF containing invalid interface-type property, skipping it\n", in cci_probe_ports()
482 ports[i].base = ioremap(res.start, resource_size(&res)); in cci_probe_ports()
483 ports[i].phys = res.start; in cci_probe_ports()
485 if (ret || !ports[i].base) { in cci_probe_ports()
491 if (WARN_ON(nb_ace >= cci_config->nb_ace)) in cci_probe_ports()
493 ports[i].type = ACE_PORT; in cci_probe_ports()
496 if (WARN_ON(nb_ace_lite >= cci_config->nb_ace_lite)) in cci_probe_ports()
498 ports[i].type = ACE_LITE_PORT; in cci_probe_ports()
501 ports[i].dn = cp; in cci_probe_ports()
509 return -ENODEV; in cci_probe_ports()
511 /* initialize a stashed array of ACE ports to speed-up look-up */ in cci_probe_ports()
515 * Multi-cluster systems may need this data when non-coherent, during in cci_probe_ports()
516 * cluster power-up/power-down. Make sure it reaches main memory. in cci_probe_ports()
520 sync_cache_w(&ports); in cci_probe_ports()
522 __sync_cache_range_w(ports, sizeof(*ports) * nb_cci_ports); in cci_probe_ports()
542 return -ENODEV; in cci_probe()
551 return -ENXIO; in cci_probe()
557 static int cci_init_status = -EAGAIN;
562 if (cci_init_status != -EAGAIN) in cci_init()
566 if (cci_init_status == -EAGAIN) in cci_init()