Lines Matching +full:queue +full:- +full:rx

1 /* SPDX-License-Identifier: GPL-2.0-or-later */
55 /* Registers for MSI-X */
104  * Host-Device interface is active
105  * Host-Device interface is inactive(as reflected by IPC_SLEEP_CONTROL_CSR_AD)
106  * Host-Device interface is inactive(as reflected by IPC_SLEEP_CONTROL_CSR_AD)
146 /* Minimum and Maximum number of MSI-X Vector
163 /* The number of descriptors in RX queues */
166 /* Number of Queue for TX and RX
175 /* The size of DMA buffer for TX and RX in bytes */
192  * All members are write-only for host and read-only for device.
205  * @addr_tfdq: Address of TFD Queue(tx)
206  * @addr_urbdq0: Address of URBD Queue(tx)
207  * @num_tfdq: Number of TFD in TFD Queue(tx)
208  * @num_urbdq0: Number of URBD in URBD Queue(tx)
209  * @tfdq_db_vec: Queue number of TFD
210  * @urbdq0_db_vec: Queue number of URBD
211  * @addr_frbdq: Address of FRBD Queue(rx)
212  * @addr_urbdq1: Address of URBD Queue(rx)
213  * @num_frbdq: Number of FRBD in FRBD Queue(rx)
214  * @frbdq_db_vec: Queue number of FRBD
215  * @num_urbdq1: Number of URBD in URBD Queue(rx)
216  * @urbdq_db_vec: Queue number of URBDQ1
217  * @tr_msi_vec: Transfer Ring MSI-X Vector
218  * @cr_msi_vec: Completion Ring MSI-X Vector
291  * @num_txq: Queue index of TFD Queue
303 /* FRB Descriptor for RX
304  * @tag: RX buffer tag (index of RX buffer queue)
314 /* URB Descriptor for RX
325 /* RFH header in RX packet
327  * @rxq: RX Queue number
359 /* Structure for TX Queue
379 /* Structure for RX Queue
434  * @irq_lock: spinlock for MSI-X
435  * @hci_rx_lock: spinlock for HCI RX flow
437  * @msix_entries: array of MSI-X entries
438  * @msix_enabled: true if MSI-X is enabled;
451  * @workqueue: workqueue for RX work
452  * @rx_skb_q: SKB queue for RX packet
453  * @rx_work: RX work struct to process the RX packet in @rx_skb_q
460  * @txq: TX Queue struct
461  * @rxq: RX Queue struct
470 	/* lock used in MSI-X interrupt */
472 	/* lock to serialize rx events */
519 	return ioread32(data->base_addr + offset);  in btintel_pcie_rd_reg32()
525 	iowrite8(val, data->base_addr + offset);  in btintel_pcie_wr_reg8()
531 	iowrite32(val, data->base_addr + offset);  in btintel_pcie_wr_reg32()
539 	r = ioread32(data->base_addr + offset);  in btintel_pcie_set_reg_bits()
541 	iowrite32(r, data->base_addr + offset);  in btintel_pcie_set_reg_bits()
549 	r = ioread32(data->base_addr + offset);  in btintel_pcie_clr_reg_bits()
551 	iowrite32(r, data->base_addr + offset);  in btintel_pcie_clr_reg_bits()