Lines Matching defs:sw

274 	struct swim3 __iomem *sw = fs->swim3;
276 	out_8(&sw->select, RELAX);
278 		out_8(&sw->control_bis, SELECT);
280 		out_8(&sw->control_bic, SELECT);
281 	out_8(&sw->select, sel & CA_MASK);
286 	struct swim3 __iomem *sw = fs->swim3;
290 	out_8(&sw->select, sw->select | LSTRB);
292 	out_8(&sw->select, sw->select & ~LSTRB);
298 	struct swim3 __iomem *sw = fs->swim3;
303 	stat = in_8(&sw->status);
374 	struct swim3 __iomem *sw = fs->swim3;
377 	in_8(&sw->intr);		/* clear SEEN_SECTOR bit */
378 	in_8(&sw->error);
379 	out_8(&sw->intr_enable, SEEN_SECTOR);
380 	out_8(&sw->control_bis, DO_ACTION);
387 	struct swim3 __iomem *sw = fs->swim3;
391 		sw->nseek = n;
394 		sw->nseek = -n;
398 	in_8(&sw->error);
400 	out_8(&sw->intr_enable, SEEK_DONE);
401 	out_8(&sw->control_bis, DO_SEEK);
434 	struct swim3 __iomem *sw = fs->swim3;
456 	out_8(&sw->sector, fs->req_sector);
457 	out_8(&sw->nsect, n);
458 	out_8(&sw->gap3, 0);
474 	out_8(&sw->control_bic, DO_ACTION | WRITE_SECTORS);
475 	in_8(&sw->error);
476 	out_8(&sw->control_bic, DO_ACTION | WRITE_SECTORS);
478 		out_8(&sw->control_bis, WRITE_SECTORS);
479 	in_8(&sw->intr);
482 	out_8(&sw->intr_enable, TRANSFER_DONE);
483 	out_8(&sw->control_bis, DO_ACTION);
559 	struct swim3 __iomem *sw = fs->swim3;
566 	out_8(&sw->control_bic, DO_ACTION | WRITE_SECTORS);
567 	out_8(&sw->select, RELAX);
568 	out_8(&sw->intr_enable, 0);
583 	struct swim3 __iomem *sw = fs->swim3;
590 	out_8(&sw->control_bic, DO_SEEK);
591 	out_8(&sw->select, RELAX);
592 	out_8(&sw->intr_enable, 0);
602 	struct swim3 __iomem *sw = fs->swim3;
610 		out_8(&sw->select, RELAX);
615 	out_8(&sw->select, RELAX);
631 	struct swim3 __iomem *sw = fs->swim3;
644 	out_8(&sw->intr_enable, 0);
645 	out_8(&sw->control_bic, WRITE_SECTORS | DO_ACTION);
646 	out_8(&sw->select, RELAX);
658 	struct swim3 __iomem *sw = fs->swim3;
669 	intr = in_8(&sw->intr);
670 	err = (intr & ERROR_INTR)? in_8(&sw->error): 0;
677 			out_8(&sw->control_bic, DO_ACTION | WRITE_SECTORS);
678 			out_8(&sw->select, RELAX);
679 			out_8(&sw->intr_enable, 0);
682 			if (sw->ctrack == 0xff) {
694 			fs->cur_cyl = sw->ctrack;
695 			fs->cur_sector = sw->csect;
705 		if (sw->nseek == 0) {
706 			out_8(&sw->control_bic, DO_SEEK);
707 			out_8(&sw->select, RELAX);
708 			out_8(&sw->intr_enable, 0);
718 		out_8(&sw->intr_enable, 0);
726 		out_8(&sw->intr_enable, 0);
727 		out_8(&sw->control_bic, WRITE_SECTORS | DO_ACTION);
728 		out_8(&sw->select, RELAX);
929 	struct swim3 __iomem *sw = fs->swim3;
936 		out_8(&sw->setup, S_IBM_DRIVE | S_FCLK_DIV2);
937 		out_8(&sw->control_bic, 0xff);
938 		out_8(&sw->mode, 0x95);
940 		out_8(&sw->intr_enable, 0);
941 		out_8(&sw->control_bis, DRIVE_ENABLE | INTR_ENABLE);
982 			out_8(&sw->control_bic, DRIVE_ENABLE | INTR_ENABLE);
1010 	struct swim3 __iomem *sw = fs->swim3;
1019 		out_8(&sw->control_bic, 0xff);
1035 	struct swim3 __iomem *sw;
1042 	sw = fs->swim3;
1044 	out_8(&sw->intr_enable, 0);
1045 	out_8(&sw->control_bis, DRIVE_ENABLE);
1086 	struct swim3 __iomem *sw;
1091 	sw = fs->swim3;
1097 	out_8(&sw->intr_enable, 0);
1098 	in_8(&sw->intr);
1099 	in_8(&sw->error);