1 // SPDX-License-Identifier: GPL-2.0
32 	if (!map->num_reg_defaults_raw)  in regcache_hw_init()
33 		return -EINVAL;  in regcache_hw_init()
36 	for (count = 0, i = 0; i < map->num_reg_defaults_raw; i++)  in regcache_hw_init()
37 		if (regmap_readable(map, i * map->reg_stride) &&  in regcache_hw_init()
38 		    !regmap_volatile(map, i * map->reg_stride))  in regcache_hw_init()
41 	/* all registers are unreadable or volatile, so just bypass */  in regcache_hw_init()
43 		map->cache_bypass = true;  in regcache_hw_init()
47 	map->num_reg_defaults = count;  in regcache_hw_init()
48 	map->reg_defaults = kmalloc_array(count, sizeof(struct reg_default),  in regcache_hw_init()
50 	if (!map->reg_defaults)  in regcache_hw_init()
51 		return -ENOMEM;  in regcache_hw_init()
53 	if (!map->reg_defaults_raw) {  in regcache_hw_init()
54 		bool cache_bypass = map->cache_bypass;  in regcache_hw_init()
55 		dev_warn(map->dev, "No cache defaults, reading back from HW\n");  in regcache_hw_init()
57 		/* Bypass the cache access till data read from HW */  in regcache_hw_init()
58 		map->cache_bypass = true;  in regcache_hw_init()
59 		tmp_buf = kmalloc(map->cache_size_raw, GFP_KERNEL);  in regcache_hw_init()
61 			ret = -ENOMEM;  in regcache_hw_init()
65 				      map->cache_size_raw);  in regcache_hw_init()
66 		map->cache_bypass = cache_bypass;  in regcache_hw_init()
68 			map->reg_defaults_raw = tmp_buf;  in regcache_hw_init()
69 			map->cache_free = true;  in regcache_hw_init()
76 	for (i = 0, j = 0; i < map->num_reg_defaults_raw; i++) {  in regcache_hw_init()
77 		reg = i * map->reg_stride;  in regcache_hw_init()
85 		if (map->reg_defaults_raw) {  in regcache_hw_init()
86 			val = regcache_get_val(map, map->reg_defaults_raw, i);  in regcache_hw_init()
88 			bool cache_bypass = map->cache_bypass;  in regcache_hw_init()
90 			map->cache_bypass = true;  in regcache_hw_init()
92 			map->cache_bypass = cache_bypass;  in regcache_hw_init()
94 				dev_err(map->dev, "Failed to read %d: %d\n",  in regcache_hw_init()
100 		map->reg_defaults[j].reg = reg;  in regcache_hw_init()
101 		map->reg_defaults[j].def = val;  in regcache_hw_init()
108 	kfree(map->reg_defaults);  in regcache_hw_init()
119 	if (map->cache_type == REGCACHE_NONE) {  in regcache_init()
120 		if (config->reg_defaults || config->num_reg_defaults_raw)  in regcache_init()
121 			dev_warn(map->dev,  in regcache_init()
124 		map->cache_bypass = true;  in regcache_init()
128 	if (config->reg_defaults && !config->num_reg_defaults) {  in regcache_init()
129 		dev_err(map->dev,  in regcache_init()
131 		return -EINVAL;  in regcache_init()
134 	if (config->num_reg_defaults && !config->reg_defaults) {  in regcache_init()
135 		dev_err(map->dev,  in regcache_init()
137 		return -EINVAL;  in regcache_init()
140 	for (i = 0; i < config->num_reg_defaults; i++)  in regcache_init()
141 		if (config->reg_defaults[i].reg % map->reg_stride)  in regcache_init()
142 			return -EINVAL;  in regcache_init()
145 		if (cache_types[i]->type == map->cache_type)  in regcache_init()
149 		dev_err(map->dev, "Could not match cache type: %d\n",  in regcache_init()
150 			map->cache_type);  in regcache_init()
151 		return -EINVAL;  in regcache_init()
154 	map->num_reg_defaults = config->num_reg_defaults;  in regcache_init()
155 	map->num_reg_defaults_raw = config->num_reg_defaults_raw;  in regcache_init()
156 	map->reg_defaults_raw = config->reg_defaults_raw;  in regcache_init()
157 	map->cache_word_size = DIV_ROUND_UP(config->val_bits, 8);  in regcache_init()
158 	map->cache_size_raw = map->cache_word_size * config->num_reg_defaults_raw;  in regcache_init()
160 	map->cache = NULL;  in regcache_init()
161 	map->cache_ops = cache_types[i];  in regcache_init()
163 	if (!map->cache_ops->read ||  in regcache_init()
164 	    !map->cache_ops->write ||  in regcache_init()
165 	    !map->cache_ops->name)  in regcache_init()
166 		return -EINVAL;  in regcache_init()
172 	if (config->reg_defaults) {  in regcache_init()
173 		tmp_buf = kmemdup_array(config->reg_defaults, map->num_reg_defaults,  in regcache_init()
174 					sizeof(*map->reg_defaults), GFP_KERNEL);  in regcache_init()
176 			return -ENOMEM;  in regcache_init()
177 		map->reg_defaults = tmp_buf;  in regcache_init()
178 	} else if (map->num_reg_defaults_raw) {  in regcache_init()
186 		if (map->cache_bypass)  in regcache_init()
190 	if (!map->max_register_is_set && map->num_reg_defaults_raw) {  in regcache_init()
191 		map->max_register = (map->num_reg_defaults_raw  - 1) * map->reg_stride;  in regcache_init()
192 		map->max_register_is_set = true;  in regcache_init()
195 	if (map->cache_ops->init) {  in regcache_init()
196 		dev_dbg(map->dev, "Initializing %s cache\n",  in regcache_init()
197 			map->cache_ops->name);  in regcache_init()
198 		map->lock(map->lock_arg);  in regcache_init()
199 		ret = map->cache_ops->init(map);  in regcache_init()
200 		map->unlock(map->lock_arg);  in regcache_init()
207 	kfree(map->reg_defaults);  in regcache_init()
208 	if (map->cache_free)  in regcache_init()
209 		kfree(map->reg_defaults_raw);  in regcache_init()
216 	if (map->cache_type == REGCACHE_NONE)  in regcache_exit()
219 	BUG_ON(!map->cache_ops);  in regcache_exit()
221 	kfree(map->reg_defaults);  in regcache_exit()
222 	if (map->cache_free)  in regcache_exit()
223 		kfree(map->reg_defaults_raw);  in regcache_exit()
225 	if (map->cache_ops->exit) {  in regcache_exit()
226 		dev_dbg(map->dev, "Destroying %s cache\n",  in regcache_exit()
227 			map->cache_ops->name);  in regcache_exit()
228 		map->lock(map->lock_arg);  in regcache_exit()
229 		map->cache_ops->exit(map);  in regcache_exit()
230 		map->unlock(map->lock_arg);  in regcache_exit()
235  * regcache_read - Fetch the value of a given register from the cache.
248 	if (map->cache_type == REGCACHE_NONE)  in regcache_read()
249 		return -EINVAL;  in regcache_read()
251 	BUG_ON(!map->cache_ops);  in regcache_read()
254 		ret = map->cache_ops->read(map, reg, value);  in regcache_read()
262 	return -EINVAL;  in regcache_read()
266  * regcache_write - Set the value of a given register in the cache.
277 	if (map->cache_type == REGCACHE_NONE)  in regcache_write()
280 	BUG_ON(!map->cache_ops);  in regcache_write()
283 		return map->cache_ops->write(map, reg, value);  in regcache_write()
297 	if (!map->no_sync_defaults)  in regcache_reg_needs_sync()
302 	if (ret >= 0 && val == map->reg_defaults[ret].def)  in regcache_reg_needs_sync()
312 	for (reg = min; reg <= max; reg += map->reg_stride) {  in regcache_default_sync()
321 		if (ret == -ENOENT)  in regcache_default_sync()
329 		map->cache_bypass = true;  in regcache_default_sync()
331 		map->cache_bypass = false;  in regcache_default_sync()
333 			dev_err(map->dev, "Unable to sync register %#x. %d\n",  in regcache_default_sync()
337 		dev_dbg(map->dev, "Synced register %#x, value %#x\n", reg, val);  in regcache_default_sync()
349  * regcache_sync - Sync the register cache with the hardware.
364 	bool bypass;  in regcache_sync()  local
367 	if (WARN_ON(map->cache_type == REGCACHE_NONE))  in regcache_sync()
368 		return -EINVAL;  in regcache_sync()
370 	BUG_ON(!map->cache_ops);  in regcache_sync()
372 	map->lock(map->lock_arg);  in regcache_sync()
373 	/* Remember the initial bypass state */  in regcache_sync()
374 	bypass = map->cache_bypass;  in regcache_sync()
375 	dev_dbg(map->dev, "Syncing %s cache\n",  in regcache_sync()
376 		map->cache_ops->name);  in regcache_sync()
377 	name = map->cache_ops->name;  in regcache_sync()
380 	if (!map->cache_dirty)  in regcache_sync()
384 	map->cache_bypass = true;  in regcache_sync()
385 	for (i = 0; i < map->patch_regs; i++) {  in regcache_sync()
386 		ret = _regmap_write(map, map->patch[i].reg, map->patch[i].def);  in regcache_sync()
388 			dev_err(map->dev, "Failed to write %x = %x: %d\n",  in regcache_sync()
389 				map->patch[i].reg, map->patch[i].def, ret);  in regcache_sync()
393 	map->cache_bypass = false;  in regcache_sync()
395 	if (map->cache_ops->sync)  in regcache_sync()
396 		ret = map->cache_ops->sync(map, 0, map->max_register);  in regcache_sync()
398 		ret = regcache_default_sync(map, 0, map->max_register);  in regcache_sync()
401 		map->cache_dirty = false;  in regcache_sync()
404 	/* Restore the bypass state */  in regcache_sync()
405 	map->cache_bypass = bypass;  in regcache_sync()
406 	map->no_sync_defaults = false;  in regcache_sync()
414 	rb_for_each(node, NULL, &map->range_tree, rbtree_all) {  in regcache_sync()
419 		if (regcache_read(map, this->selector_reg, &i) != 0)  in regcache_sync()
422 		ret = _regmap_write(map, this->selector_reg, i);  in regcache_sync()
424 			dev_err(map->dev, "Failed to write %x = %x: %d\n",  in regcache_sync()
425 				this->selector_reg, i, ret);  in regcache_sync()
430 	map->unlock(map->lock_arg);  in regcache_sync()
441  * regcache_sync_region - Sync part  of the register cache with the hardware.
447  * Write all non-default register values in the specified region to
457 	bool bypass;  in regcache_sync_region()  local
459 	if (WARN_ON(map->cache_type == REGCACHE_NONE))  in regcache_sync_region()
460 		return -EINVAL;  in regcache_sync_region()
462 	BUG_ON(!map->cache_ops);  in regcache_sync_region()
464 	map->lock(map->lock_arg);  in regcache_sync_region()
466 	/* Remember the initial bypass state */  in regcache_sync_region()
467 	bypass = map->cache_bypass;  in regcache_sync_region()
469 	name = map->cache_ops->name;  in regcache_sync_region()
470 	dev_dbg(map->dev, "Syncing %s cache from %d-%d\n", name, min, max);  in regcache_sync_region()
474 	if (!map->cache_dirty)  in regcache_sync_region()
477 	map->async = true;  in regcache_sync_region()
479 	if (map->cache_ops->sync)  in regcache_sync_region()
480 		ret = map->cache_ops->sync(map, min, max);  in regcache_sync_region()
485 	/* Restore the bypass state */  in regcache_sync_region()
486 	map->cache_bypass = bypass;  in regcache_sync_region()
487 	map->async = false;  in regcache_sync_region()
488 	map->no_sync_defaults = false;  in regcache_sync_region()
489 	map->unlock(map->lock_arg);  in regcache_sync_region()
500  * regcache_drop_region - Discard part of the register cache
515 	if (!map->cache_ops || !map->cache_ops->drop)  in regcache_drop_region()
516 		return -EINVAL;  in regcache_drop_region()
518 	map->lock(map->lock_arg);  in regcache_drop_region()
522 	ret = map->cache_ops->drop(map, min, max);  in regcache_drop_region()
524 	map->unlock(map->lock_arg);  in regcache_drop_region()
531  * regcache_cache_only - Put a register map into cache only mode
534  * @enable: flag if changes should be written to the hardware
542 void regcache_cache_only(struct regmap *map, bool enable)  in regcache_cache_only()  argument
544 	map->lock(map->lock_arg);  in regcache_cache_only()
545 	WARN_ON(map->cache_type != REGCACHE_NONE &&  in regcache_cache_only()
546 		map->cache_bypass && enable);  in regcache_cache_only()
547 	map->cache_only = enable;  in regcache_cache_only()
548 	trace_regmap_cache_only(map, enable);  in regcache_cache_only()
549 	map->unlock(map->lock_arg);  in regcache_cache_only()
554  * regcache_mark_dirty - Indicate that HW registers were reset to default values
559  * on resume, regcache_sync() knows to write out all non-default values
568 	map->lock(map->lock_arg);  in regcache_mark_dirty()
569 	map->cache_dirty = true;  in regcache_mark_dirty()
570 	map->no_sync_defaults = true;  in regcache_mark_dirty()
571 	map->unlock(map->lock_arg);  in regcache_mark_dirty()
576  * regcache_cache_bypass - Put a register map into cache bypass mode
579  * @enable: flag if changes should not be written to the cache
581  * When a register map is marked with the cache bypass option, writes
586 void regcache_cache_bypass(struct regmap *map, bool enable)  in regcache_cache_bypass()  argument
588 	map->lock(map->lock_arg);  in regcache_cache_bypass()
589 	WARN_ON(map->cache_only && enable);  in regcache_cache_bypass()
590 	map->cache_bypass = enable;  in regcache_cache_bypass()
591 	trace_regmap_cache_bypass(map, enable);  in regcache_cache_bypass()
592 	map->unlock(map->lock_arg);  in regcache_cache_bypass()
597  * regcache_reg_cached - Check if a register is cached
609 	map->lock(map->lock_arg);  in regcache_reg_cached()
613 	map->unlock(map->lock_arg);  in regcache_reg_cached()
623 	if (map->format.format_val) {  in regcache_set_val()
624 		map->format.format_val(base + (map->cache_word_size * idx),  in regcache_set_val()
629 	switch (map->cache_word_size) {  in regcache_set_val()
657 		return -EINVAL;  in regcache_get_val()
660 	if (map->format.parse_val)  in regcache_get_val()
661 		return map->format.parse_val(regcache_get_val_addr(map, base,  in regcache_get_val()
664 	switch (map->cache_word_size) {  in regcache_get_val()
684 	return -1;  in regcache_get_val()
692 	return _a->reg - _b->reg;  in regcache_default_cmp()
703 	r = bsearch(&key, map->reg_defaults, map->num_reg_defaults,  in regcache_lookup_reg()
707 		return r - map->reg_defaults;  in regcache_lookup_reg()
709 		return -ENOENT;  in regcache_lookup_reg()
727 	map->cache_bypass = true;  in regcache_sync_val()
731 	map->cache_bypass = false;  in regcache_sync_val()
734 		dev_err(map->dev, "Unable to sync register %#x. %d\n",  in regcache_sync_val()
738 	dev_dbg(map->dev, "Synced register %#x, value %#x\n",  in regcache_sync_val()
753 		regtmp = block_base + (i * map->reg_stride);  in regcache_sync_block_single()
771 	size_t val_bytes = map->format.val_bytes;  in regcache_sync_block_raw_flush()
777 	count = (cur - base) / map->reg_stride;  in regcache_sync_block_raw_flush()
779 	dev_dbg(map->dev, "Writing %zu bytes for %d registers from 0x%x-0x%x\n",  in regcache_sync_block_raw_flush()
780 		count * val_bytes, count, base, cur - map->reg_stride);  in regcache_sync_block_raw_flush()
782 	map->cache_bypass = true;  in regcache_sync_block_raw_flush()
786 		dev_err(map->dev, "Unable to sync registers %#x-%#x. %d\n",  in regcache_sync_block_raw_flush()
787 			base, cur - map->reg_stride, ret);  in regcache_sync_block_raw_flush()
789 	map->cache_bypass = false;  in regcache_sync_block_raw_flush()
808 		regtmp = block_base + (i * map->reg_stride);  in regcache_sync_block_raw()
835 			map->reg_stride);  in regcache_sync_block_raw()
843 	if (regmap_can_raw_write(map) && !map->use_single_write)  in regcache_sync_block()