Lines Matching +full:device +full:- +full:sram
1 /* SPDX-License-Identifier: GPL-2.0 */
5 * Header file for the nicstar device driver.
29 controlled by the device driver. Must
44 have 32K x 32bit SRAM, in which case
48 128K x 32bit SRAM will limit the maximum
56 #define NUM_HB 8 /* Pre-allocated huge buffers */
99 * BUG_SM and BUG_LG are both used by the driver and the device.
107 #define NS_MAX_IOVECS (2 + (65568 - NS_SMBUFSIZE) / \
108 (NS_LGBUFSIZE - (NS_LGBUFSIZE % 48)))
111 #define NS_SMBUFSIZE_USABLE (NS_SMBUFSIZE - NS_SMBUFSIZE % 48)
112 #define NS_LGBUFSIZE_USABLE (NS_LGBUFSIZE - NS_LGBUFSIZE % 48)
114 #define NS_AAL0_HEADER (ATM_AAL0_SDU - ATM_CELL_PAYLOAD) /* 4 bytes */
122 * RSQ - Receive Status Queue
124 * Written by the NICStAR, read by the device driver.
135 ((le32_to_cpu((ns_rsqep)->word_1) & 0x00FF0000) >> 16)
137 (le32_to_cpu((ns_rsqep)->word_1) & 0x0000FFFF)
151 (le32_to_cpu((ns_rsqep)->word_4) & NS_RSQE_VALID)
153 (le32_to_cpu((ns_rsqep)->word_4) & NS_RSQE_NZGFC)
155 (le32_to_cpu((ns_rsqep)->word_4) & NS_RSQE_EOPDU)
157 (le32_to_cpu((ns_rsqep)->word_4) & NS_RSQE_BUFSIZE)
159 (le32_to_cpu((ns_rsqep)->word_4) & NS_RSQE_CONGESTION)
161 (le32_to_cpu((ns_rsqep)->word_4) & NS_RSQE_CLP)
163 (le32_to_cpu((ns_rsqep)->word_4) & NS_RSQE_CRCERR)
166 (le32_to_cpu((ns_rsqep)->word_4) & 0x000001FF)
168 ((ns_rsqep)->word_4 = cpu_to_le32(0x00000000))
174 * RCQ - Raw Cell Queue
176 * Written by the NICStAR, read by the device driver.
194 (le32_to_cpu((ns_rcqep)->word_2) != 0x00000000)
196 (le32_to_cpu((ns_rcqep)->word_1))
198 (le32_to_cpu((ns_rcqep)->word_2))
201 * SCQ - Segmentation Channel Queue
203 * Written by the device driver, read by the NICStAR.
250 (le32_to_cpu((ns_scqep)->word_1) & NS_SCQE_TYPE_TSR)
260 * TSQ - Transmit Status Queue
262 * Written by the NICStAR, read by the device driver.
278 (le32_to_cpu((ns_tsip)->word_2) & NS_TSI_EMPTY)
280 (le32_to_cpu((ns_tsip)->word_2) & NS_TSI_TIMESTAMP_MASK)
283 ((ns_tsip)->word_2 = cpu_to_le32(NS_TSI_EMPTY))
292 (le32_to_cpu((ns_tsip)->word_1) == 0x00000000)
294 ((le32_to_cpu((ns_tsip)->word_1) & 0xFFFF0000) >> 16)
296 (le32_to_cpu((ns_tsip)->word_1) & 0x00007FFF)
298 /* NICStAR structures located in local SRAM */
301 * RCT - Receive Connection Table
303 * Written by both the NICStAR and the device driver.
339 * FBD - Free Buffer Descriptor
341 * Written by the device driver using via the command register.
350 * TST - Transmit Schedule Table
352 * Written by the device driver.
368 - When the opcode is FIXED, sramad specifies the SRAM address of the
370 - When the opcode is END, sramad specifies the SRAM address of the
375 * SCD - Segmentation Channel Descriptor
377 * Written by both the device driver and the NICStAR
398 not be needed in the device driver they are not defined here. */
400 /* NICStAR local SRAM memory map */
459 /* b19{1=open,0=close} b18-2{SRAM addr} */
462 /* b18-2{SRAM addr} b1-0{burst size} */
465 /* b18-2{SRAM addr} */
471 /* b8{1=select UTL_CS1} b9{1=select UTL_CS0} b7-0{bus addr} */
474 /* b8{1=select UTL_CS1} b9{1=select UTL_CS0} b7-0{bus addr} */
504 #define NS_CFG_TXURIE 0x00000008 /* Transmit Under-run Interrupt
548 #define NS_STAT_PHYI 0x00000400 /* PHY Device Interrupt */
569 #define NS_FRSCD_NUM ((NS_TST_FRSCD_END + 1 - NS_FRSCD) / NS_FRSCD_SIZE)
639 /* Device driver structures */
648 (((struct ns_skb_prv *)(ATM_SKB(skb)+1))->buf_type)
650 (((struct ns_skb_prv *)(ATM_SKB(skb)+1))->dma)
652 (((struct ns_skb_prv *)(ATM_SKB(skb)+1))->iovcnt)
672 u32 scd; /* SRAM address of the corresponding
703 u32 cbr_scd; /* SRAM address of the corresponding
709 int index; /* Card ID to the device driver */
724 skb_pool hbpool; /* Pre-allocated huge buffers */
727 volatile u32 tst_addr; /* SRAM address of the TST in use */