Lines Matching +full:layer +full:- +full:buffer +full:- +full:offset
1 /* SPDX-License-Identifier: GPL-2.0 */
7 /* rx buffer sizes */
35 #define QUEUE_SIZE_BS 32 /* buffer supply queue capacity */
47 /* the cp starts putting a received PDU into one *small* buffer,
52 #define RSD_REQUIRED (((MAX_PDU_SIZE - SMALL_BUFFER_SIZE + LARGE_BUFFER_SIZE) / LARGE_BUFFER_SIZE)…
56 /* RSD_REQUIRED receive segment descriptors are enough to describe a max-sized PDU,
59 (WARNING: THIS MAY CHANGE IF BUFFER SIZES ARE MODIFIED) */
61 #define RSD_EXTENSION ((RSD_REQUIRED - RSD_FIXED) + 1)
65 #define FORE200E_DEV(d) ((struct fore200e*)((d)->dev_data))
66 #define FORE200E_VCC(d) ((struct fore200e_vcc*)((d)->dev_data))
100 /* ATM adaptation layer id */
115 enum fore200e_aal aal : 4, /* adaptation layer */
135 u32 buffer; /* transmit buffer DMA address */ member
136 u32 length; /* number of bytes in buffer */
154 u32 handle; /* host supplied receive buffer handle */
155 u32 length; /* number of bytes in buffer */
168 /* buffer scheme */
177 /* buffer magnitude */
186 /* receive buffer descriptor */
190 u32 buffer_haddr; /* host DMA address of host buffer */
194 /* receive buffer descriptor block */
197 struct rbd rbd[ RBD_BLK_SIZE ]; /* receive buffer descriptor */
229 /* cp resident buffer supply queue entry */
256 OPCODE_SET_OC3, /* set OC-3 registers */
257 OPCODE_GET_OC3, /* get OC-3 registers */
283 enum fore200e_aal aal : 8, /* adaptation layer */
284 enum buffer_scheme scheme : 8, /* buffer scheme */
318 /* OC-3 registers */
321 u32 reg[ 128 ]; /* see the PMC Sierra PC5346 S/UNI-155-Lite
323 for a description of the OC-3 chip registers */
327 /* set/get OC-3 regs command opcode */
341 /* set/get OC-3 regs command block */
344 struct oc3_opcode opcode; /* set/get OC-3 regs command opcode */
345 u32 regs_haddr; /* host DMA address of OC-3 regs buffer */
358 /* OC-3 statistics */
400 __be32 cells_protocol_errors; /* SAR or CS layer protocol errors */
404 __be32 cspdus_protocol_errors; /* CS layer protocol errors */
420 __be32 cspdus_protocol_errors; /* CS layer protocol errors */
439 /* whole statistics buffer */
443 struct stats_oc3 oc3; /* OC-3 statistics */
466 u32 stats_haddr; /* host DMA address of stats buffer */
493 u32 prom_haddr; /* host DMA address of PROM buffer */
505 struct oc3_block oc3_block; /* get/set OC-3 registers */
544 /* host resident buffer supply queue entry */
547 … struct cp_bsq_entry __iomem *cp_entry; /* addr of cp resident buffer supply queue entry */
549 struct rbd_block* rbd_block; /* addr of receive buffer descriptor block */
576 /* host resident receive buffer */
578 typedef struct buffer { struct
579 struct buffer* next; /* next receive buffer */ argument
580 enum buffer_scheme scheme; /* buffer scheme */ argument
581 enum buffer_magn magn; /* buffer magnitude */ argument
582 struct chunk data; /* data buffer */ argument
584 unsigned long index; /* buffer # in queue */ argument
585 int supplied; /* 'buffer supplied' flag */ argument
591 #define FORE200E_BUF2HDL(buffer) ((u32)(buffer)) argument
592 #define FORE200E_HDL2BUF(handle) ((struct buffer*)(handle))
594 #define FORE200E_BUF2HDL(buffer) ((u32)((u64)(buffer))) argument
595 #define FORE200E_HDL2BUF(handle) ((struct buffer*)(((u64)(handle)) | PAGE_OFFSET))
630 /* host resident buffer supply queues */
633 …struct host_bsq_entry host_entry[ QUEUE_SIZE_BS ]; /* host resident buffer supply queue entries…
634 …int head; /* head of buffer supply queue …
637 …struct buffer* buffer; /* array of rx buffers … member
638 …struct buffer* freebuf; /* list of free rx buffers …
648 __le32 load_offset; /* fw load offset in board memory */
655 /* receive buffer supply queues scheme specification */
659 u32 buffer_size; /* host buffer size */
666 /* initialization command block (one-time command, not in cmd queue) */
680 …struct bs_spec bs_spec[ BUFFER_SCHEME_NBR ][ BUFFER_MAGN_NBR ]; /* buffer supply queues spec …
688 MEDIA_TYPE_SM_OC3_ST = 0x36, /* single-mode fiber ST */
689 MEDIA_TYPE_SM_OC3_SC = 0x46 /* single-mode fiber SC */
701 …u32 cp_bsq[ BUFFER_SCHEME_NBR ][ BUFFER_MAGN_NBR ]; /* buffer supply queues */
704 u32 heap_base; /* offset form beginning of ram */
714 u32 oc3_revision; /* OC-3 revision number */
722 BSTAT_SELFTEST_OK = (u32) 0x02201958, /* self-test ok */
723 BSTAT_SELFTEST_FAIL = (u32) 0xadbadbad, /* self-test failed */
745 u32 app_base; /* application base offset */
763 FORE200E_STATE_INIT_BSQ, /* buffer supply queue initialized */
770 /* PCA-200E registers */
779 /* SBA-200E registers */
788 /* model-specific registers */
791 struct fore200e_pca_regs pca; /* PCA-200E registers */
792 struct fore200e_sba_regs sba; /* SBA-200E registers */
798 /* bus-dependent data */
827 (& (fore200e)->vc_map[ ((vpi) << FORE200E_VCI_BITS) | (vci) ])
830 /* per-device data */
833 const struct fore200e_bus* bus; /* bus-dependent code and data */
834 union fore200e_regs regs; /* bus-dependent registers */
852 /* host resident buffer supply queues */
855 u32 available_cell_rate; /* remaining pseudo-CBR bw on link */
874 /* per-vcc data */
877 enum buffer_scheme scheme; /* rx buffer scheme */
889 /* 200E-series common memory layout */
895 /* PCA-200E memory layout */
904 /* PCA-200E host control register */
919 /* PCA-200E PCI bus interface regs (offsets in PCI config space) */
927 #define PCA200E_CTRL_DIS_CACHE_RD (1<<0) /* disable cache-line reads …
929 #define PCA200E_CTRL_2_CACHE_WRT_INVAL (1<<2) /* require 2 cache-lines for writes and invalidate…
937 #define SBA200E_PROM_NAME "FORE,sba-200e" /* device name in openprom tree */
940 /* size of SBA-200E registers */
948 /* SBA-200E SBUS burst transfer size register */
955 /* SBA-200E host control register */