Lines Matching +full:chg +full:- +full:status
1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * sata_sil.c - Silicon Image SATA
6 * Please ALWAYS copy linux-ide@vger.kernel.org
9 * Copyright 2003-2005 Red Hat, Inc.
13 * as Documentation/driver-api/libata.rst
16 * http://gkernel.sourceforge.net/specs/sii/3112A_SiI-DS-0095-B2.pdf.bz2
78 SIL_DMA_RDWR = (1 << 3), /* DMA Rd-Wr */
127 /* TODO firmware versions should be added - eric */
218 /* per-port register offsets */
241 MODULE_DESCRIPTION("low-level driver for Silicon Image SATA controller");
253 struct ata_port *ap = qc->ap; in sil_bmdma_stop()
254 void __iomem *mmio_base = ap->host->iomap[SIL_MMIO_BAR]; in sil_bmdma_stop()
255 void __iomem *bmdma2 = mmio_base + sil_port[ap->port_no].bmdma2; in sil_bmdma_stop()
257 /* clear start/stop bit - can safely always write 0 */ in sil_bmdma_stop()
260 /* one-PIO-cycle guaranteed wait, per spec, for HDMA1:0 transition */ in sil_bmdma_stop()
266 struct ata_port *ap = qc->ap; in sil_bmdma_setup()
267 void __iomem *bmdma = ap->ioaddr.bmdma_addr; in sil_bmdma_setup()
270 iowrite32(ap->bmdma_prd_dma, bmdma + ATA_DMA_TABLE_OFS); in sil_bmdma_setup()
273 ap->ops->sff_exec_command(ap, &qc->tf); in sil_bmdma_setup()
278 unsigned int rw = (qc->tf.flags & ATA_TFLAG_WRITE); in sil_bmdma_start()
279 struct ata_port *ap = qc->ap; in sil_bmdma_start()
280 void __iomem *mmio_base = ap->host->iomap[SIL_MMIO_BAR]; in sil_bmdma_start()
281 void __iomem *bmdma2 = mmio_base + sil_port[ap->port_no].bmdma2; in sil_bmdma_start()
296 struct ata_port *ap = qc->ap; in sil_fill_sg()
300 prd = &ap->bmdma_prd[0]; in sil_fill_sg()
301 for_each_sg(qc->sg, sg, qc->n_elem, si) { in sil_fill_sg()
302 /* Note h/w doesn't support 64-bit, so we unconditionally in sil_fill_sg()
308 prd->addr = cpu_to_le32(addr); in sil_fill_sg()
309 prd->flags_len = cpu_to_le32(sg_len); in sil_fill_sg()
316 last_prd->flags_len |= cpu_to_le32(ATA_PRD_EOT); in sil_fill_sg()
321 if (!(qc->flags & ATA_QCFLAG_DMAMAP)) in sil_qc_prep()
337 * sil_set_mode - wrap set_mode functions
347 struct ata_port *ap = link->ap; in sil_set_mode()
348 void __iomem *mmio_base = ap->host->iomap[SIL_MMIO_BAR]; in sil_set_mode()
349 void __iomem *addr = mmio_base + sil_port[ap->port_no].xfer_mode; in sil_set_mode()
360 dev_mode[dev->devno] = 0; /* PIO0/1/2 */ in sil_set_mode()
361 else if (dev->flags & ATA_DFLAG_PIO) in sil_set_mode()
362 dev_mode[dev->devno] = 1; /* PIO3/4 */ in sil_set_mode()
364 dev_mode[dev->devno] = 3; /* UDMA */ in sil_set_mode()
380 void __iomem *offset = ap->ioaddr.scr_addr; in sil_scr_addr()
399 void __iomem *mmio = sil_scr_addr(link->ap, sc_reg); in sil_scr_read()
405 return -EINVAL; in sil_scr_read()
410 void __iomem *mmio = sil_scr_addr(link->ap, sc_reg); in sil_scr_write()
416 return -EINVAL; in sil_scr_write()
421 struct ata_eh_info *ehi = &ap->link.eh_info; in sil_host_intr()
422 struct ata_queued_cmd *qc = ata_qc_from_tag(ap, ap->link.active_tag); in sil_host_intr()
423 u8 status; in sil_host_intr() local
432 sil_scr_read(&ap->link, SCR_ERROR, &serror); in sil_host_intr()
433 sil_scr_write(&ap->link, SCR_ERROR, serror); in sil_host_intr()
436 * it's PHYRDY CHG. in sil_host_intr()
439 ap->link.eh_info.serror |= serror; in sil_host_intr()
447 if (unlikely(!qc || (qc->tf.flags & ATA_TFLAG_POLLING))) { in sil_host_intr()
449 ap->ops->sff_check_status(ap); in sil_host_intr()
454 switch (ap->hsm_task_state) { in sil_host_intr()
456 /* Some pre-ATAPI-4 devices assert INTRQ in sil_host_intr()
462 * need to check ata_is_atapi(qc->tf.protocol) again. in sil_host_intr()
464 if (!(qc->dev->flags & ATA_DFLAG_CDB_INTR)) in sil_host_intr()
468 if (ata_is_dma(qc->tf.protocol)) { in sil_host_intr()
469 /* clear DMA-Start bit */ in sil_host_intr()
470 ap->ops->bmdma_stop(qc); in sil_host_intr()
473 qc->err_mask |= AC_ERR_HOST_BUS; in sil_host_intr()
474 ap->hsm_task_state = HSM_ST_ERR; in sil_host_intr()
484 /* check main status, clearing INTRQ */ in sil_host_intr()
485 status = ap->ops->sff_check_status(ap); in sil_host_intr()
486 if (unlikely(status & ATA_BUSY)) in sil_host_intr()
493 ata_sff_hsm_move(ap, qc, status, 0); in sil_host_intr()
495 if (unlikely(qc->err_mask) && ata_is_dma(qc->tf.protocol)) in sil_host_intr()
501 qc->err_mask |= AC_ERR_HSM; in sil_host_intr()
509 void __iomem *mmio_base = host->iomap[SIL_MMIO_BAR]; in sil_interrupt()
513 spin_lock(&host->lock); in sil_interrupt()
515 for (i = 0; i < host->n_ports; i++) { in sil_interrupt()
516 struct ata_port *ap = host->ports[i]; in sil_interrupt()
517 u32 bmdma2 = readl(mmio_base + sil_port[ap->port_no].bmdma2); in sil_interrupt()
520 if (ap->flags & SIL_FLAG_NO_SATA_IRQ) in sil_interrupt()
531 spin_unlock(&host->lock); in sil_interrupt()
538 void __iomem *mmio_base = ap->host->iomap[SIL_MMIO_BAR]; in sil_freeze()
542 writel(0, mmio_base + sil_port[ap->port_no].sien); in sil_freeze()
546 tmp |= SIL_MASK_IDE0_INT << ap->port_no; in sil_freeze()
555 iowrite8(ioread8(ap->ioaddr.bmdma_addr) & ~SIL_DMA_ENABLE, in sil_freeze()
556 ap->ioaddr.bmdma_addr); in sil_freeze()
561 ioread8(ap->ioaddr.bmdma_addr); in sil_freeze()
566 void __iomem *mmio_base = ap->host->iomap[SIL_MMIO_BAR]; in sil_thaw()
570 ap->ops->sff_check_status(ap); in sil_thaw()
574 if (!(ap->flags & SIL_FLAG_NO_SATA_IRQ)) in sil_thaw()
575 writel(SIL_SIEN_N, mmio_base + sil_port[ap->port_no].sien); in sil_thaw()
579 tmp &= ~(SIL_MASK_IDE0_INT << ap->port_no); in sil_thaw()
584 * sil_dev_config - Apply device/host-specific errata fixups
603 * 20040111 - Seagate drives affected by the Mod15Write bug are quirked
606 * - There seems to be less info on it, only one device gleaned off the
609 * - But then again UDMA5 is hardly anything to complain about
613 struct ata_port *ap = dev->link->ap; in sil_dev_config()
614 int print_info = ap->link.eh_context.i.flags & ATA_EHI_PRINTINFO; in sil_dev_config()
619 dev->quirks |= ATA_QUIRK_NOTRIM; in sil_dev_config()
621 ata_id_c_string(dev->id, model_num, ATA_ID_PROD, sizeof(model_num)); in sil_dev_config()
631 ((ap->flags & SIL_FLAG_MOD15WRITE) && in sil_dev_config()
636 dev->max_sectors = 15; in sil_dev_config()
645 dev->udma_mask &= ATA_UDMA5; in sil_dev_config()
652 struct pci_dev *pdev = to_pci_dev(host->dev); in sil_init_controller()
653 void __iomem *mmio_base = host->iomap[SIL_MMIO_BAR]; in sil_init_controller()
663 for (i = 0; i < host->n_ports; i++) in sil_init_controller()
667 dev_warn(&pdev->dev, in sil_init_controller()
671 if (host->ports[0]->flags & SIL_FLAG_RERR_ON_DMA_ACT) { in sil_init_controller()
674 for (i = 0, cnt = 0; i < host->n_ports; i++) { in sil_init_controller()
679 dev_info(&pdev->dev, in sil_init_controller()
686 if (host->n_ports == 4) { in sil_init_controller()
701 DMI_MATCH(DMI_SYS_VENDOR, "Hewlett-Packard"), in sil_broken_system_poweroff()
713 unsigned long slot = (unsigned long)dmi->driver_data; in sil_broken_system_poweroff()
714 /* apply the quirk only to on-board controllers */ in sil_broken_system_poweroff()
715 return slot == PCI_SLOT(pdev->devfn); in sil_broken_system_poweroff()
723 int board_id = ent->driver_data; in sil_init_one()
731 ata_print_version_once(&pdev->dev, DRV_VERSION); in sil_init_one()
741 dev_info(&pdev->dev, "quirky BIOS, skipping spindown " in sil_init_one()
745 host = ata_host_alloc_pinfo(&pdev->dev, ppi, n_ports); in sil_init_one()
747 return -ENOMEM; in sil_init_one()
755 if (rc == -EBUSY) in sil_init_one()
759 host->iomap = pcim_iomap_table(pdev); in sil_init_one()
761 rc = dma_set_mask_and_coherent(&pdev->dev, ATA_DMA_MASK); in sil_init_one()
765 mmio_base = host->iomap[SIL_MMIO_BAR]; in sil_init_one()
767 for (i = 0; i < host->n_ports; i++) { in sil_init_one()
768 struct ata_port *ap = host->ports[i]; in sil_init_one()
769 struct ata_ioports *ioaddr = &ap->ioaddr; in sil_init_one()
771 ioaddr->cmd_addr = mmio_base + sil_port[i].tf; in sil_init_one()
772 ioaddr->altstatus_addr = in sil_init_one()
773 ioaddr->ctl_addr = mmio_base + sil_port[i].ctl; in sil_init_one()
774 ioaddr->bmdma_addr = mmio_base + sil_port[i].bmdma; in sil_init_one()
775 ioaddr->scr_addr = mmio_base + sil_port[i].scr; in sil_init_one()
778 ata_port_pbar_desc(ap, SIL_MMIO_BAR, -1, "mmio"); in sil_init_one()
786 return ata_host_activate(host, pdev->irq, sil_interrupt, IRQF_SHARED, in sil_init_one()