70 module_param(probe_all, int, 0);
74 static int probe_mask = ~0;
75 module_param(probe_mask, int, 0);
79 module_param(autospeed, int, 0);
83 module_param(pio_mask, int, 0);
86 static int iordy_mask = 0xFFFFFFFF;
87 module_param(iordy_mask, int, 0);
91 module_param(ht6560a, int, 0);
95 module_param(ht6560b, int, 0);
99 module_param(opti82c611a, int, 0);
104 module_param(opti82c46x, int, 0);
113 module_param(qdi, int, 0);
121 module_param(winbond, int, 0);
128 	BIOS = 0,
171 static int legacy_port[NR_HOST] = { 0x1f0, 0x170, 0x1e8, 0x168, 0x1e0, 0x160 };
195 	struct legacy_probe *lp = &probe_list[0];  in legacy_probe_add()
199 	for (i = 0; i < NR_HOST; i++) {  in legacy_probe_add()
200 		if (lp->port == 0 && free == NULL)  in legacy_probe_add()
220 	return 0;  in legacy_probe_add()
248 	return 0;  in legacy_set_mode()
264  *	do this. The mode range can be set if it is not 0x1F by setting
301 		inb(0x1F5);  in pdc20230_set_piomode()
302 		outb(inb(0x1F2) | 0x80, 0x1F2);  in pdc20230_set_piomode()
303 		inb(0x1F2);  in pdc20230_set_piomode()
304 		inb(0x3F6);  in pdc20230_set_piomode()
305 		inb(0x3F6);  in pdc20230_set_piomode()
306 		inb(0x1F2);  in pdc20230_set_piomode()
307 		inb(0x1F2);  in pdc20230_set_piomode()
309 	while ((inb(0x1F2) & 0x80) && --tries);  in pdc20230_set_piomode()
313 	outb(inb(0x1F4) & 0x07, 0x1F4);  in pdc20230_set_piomode()
315 	rt = inb(0x1F3);  in pdc20230_set_piomode()
316 	rt &= ~(0x07 << (3 * !adev->devno));  in pdc20230_set_piomode()
319 	outb(rt, 0x1F3);  in pdc20230_set_piomode()
322 	outb(inb(0x1F2) | 0x01, 0x1F2);  in pdc20230_set_piomode()
324 	inb(0x1F5);  in pdc20230_set_piomode()
336 	if (ata_id_has_dword_io(dev->id) && (slop == 0 || slop == 3)  in pdc_data_xfer_vlb()
354 			__le32 pad = 0;  in pdc_data_xfer_vlb()
396 	inb(0x3E6);  in ht6560a_set_piomode()
397 	inb(0x3E6);  in ht6560a_set_piomode()
398 	inb(0x3E6);  in ht6560a_set_piomode()
399 	inb(0x3E6);  in ht6560a_set_piomode()
428 	recover = clamp_val(t.recover, 2, 16) & 0x0F;  in ht6560b_set_piomode()
430 	inb(0x3E6);  in ht6560b_set_piomode()
431 	inb(0x3E6);  in ht6560b_set_piomode()
432 	inb(0x3E6);  in ht6560b_set_piomode()
433 	inb(0x3E6);  in ht6560b_set_piomode()
438 		u8 rconf = inb(0x3E6);  in ht6560b_set_piomode()
439 		if (rconf & 0x24) {  in ht6560b_set_piomode()
440 			rconf &= ~0x24;  in ht6560b_set_piomode()
441 			outb(rconf, 0x3E6);  in ht6560b_set_piomode()
470 	outb(reg, 0x22);  in opti_syscfg()
471 	r = inb(0x24);  in opti_syscfg()
498 	clock = 1000000000 / khz[ioread8(ap->ioaddr.lbah_addr) & 0x03];  in opti82c611a_set_piomode()
517 	rc &= 0x7F;  in opti82c611a_set_piomode()
527 	rc &= 0xC0;  in opti82c611a_set_piomode()
529 	rc |= (setup << 4) | 0x04;  in opti82c611a_set_piomode()
537 	rc &= 0x73;  in opti82c611a_set_piomode()
538 	rc |= 0x84;  in opti82c611a_set_piomode()
542 	iowrite8(0x83,  ap->ioaddr.nsect_addr);  in opti82c611a_set_piomode()
569 	sysclk = (opti_syscfg(0xAC) & 0xC0) >> 6;	/* BIOS set */  in opti82c46x_set_piomode()
596 	rc &= 0x7F;  in opti82c46x_set_piomode()
606 	rc &= 0xC0;  in opti82c46x_set_piomode()
608 	rc |= (setup << 4) | 0x04;  in opti82c46x_set_piomode()
616 	rc &= 0x73;  in opti82c46x_set_piomode()
617 	rc |= 0x84;  in opti82c46x_set_piomode()
621 	iowrite8(0x83,  ap->ioaddr.nsect_addr);  in opti82c46x_set_piomode()
690 		recovery = 15 - clamp_val(t.recover, 0, 15);  in qdi65x0_set_piomode()
692 	timing = (recovery << 4) | active | 0x08;  in qdi65x0_set_piomode()
702 		outb(0x5F, (ld_qdi->timing & 0xFFF0) + 3);  in qdi65x0_set_piomode()
737 	if (ata_id_has_dword_io(adev->id) && (slop == 0 || slop == 3)  in vlb32_data_xfer()
745 			__le32 pad = 0;  in vlb32_data_xfer()
766 	return 0;  in qdi_port()
795 	outb(reg, port + 0x01);  in winbond_writecfg()
796 	outb(val, port + 0x02);  in winbond_writecfg()
806 	outb(reg, port + 0x01);  in winbond_readcfg()
807 	val = inb(port + 0x02);  in winbond_readcfg()
819 	int timing = 0x88 + (ap->port_no * 4) + (adev->devno * 2);  in winbond_set_piomode()
821 	reg = winbond_readcfg(ld_winbond->timing, 0x81);  in winbond_set_piomode()
824 	if (reg & 0x40)		/* Fast VLB bus, assume 50MHz */  in winbond_set_piomode()
829 	active = (clamp_val(t.active, 3, 17) - 1) & 0x0F;  in winbond_set_piomode()
830 	recovery = (clamp_val(t.recover, 1, 15) + 1) & 0x0F;  in winbond_set_piomode()
836 	reg = 0x35;  in winbond_set_piomode()
838 		reg |= 0x08;	/* FIFO off */  in winbond_set_piomode()
840 		reg |= 0x02;	/* IORDY off */  in winbond_set_piomode()
841 	reg |= (clamp_val(t.setup, 0, 3) << 6);  in winbond_set_piomode()
851 	return 0;  in winbond_port()
862 			ATA_FLAG_NO_IORDY,	0,			NULL },
864 			0,			0,			NULL },
869 			ATA_FLAG_NO_IORDY,	0,			NULL },
871 			ATA_FLAG_NO_IORDY,	0,			NULL },
873 			0,			0,			NULL },
875 			0,			0,			NULL },
880 			0, ATA_PFLAG_PIO32 | ATA_PFLAG_PIO32CHANGE, qdi_port },
882 			0, ATA_PFLAG_PIO32 | ATA_PFLAG_PIO32CHANGE, qdi_port },
884 			0, ATA_PFLAG_PIO32 | ATA_PFLAG_PIO32CHANGE,
900 	if (winbond && (probe->port == 0x1F0 || probe->port == 0x170)) {  in probe_chip_type()
901 		u8 reg = winbond_readcfg(winbond, 0x81);  in probe_chip_type()
902 		reg |= 0x80;	/* jumpered mode off */  in probe_chip_type()
903 		winbond_writecfg(winbond, 0x81, reg);  in probe_chip_type()
904 		reg = winbond_readcfg(winbond, 0x83);  in probe_chip_type()
905 		reg |= 0xF0;	/* local control */  in probe_chip_type()
906 		winbond_writecfg(winbond, 0x83, reg);  in probe_chip_type()
907 		reg = winbond_readcfg(winbond, 0x85);  in probe_chip_type()
908 		reg |= 0xF0;	/* programmable timing */  in probe_chip_type()
909 		winbond_writecfg(winbond, 0x85, reg);  in probe_chip_type()
911 		reg = winbond_readcfg(winbond, 0x81);  in probe_chip_type()
916 	if (probe->port == 0x1F0) {  in probe_chip_type()
920 		outb(inb(0x1F2) | 0x80, 0x1F2);  in probe_chip_type()
921 		inb(0x1F5);  in probe_chip_type()
922 		inb(0x1F2);  in probe_chip_type()
923 		inb(0x3F6);  in probe_chip_type()
924 		inb(0x3F6);  in probe_chip_type()
925 		inb(0x1F2);  in probe_chip_type()
926 		inb(0x1F2);  in probe_chip_type()
928 		if ((inb(0x1F2) & 0x80) == 0) {  in probe_chip_type()
933 			inb(0x1F5);  in probe_chip_type()
937 			outb(0x55, 0x1F2);  in probe_chip_type()
938 			inb(0x1F2);  in probe_chip_type()
939 			inb(0x1F2);  in probe_chip_type()
940 			if (inb(0x1F2) == 0x00)  in probe_chip_type()
983 	u32 iordy = (iordy_mask & mask) ? 0: ATA_FLAG_NO_IORDY;  in legacy_init_one()
988 	pdev = platform_device_register_simple(DRV_NAME, probe->slot, NULL, 0);  in legacy_init_one()
994 	    devm_request_region(&pdev->dev, io + 0x0206, 1,  in legacy_init_one()
1000 	ctrl_addr = devm_ioport_map(&pdev->dev, io + 0x0206, 1);  in legacy_init_one()
1005 		if (controller->setup(pdev, probe, ld) < 0)  in legacy_init_one()
1010 	ap = host->ports[0];  in legacy_init_one()
1022 	ata_port_desc(ap, "cmd 0x%lx ctl 0x%lx", io, io + 0x0206);  in legacy_init_one()
1024 	ret = ata_host_activate(host, probe->irq, ata_sff_interrupt, 0,  in legacy_init_one()
1038 			return 0;  in legacy_init_one()
1064 	if (p->vendor == 0x1078 && p->device == 0x0000) {  in legacy_check_special_cases()
1069 	if (p->vendor == 0x1078 && p->device == 0x0002) {  in legacy_check_special_cases()
1074 	if (p->vendor == 0x8086 && p->device == 0x1234) {  in legacy_check_special_cases()
1076 		pci_read_config_word(p, 0x6C, &r);  in legacy_check_special_cases()
1077 		if (r & 0x8000) {  in legacy_check_special_cases()
1079 			if (r & 0x4000)  in legacy_check_special_cases()
1096 	u8 ctrl = (opti_syscfg(0x30) & 0xC0) >> 6;  in probe_opti_vlb()
1102 		chans = (opti_syscfg(0x3F) & 0x20) ? 2 : 1;  in probe_opti_vlb()
1103 	ctrl = opti_syscfg(0xAC);  in probe_opti_vlb()
1108 			legacy_probe_add(0x1F0, 14, OPTI46X, 0);  in probe_opti_vlb()
1109 			legacy_probe_add(0x170, 15, OPTI46X, 0);  in probe_opti_vlb()
1112 			legacy_probe_add(0x170, 15, OPTI46X, 0);  in probe_opti_vlb()
1114 			legacy_probe_add(0x1F0, 14, OPTI46X, 0);  in probe_opti_vlb()
1116 		legacy_probe_add(0x1F0, 14, OPTI46X, 0);  in probe_opti_vlb()
1121 	static const unsigned long ide_port[2] = { 0x170, 0x1F0 };  in qdi65_identify_port()
1123 	if ((r & 0xF0) == 0xC0) {  in qdi65_identify_port()
1128 		legacy_probe_add(ide_port[r & 0x01], 14 + (r & 0x01),  in qdi65_identify_port()
1131 	if (((r & 0xF0) == 0xA0) || (r & 0xF0) == 0x50) {  in qdi65_identify_port()
1140 			legacy_probe_add(ide_port[r & 0x01], 14 + (r & 0x01),  in qdi65_identify_port()
1143 			legacy_probe_add(0x1F0, 14, QDI6580DP, port);  in qdi65_identify_port()
1144 			/* port + 0x02, r & 0x04 */  in qdi65_identify_port()
1145 			legacy_probe_add(0x170, 15, QDI6580DP, port + 2);  in qdi65_identify_port()
1154 	static const unsigned long qd_port[2] = { 0x30, 0xB0 };  in probe_qdi_vlb()
1161 	for (i = 0; i < 2; i++) {  in probe_qdi_vlb()
1173 			outb(0x19, port);  in probe_qdi_vlb()
1182 			if (res == 0x19) {  in probe_qdi_vlb()
1210 	int ct = 0;  in legacy_init()
1211 	int primary = 0;  in legacy_init()
1212 	int secondary = 0;  in legacy_init()
1213 	int pci_present = 0;  in legacy_init()
1214 	struct legacy_probe *pl = &probe_list[0];  in legacy_init()
1215 	int slot = 0;  in legacy_init()
1224 		for (r = 0; r < 6; r++) {  in legacy_init()
1225 			if (pci_resource_start(p, r) == 0x1f0)  in legacy_init()
1227 			if (pci_resource_start(p, r) == 0x170)  in legacy_init()
1239 		winbond = 0x130;	/* Default port, alt is 1B0 */  in legacy_init()
1241 	if (primary == 0 || all)  in legacy_init()
1242 		legacy_probe_add(0x1F0, 14, UNKNOWN, 0);  in legacy_init()
1243 	if (secondary == 0 || all)  in legacy_init()
1244 		legacy_probe_add(0x170, 15, UNKNOWN, 0);  in legacy_init()
1248 		legacy_probe_add(0x1E8, 11, UNKNOWN, 0);  in legacy_init()
1249 		legacy_probe_add(0x168, 10, UNKNOWN, 0);  in legacy_init()
1250 		legacy_probe_add(0x1E0, 8, UNKNOWN, 0);  in legacy_init()
1251 		legacy_probe_add(0x160, 12, UNKNOWN, 0);  in legacy_init()
1259 	for (i = 0; i < NR_HOST; i++, pl++) {  in legacy_init()
1260 		if (pl->port == 0)  in legacy_init()
1265 		if (legacy_init_one(pl) == 0)  in legacy_init()
1268 	if (ct != 0)  in legacy_init()
1269 		return 0;  in legacy_init()
1277 	for (i = 0; i < NR_HOST; i++) {  in legacy_exit()