Lines Matching +full:cycle +full:- +full:6
1 // SPDX-License-Identifier: GPL-2.0-only
35 .stepping = 6,
41 .stepping = 6,
47 .stepping = 6,
80 #define ICS_TYPE_NOTYPE ((unsigned int)-1)
82 /* ---------------- Version 5 PCB Support Functions --------------------- */
88 struct pata_icside_state *state = ec->irq_data; in pata_icside_irqenable_arcin_v5()
90 writeb(0, state->irq_port + ICS_ARCIN_V5_INTROFFSET); in pata_icside_irqenable_arcin_v5()
98 struct pata_icside_state *state = ec->irq_data; in pata_icside_irqdisable_arcin_v5()
100 readb(state->irq_port + ICS_ARCIN_V5_INTROFFSET); in pata_icside_irqdisable_arcin_v5()
109 /* ---------------- Version 6 PCB Support Functions --------------------- */
115 struct pata_icside_state *state = ec->irq_data; in pata_icside_irqenable_arcin_v6()
116 void __iomem *base = state->irq_port; in pata_icside_irqenable_arcin_v6()
118 if (!state->port[0].disabled) in pata_icside_irqenable_arcin_v6()
120 if (!state->port[1].disabled) in pata_icside_irqenable_arcin_v6()
129 struct pata_icside_state *state = ec->irq_data; in pata_icside_irqdisable_arcin_v6()
131 readb(state->irq_port + ICS_ARCIN_V6_INTROFFSET_1); in pata_icside_irqdisable_arcin_v6()
132 readb(state->irq_port + ICS_ARCIN_V6_INTROFFSET_2); in pata_icside_irqdisable_arcin_v6()
140 struct pata_icside_state *state = ec->irq_data; in pata_icside_irqpending_arcin_v6()
142 return readb(state->irq_port + ICS_ARCIN_V6_INTRSTAT_1) & 1 || in pata_icside_irqpending_arcin_v6()
143 readb(state->irq_port + ICS_ARCIN_V6_INTRSTAT_2) & 1; in pata_icside_irqpending_arcin_v6()
154 * SG-DMA support.
156 * Similar to the BM-DMA, but we use the RiscPCs IOMD DMA controllers.
166 * calculate the cycle time based on the transfer mode, and the EIDE
171 * Type Active Recovery Cycle
183 * Mode Active -- Recovery -- Cycle IOMD type
190 struct pata_icside_state *state = ap->host->private_data; in pata_icside_set_dmamode()
192 unsigned int cycle; in pata_icside_set_dmamode() local
198 if (ata_timing_compute(adev, adev->dma_mode, &t, 1000, 1)) in pata_icside_set_dmamode()
202 * Choose the IOMD cycle timing which ensure that the interface in pata_icside_set_dmamode()
203 * satisfies the measured active, recovery and cycle times. in pata_icside_set_dmamode()
205 if (t.active <= 50 && t.recover <= 375 && t.cycle <= 425) { in pata_icside_set_dmamode()
207 cycle = 187; in pata_icside_set_dmamode()
208 } else if (t.active <= 125 && t.recover <= 375 && t.cycle <= 500) { in pata_icside_set_dmamode()
210 cycle = 250; in pata_icside_set_dmamode()
211 } else if (t.active <= 200 && t.recover <= 550 && t.cycle <= 750) { in pata_icside_set_dmamode()
213 cycle = 437; in pata_icside_set_dmamode()
216 cycle = 562; in pata_icside_set_dmamode()
220 t.active, t.recover, t.cycle, iomd_type); in pata_icside_set_dmamode()
222 state->port[ap->port_no].speed[adev->devno] = cycle; in pata_icside_set_dmamode()
227 struct ata_port *ap = qc->ap; in pata_icside_bmdma_setup()
228 struct pata_icside_state *state = ap->host->private_data; in pata_icside_bmdma_setup()
229 unsigned int write = qc->tf.flags & ATA_TFLAG_WRITE; in pata_icside_bmdma_setup()
235 BUG_ON(dma_channel_active(state->dma)); in pata_icside_bmdma_setup()
240 writeb(state->port[ap->port_no].port_sel, state->ioc_base); in pata_icside_bmdma_setup()
242 set_dma_speed(state->dma, state->port[ap->port_no].speed[qc->dev->devno]); in pata_icside_bmdma_setup()
243 set_dma_sg(state->dma, qc->sg, qc->n_elem); in pata_icside_bmdma_setup()
244 set_dma_mode(state->dma, write ? DMA_MODE_WRITE : DMA_MODE_READ); in pata_icside_bmdma_setup()
247 ap->ops->sff_exec_command(ap, &qc->tf); in pata_icside_bmdma_setup()
252 struct ata_port *ap = qc->ap; in pata_icside_bmdma_start()
253 struct pata_icside_state *state = ap->host->private_data; in pata_icside_bmdma_start()
255 BUG_ON(dma_channel_active(state->dma)); in pata_icside_bmdma_start()
256 enable_dma(state->dma); in pata_icside_bmdma_start()
261 struct ata_port *ap = qc->ap; in pata_icside_bmdma_stop()
262 struct pata_icside_state *state = ap->host->private_data; in pata_icside_bmdma_stop()
264 disable_dma(state->dma); in pata_icside_bmdma_stop()
272 struct pata_icside_state *state = ap->host->private_data; in pata_icside_bmdma_status()
275 irq_port = state->irq_port + (ap->port_no ? ICS_ARCIN_V6_INTRSTAT_2 : in pata_icside_bmdma_status()
283 struct pata_icside_state *state = info->state; in icside_dma_init()
284 struct expansion_card *ec = info->ec; in icside_dma_init()
288 state->port[0].speed[i] = 480; in icside_dma_init()
289 state->port[1].speed[i] = 480; in icside_dma_init()
292 if (ec->dma != NO_DMA && !request_dma(ec->dma, DRV_NAME)) { in icside_dma_init()
293 state->dma = ec->dma; in icside_dma_init()
294 info->mwdma_mask = ATA_MWDMA2; in icside_dma_init()
309 struct ata_port *ap = link->ap; in pata_icside_postreset()
310 struct pata_icside_state *state = ap->host->private_data; in pata_icside_postreset()
315 state->port[ap->port_no].disabled = 1; in pata_icside_postreset()
317 if (state->type == ICS_TYPE_V6) { in pata_icside_postreset()
323 void __iomem *irq_port = state->irq_port + in pata_icside_postreset()
324 (ap->port_no ? ICS_ARCIN_V6_INTROFFSET_2 : ICS_ARCIN_V6_INTROFFSET_1); in pata_icside_postreset()
348 struct ata_ioports *ioaddr = &ap->ioaddr; in pata_icside_setup_ioaddr()
349 void __iomem *cmd = base + port->dataoffset; in pata_icside_setup_ioaddr()
351 ioaddr->cmd_addr = cmd; in pata_icside_setup_ioaddr()
352 ioaddr->data_addr = cmd + (ATA_REG_DATA << port->stepping); in pata_icside_setup_ioaddr()
353 ioaddr->error_addr = cmd + (ATA_REG_ERR << port->stepping); in pata_icside_setup_ioaddr()
354 ioaddr->feature_addr = cmd + (ATA_REG_FEATURE << port->stepping); in pata_icside_setup_ioaddr()
355 ioaddr->nsect_addr = cmd + (ATA_REG_NSECT << port->stepping); in pata_icside_setup_ioaddr()
356 ioaddr->lbal_addr = cmd + (ATA_REG_LBAL << port->stepping); in pata_icside_setup_ioaddr()
357 ioaddr->lbam_addr = cmd + (ATA_REG_LBAM << port->stepping); in pata_icside_setup_ioaddr()
358 ioaddr->lbah_addr = cmd + (ATA_REG_LBAH << port->stepping); in pata_icside_setup_ioaddr()
359 ioaddr->device_addr = cmd + (ATA_REG_DEVICE << port->stepping); in pata_icside_setup_ioaddr()
360 ioaddr->status_addr = cmd + (ATA_REG_STATUS << port->stepping); in pata_icside_setup_ioaddr()
361 ioaddr->command_addr = cmd + (ATA_REG_CMD << port->stepping); in pata_icside_setup_ioaddr()
363 ioaddr->ctl_addr = base + port->ctrloffset; in pata_icside_setup_ioaddr()
364 ioaddr->altstatus_addr = ioaddr->ctl_addr; in pata_icside_setup_ioaddr()
367 info->raw_base + port->dataoffset, in pata_icside_setup_ioaddr()
368 info->raw_base + port->ctrloffset); in pata_icside_setup_ioaddr()
370 if (info->raw_ioc_base) in pata_icside_setup_ioaddr()
371 ata_port_desc(ap, "iocbase 0x%lx", info->raw_ioc_base); in pata_icside_setup_ioaddr()
376 struct pata_icside_state *state = info->state; in pata_icside_register_v5()
379 base = ecardm_iomap(info->ec, ECARD_RES_MEMC, 0, 0); in pata_icside_register_v5()
381 return -ENOMEM; in pata_icside_register_v5()
383 state->irq_port = base; in pata_icside_register_v5()
385 info->base = base; in pata_icside_register_v5()
386 info->irqaddr = base + ICS_ARCIN_V5_INTRSTAT; in pata_icside_register_v5()
387 info->irqmask = 1; in pata_icside_register_v5()
388 info->irqops = &pata_icside_ops_arcin_v5; in pata_icside_register_v5()
389 info->nr_ports = 1; in pata_icside_register_v5()
390 info->port[0] = &pata_icside_portinfo_v5; in pata_icside_register_v5()
392 info->raw_base = ecard_resource_start(info->ec, ECARD_RES_MEMC); in pata_icside_register_v5()
399 struct pata_icside_state *state = info->state; in pata_icside_register_v6()
400 struct expansion_card *ec = info->ec; in pata_icside_register_v6()
406 return -ENOMEM; in pata_icside_register_v6()
413 return -ENOMEM; in pata_icside_register_v6()
423 state->irq_port = easi_base; in pata_icside_register_v6()
424 state->ioc_base = ioc_base; in pata_icside_register_v6()
425 state->port[0].port_sel = sel; in pata_icside_register_v6()
426 state->port[1].port_sel = sel | 1; in pata_icside_register_v6()
428 info->base = easi_base; in pata_icside_register_v6()
429 info->irqops = &pata_icside_ops_arcin_v6; in pata_icside_register_v6()
430 info->nr_ports = 2; in pata_icside_register_v6()
431 info->port[0] = &pata_icside_portinfo_v6_1; in pata_icside_register_v6()
432 info->port[1] = &pata_icside_portinfo_v6_2; in pata_icside_register_v6()
434 info->raw_base = ecard_resource_start(ec, ECARD_RES_EASI); in pata_icside_register_v6()
435 info->raw_ioc_base = ecard_resource_start(ec, ECARD_RES_IOCFAST); in pata_icside_register_v6()
442 struct expansion_card *ec = info->ec; in pata_icside_add_ports()
446 if (info->irqaddr) { in pata_icside_add_ports()
447 ec->irqaddr = info->irqaddr; in pata_icside_add_ports()
448 ec->irqmask = info->irqmask; in pata_icside_add_ports()
450 if (info->irqops) in pata_icside_add_ports()
451 ecard_setirq(ec, info->irqops, info->state); in pata_icside_add_ports()
454 * Be on the safe side - disable interrupts in pata_icside_add_ports()
456 ec->ops->irqdisable(ec, ec->irq); in pata_icside_add_ports()
458 host = ata_host_alloc(&ec->dev, info->nr_ports); in pata_icside_add_ports()
460 return -ENOMEM; in pata_icside_add_ports()
462 host->private_data = info->state; in pata_icside_add_ports()
463 host->flags = ATA_HOST_SIMPLEX; in pata_icside_add_ports()
465 for (i = 0; i < info->nr_ports; i++) { in pata_icside_add_ports()
466 struct ata_port *ap = host->ports[i]; in pata_icside_add_ports()
468 ap->pio_mask = ATA_PIO4; in pata_icside_add_ports()
469 ap->mwdma_mask = info->mwdma_mask; in pata_icside_add_ports()
470 ap->flags |= ATA_FLAG_SLAVE_POSS; in pata_icside_add_ports()
471 ap->ops = &pata_icside_port_ops; in pata_icside_add_ports()
473 pata_icside_setup_ioaddr(ap, info->base, info, info->port[i]); in pata_icside_add_ports()
476 return ata_host_activate(host, ec->irq, ata_bmdma_interrupt, 0, in pata_icside_add_ports()
492 state = devm_kzalloc(&ec->dev, sizeof(*state), GFP_KERNEL); in pata_icside_probe()
494 ret = -ENOMEM; in pata_icside_probe()
498 state->type = ICS_TYPE_NOTYPE; in pata_icside_probe()
499 state->dma = NO_DMA; in pata_icside_probe()
511 state->type = type; in pata_icside_probe()
518 switch (state->type) { in pata_icside_probe()
520 dev_warn(&ec->dev, "A3IN unsupported\n"); in pata_icside_probe()
521 ret = -ENODEV; in pata_icside_probe()
525 dev_warn(&ec->dev, "A3USER unsupported\n"); in pata_icside_probe()
526 ret = -ENODEV; in pata_icside_probe()
538 dev_warn(&ec->dev, "unknown interface type\n"); in pata_icside_probe()
539 ret = -ENODEV; in pata_icside_probe()
566 ec->ops->irqdisable(ec, ec->irq); in pata_icside_shutdown()
575 struct pata_icside_state *state = host->private_data; in pata_icside_shutdown()
576 if (state->ioc_base) in pata_icside_shutdown()
577 writeb(0, state->ioc_base); in pata_icside_shutdown()
584 struct pata_icside_state *state = host->private_data; in pata_icside_remove()
591 * don't NULL out the drvdata - devres/libata wants it in pata_icside_remove()
594 if (state->dma != NO_DMA) in pata_icside_remove()
595 free_dma(state->dma); in pata_icside_remove()