Lines Matching full:ep93xx
3 * EP93XX PATA controller driver.
8 * Based on pata_scc.c, pata_icside.c and on earlier version of EP93XX
12 * DMA engine support based on spi-ep93xx.c by Mika Westerberg.
16 * Support for Cirrus Logic's EP93xx (EP9312, EP9315) CPUs
21 * Heavily based on the ep93xx-ide.c driver:
26 * EP93XX PATA controller driver.
29 * An ATA driver for the Cirrus Logic EP93xx PATA controller.
49 #include <linux/soc/cirrus/ep93xx.h>
51 #define DRV_NAME "ep93xx-ide"
164 * According to EP93xx User's Guide, WST field of IDECFG specifies number
202 * fastest ep93xx cpu speed (200MHz) and is better optimized for PIO4 timings
275 * edge of the DIORN signal. (EP93xx UG p27-14) in ep93xx_pata_read()
308 * DIOWN is low. (EP93xx UG p27-13) in ep93xx_pata_write()
335 * Calculate timings for the delay loop, assuming ep93xx cpu speed in ep93xx_pata_set_piomode()
336 * is 200MHz (maximum possible for ep93xx). If actual cpu speed is in ep93xx_pata_set_piomode()
783 * (EP93xx UG p27-17) in ep93xx_pata_dma_status()
873 /* ep93xx dma implementation limit */
875 /* ep93xx dma can't transfer 65536 bytes at once */
1025 MODULE_DESCRIPTION("low-level driver for cirrus ep93xx IDE controller");