1 // SPDX-License-Identifier: GPL-2.0-only
3  * pata_cmd640.c 	- CMD640 PCI PATA for new ATA layer
9  *  Copyright (C) 1995-1996  Linus Torvalds & authors (see driver)
34 	CFR = 0x50,
35 	CNTRL = 0x51,
36 	CMDTIM = 0x52,
37 	ARTIM0 = 0x53,
38 	DRWTIM0 = 0x54,
39 	ARTIM23 = 0x57,
40 	DRWTIM23 = 0x58,
41 	BRST = 0x59
45  *	cmd640_set_piomode	-	set initial PIO mode data
54 	struct cmd640_reg *timing = ap->private_data;  in cmd640_set_piomode()  local
55 	struct pci_dev *pdev = to_pci_dev(ap->host->dev);  in cmd640_set_piomode()
58 	const u8 setup_data[] = { 0x40, 0x40, 0x40, 0x80, 0x00 };  in cmd640_set_piomode()
60 	int arttim = ARTIM0 + 2 * adev->devno;  in cmd640_set_piomode()
63 	if (ata_timing_compute(adev, adev->pio_mode, &t, T, 0) < 0) {  in cmd640_set_piomode()
68 	/* The second channel has shared timings and the setup timing is  in cmd640_set_piomode()
70 	if (ap->port_no && pair) {  in cmd640_set_piomode()
72 		ata_timing_compute(pair, pair->pio_mode, &p, T, 1);  in cmd640_set_piomode()
78 		t.active += t.recover - 16;  in cmd640_set_piomode()
88 		t.recover--;	/* 640B only */  in cmd640_set_piomode()
93 		t.setup = 0xC0;  in cmd640_set_piomode()
97 	if (ap->port_no == 0) {  in cmd640_set_piomode()
98 		t.active &= 0x0F;	/* 0 = 16 */  in cmd640_set_piomode()
100 		/* Load setup timing */  in cmd640_set_piomode()
102 		reg &= 0x3F;  in cmd640_set_piomode()
113 		reg &= 0x3F;  in cmd640_set_piomode()
116 		timing->reg58[adev->devno] = (t.active << 4) | t.recover;  in cmd640_set_piomode()
122  *	cmd640_qc_issue	-	command preparation hook
131 	struct ata_port *ap = qc->ap;  in cmd640_qc_issue()
132 	struct ata_device *adev = qc->dev;  in cmd640_qc_issue()
133 	struct pci_dev *pdev = to_pci_dev(ap->host->dev);  in cmd640_qc_issue()
134 	struct cmd640_reg *timing = ap->private_data;  in cmd640_qc_issue()  local
136 	if (ap->port_no != 0 && adev->devno != timing->last) {  in cmd640_qc_issue()
137 		pci_write_config_byte(pdev, DRWTIM23, timing->reg58[adev->devno]);  in cmd640_qc_issue()
138 		timing->last = adev->devno;  in cmd640_qc_issue()
144  *	cmd640_port_start	-	port setup
153 	struct pci_dev *pdev = to_pci_dev(ap->host->dev);  in cmd640_port_start()
154 	struct cmd640_reg *timing;  in cmd640_port_start()  local
156 	timing = devm_kzalloc(&pdev->dev, sizeof(struct cmd640_reg), GFP_KERNEL);  in cmd640_port_start()
157 	if (timing == NULL)  in cmd640_port_start()
158 		return -ENOMEM;  in cmd640_port_start()
159 	timing->last = -1;	/* Force a load */  in cmd640_port_start()
160 	ap->private_data = timing;  in cmd640_port_start()
161 	return 0;  in cmd640_port_start()
166 	struct pci_dev *pdev	= to_pci_dev(ap->host->dev);  in cmd640_sff_irq_check()
167 	int irq_reg		= ap->port_no ? ARTIM23 : CFR;  in cmd640_sff_irq_check()
168 	u8  irq_stat, irq_mask	= ap->port_no ? 0x10 : 0x04;  in cmd640_sff_irq_check()
195 	pci_write_config_byte(pdev, 0x5B, 0x00);  in cmd640_hardware_init()
197 	pci_write_config_byte(pdev, CMDTIM, 0);  in cmd640_hardware_init()
199 	pci_write_config_byte(pdev, BRST, 0x40);  in cmd640_hardware_init()
207 	/* Do channel 0 */  in cmd640_hardware_init()
209 	pci_write_config_byte(pdev, CNTRL, ctrl | 0xC0);  in cmd640_hardware_init()
212 	ctrl |= 0x0C;  in cmd640_hardware_init()
232 	return ata_pci_sff_init_one(pdev, ppi, &cmd640_sht, NULL, 0);  in cmd640_init_one()
246 	return 0;  in cmd640_reinit_one()
251 	{ PCI_VDEVICE(CMD, 0x640), 0 },
269 MODULE_DESCRIPTION("low-level driver for CMD640 PATA controllers");