Lines Matching +full:tegra210 +full:- +full:pmc
1 // SPDX-License-Identifier: GPL-2.0-only
21 #include <soc/tegra/pmc.h>
25 #define DRV_NAME "tegra-ahci"
184 struct tegra_ahci_priv *tegra = hpriv->plat_data; in tegra_ahci_handle_quirks()
187 if (tegra->sata_aux_regs && !tegra->soc->supports_devslp) { in tegra_ahci_handle_quirks()
188 val = readl(tegra->sata_aux_regs + SATA_AUX_MISC_CNTL_1_0); in tegra_ahci_handle_quirks()
190 writel(val, tegra->sata_aux_regs + SATA_AUX_MISC_CNTL_1_0); in tegra_ahci_handle_quirks()
196 struct tegra_ahci_priv *tegra = hpriv->plat_data; in tegra124_ahci_init()
208 writel(BIT(0), tegra->sata_regs + SCFG_OFFSET + T_SATA0_INDEX); in tegra124_ahci_init()
210 val = readl(tegra->sata_regs + in tegra124_ahci_init()
216 writel(val, tegra->sata_regs + SCFG_OFFSET + in tegra124_ahci_init()
219 val = readl(tegra->sata_regs + in tegra124_ahci_init()
225 writel(val, tegra->sata_regs + SCFG_OFFSET + in tegra124_ahci_init()
229 tegra->sata_regs + SCFG_OFFSET + T_SATA0_CHX_PHY_CTRL11); in tegra124_ahci_init()
231 tegra->sata_regs + SCFG_OFFSET + T_SATA0_CHX_PHY_CTRL2); in tegra124_ahci_init()
233 writel(0, tegra->sata_regs + SCFG_OFFSET + T_SATA0_INDEX); in tegra124_ahci_init()
240 struct tegra_ahci_priv *tegra = hpriv->plat_data; in tegra_ahci_power_on()
243 ret = regulator_bulk_enable(tegra->soc->num_supplies, in tegra_ahci_power_on()
244 tegra->supplies); in tegra_ahci_power_on()
248 if (!tegra->pdev->dev.pm_domain) { in tegra_ahci_power_on()
250 tegra->sata_clk, in tegra_ahci_power_on()
251 tegra->sata_rst); in tegra_ahci_power_on()
256 reset_control_assert(tegra->sata_oob_rst); in tegra_ahci_power_on()
257 reset_control_assert(tegra->sata_cold_rst); in tegra_ahci_power_on()
263 reset_control_deassert(tegra->sata_cold_rst); in tegra_ahci_power_on()
264 reset_control_deassert(tegra->sata_oob_rst); in tegra_ahci_power_on()
269 clk_disable_unprepare(tegra->sata_clk); in tegra_ahci_power_on()
271 if (!tegra->pdev->dev.pm_domain) in tegra_ahci_power_on()
275 regulator_bulk_disable(tegra->soc->num_supplies, tegra->supplies); in tegra_ahci_power_on()
282 struct tegra_ahci_priv *tegra = hpriv->plat_data; in tegra_ahci_power_off()
286 reset_control_assert(tegra->sata_rst); in tegra_ahci_power_off()
287 reset_control_assert(tegra->sata_oob_rst); in tegra_ahci_power_off()
288 reset_control_assert(tegra->sata_cold_rst); in tegra_ahci_power_off()
290 clk_disable_unprepare(tegra->sata_clk); in tegra_ahci_power_off()
291 if (!tegra->pdev->dev.pm_domain) in tegra_ahci_power_off()
294 regulator_bulk_disable(tegra->soc->num_supplies, tegra->supplies); in tegra_ahci_power_off()
299 struct tegra_ahci_priv *tegra = hpriv->plat_data; in tegra_ahci_controller_init()
305 dev_err(&tegra->pdev->dev, in tegra_ahci_controller_init()
314 val = readl(tegra->sata_regs + SATA_FPCI_BAR5); in tegra_ahci_controller_init()
317 writel(val, tegra->sata_regs + SATA_FPCI_BAR5); in tegra_ahci_controller_init()
320 val = readl(tegra->sata_regs + SATA_CONFIGURATION_0); in tegra_ahci_controller_init()
322 writel(val, tegra->sata_regs + SATA_CONFIGURATION_0); in tegra_ahci_controller_init()
326 writel(val, tegra->sata_regs + SCFG_OFFSET + T_SATA0_CHX_PHY_CTRL17_0); in tegra_ahci_controller_init()
328 writel(val, tegra->sata_regs + SCFG_OFFSET + T_SATA0_CHX_PHY_CTRL18_0); in tegra_ahci_controller_init()
330 writel(val, tegra->sata_regs + SCFG_OFFSET + T_SATA0_CHX_PHY_CTRL20_0); in tegra_ahci_controller_init()
332 writel(val, tegra->sata_regs + SCFG_OFFSET + T_SATA0_CHX_PHY_CTRL21_0); in tegra_ahci_controller_init()
336 val = readl(tegra->sata_regs + SCFG_OFFSET + T_SATA_CFG_PHY_0); in tegra_ahci_controller_init()
339 writel(val, tegra->sata_regs + SCFG_OFFSET + T_SATA_CFG_PHY_0); in tegra_ahci_controller_init()
341 val = readl(tegra->sata_regs + SCFG_OFFSET + T_SATA0_NVOOB); in tegra_ahci_controller_init()
342 val &= ~(tegra->soc->regs->nvoob_comma_cnt_mask | in tegra_ahci_controller_init()
345 val |= (tegra->soc->regs->nvoob_comma_cnt_val | in tegra_ahci_controller_init()
348 writel(val, tegra->sata_regs + SCFG_OFFSET + T_SATA0_NVOOB); in tegra_ahci_controller_init()
353 val = readl(tegra->sata_regs + SCFG_OFFSET + T_SATA0_CFG2NVOOB_2); in tegra_ahci_controller_init()
356 writel(val, tegra->sata_regs + SCFG_OFFSET + T_SATA0_CFG2NVOOB_2); in tegra_ahci_controller_init()
358 if (tegra->soc->ops && tegra->soc->ops->init) in tegra_ahci_controller_init()
359 tegra->soc->ops->init(hpriv); in tegra_ahci_controller_init()
365 val = readl(tegra->sata_regs + SCFG_OFFSET + T_SATA0_CFG_1); in tegra_ahci_controller_init()
368 writel(val, tegra->sata_regs + SCFG_OFFSET + T_SATA0_CFG_1); in tegra_ahci_controller_init()
370 writel(val, tegra->sata_regs + SCFG_OFFSET + T_SATA0_CFG_9); in tegra_ahci_controller_init()
373 val = readl(tegra->sata_regs + SCFG_OFFSET + T_SATA0_CFG_SATA); in tegra_ahci_controller_init()
375 writel(val, tegra->sata_regs + SCFG_OFFSET + T_SATA0_CFG_SATA); in tegra_ahci_controller_init()
377 val = readl(tegra->sata_regs + SCFG_OFFSET + T_SATA0_BKDOOR_CC); in tegra_ahci_controller_init()
382 writel(val, tegra->sata_regs + SCFG_OFFSET + T_SATA0_BKDOOR_CC); in tegra_ahci_controller_init()
384 val = readl(tegra->sata_regs + SCFG_OFFSET + T_SATA0_CFG_SATA); in tegra_ahci_controller_init()
386 writel(val, tegra->sata_regs + SCFG_OFFSET + T_SATA0_CFG_SATA); in tegra_ahci_controller_init()
389 val = readl(tegra->sata_regs + SCFG_OFFSET + T_SATA0_AHCI_HBA_CAP_BKDR); in tegra_ahci_controller_init()
394 writel(val, tegra->sata_regs + SCFG_OFFSET + T_SATA0_AHCI_HBA_CAP_BKDR); in tegra_ahci_controller_init()
400 val = readl(tegra->sata_regs + SCFG_OFFSET + T_SATA0_CFG_35); in tegra_ahci_controller_init()
403 writel(val, tegra->sata_regs + SCFG_OFFSET + T_SATA0_CFG_35); in tegra_ahci_controller_init()
406 writel(val, tegra->sata_regs + SCFG_OFFSET + T_SATA0_AHCI_IDP1); in tegra_ahci_controller_init()
408 val = readl(tegra->sata_regs + SCFG_OFFSET + T_SATA0_CFG_PHY_1); in tegra_ahci_controller_init()
411 writel(val, tegra->sata_regs + SCFG_OFFSET + T_SATA0_CFG_PHY_1); in tegra_ahci_controller_init()
414 val = readl(tegra->sata_regs + SATA_CONFIGURATION_0); in tegra_ahci_controller_init()
416 writel(val, tegra->sata_regs + SATA_CONFIGURATION_0); in tegra_ahci_controller_init()
422 val = readl(tegra->sata_regs + SATA_INTR_MASK); in tegra_ahci_controller_init()
424 writel(val, tegra->sata_regs + SATA_INTR_MASK); in tegra_ahci_controller_init()
436 struct ahci_host_priv *hpriv = host->private_data; in tegra_ahci_host_stop()
454 "avdd", "hvdd", "vddio", "target-5v", "target-12v"
494 .compatible = "nvidia,tegra124-ahci",
498 .compatible = "nvidia,tegra210-ahci",
502 .compatible = "nvidia,tegra186-ahci",
524 tegra = devm_kzalloc(&pdev->dev, sizeof(*tegra), GFP_KERNEL); in tegra_ahci_probe()
526 return -ENOMEM; in tegra_ahci_probe()
528 hpriv->plat_data = tegra; in tegra_ahci_probe()
530 tegra->pdev = pdev; in tegra_ahci_probe()
531 tegra->soc = of_device_get_match_data(&pdev->dev); in tegra_ahci_probe()
533 tegra->sata_regs = devm_platform_ioremap_resource(pdev, 1); in tegra_ahci_probe()
534 if (IS_ERR(tegra->sata_regs)) in tegra_ahci_probe()
535 return PTR_ERR(tegra->sata_regs); in tegra_ahci_probe()
542 tegra->sata_aux_regs = devm_ioremap_resource(&pdev->dev, res); in tegra_ahci_probe()
543 if (IS_ERR(tegra->sata_aux_regs)) in tegra_ahci_probe()
544 return PTR_ERR(tegra->sata_aux_regs); in tegra_ahci_probe()
547 tegra->sata_rst = devm_reset_control_get(&pdev->dev, "sata"); in tegra_ahci_probe()
548 if (IS_ERR(tegra->sata_rst)) { in tegra_ahci_probe()
549 dev_err(&pdev->dev, "Failed to get sata reset\n"); in tegra_ahci_probe()
550 return PTR_ERR(tegra->sata_rst); in tegra_ahci_probe()
553 if (tegra->soc->has_sata_oob_rst) { in tegra_ahci_probe()
554 tegra->sata_oob_rst = devm_reset_control_get(&pdev->dev, in tegra_ahci_probe()
555 "sata-oob"); in tegra_ahci_probe()
556 if (IS_ERR(tegra->sata_oob_rst)) { in tegra_ahci_probe()
557 dev_err(&pdev->dev, "Failed to get sata-oob reset\n"); in tegra_ahci_probe()
558 return PTR_ERR(tegra->sata_oob_rst); in tegra_ahci_probe()
562 tegra->sata_cold_rst = devm_reset_control_get(&pdev->dev, "sata-cold"); in tegra_ahci_probe()
563 if (IS_ERR(tegra->sata_cold_rst)) { in tegra_ahci_probe()
564 dev_err(&pdev->dev, "Failed to get sata-cold reset\n"); in tegra_ahci_probe()
565 return PTR_ERR(tegra->sata_cold_rst); in tegra_ahci_probe()
568 tegra->sata_clk = devm_clk_get(&pdev->dev, "sata"); in tegra_ahci_probe()
569 if (IS_ERR(tegra->sata_clk)) { in tegra_ahci_probe()
570 dev_err(&pdev->dev, "Failed to get sata clock\n"); in tegra_ahci_probe()
571 return PTR_ERR(tegra->sata_clk); in tegra_ahci_probe()
574 tegra->supplies = devm_kcalloc(&pdev->dev, in tegra_ahci_probe()
575 tegra->soc->num_supplies, in tegra_ahci_probe()
576 sizeof(*tegra->supplies), GFP_KERNEL); in tegra_ahci_probe()
577 if (!tegra->supplies) in tegra_ahci_probe()
578 return -ENOMEM; in tegra_ahci_probe()
580 regulator_bulk_set_supply_names(tegra->supplies, in tegra_ahci_probe()
581 tegra->soc->supply_names, in tegra_ahci_probe()
582 tegra->soc->num_supplies); in tegra_ahci_probe()
584 ret = devm_regulator_bulk_get(&pdev->dev, in tegra_ahci_probe()
585 tegra->soc->num_supplies, in tegra_ahci_probe()
586 tegra->supplies); in tegra_ahci_probe()
588 dev_err(&pdev->dev, "Failed to get regulators\n"); in tegra_ahci_probe()