Lines Matching +full:dt +full:- +full:mmio
1 // SPDX-License-Identifier: GPL-2.0-only
18 #include <linux/mfd/syscon/imx6q-iomuxc-gpr.h>
21 #include <linux/hwmon-sysfs.h>
26 #define DRV_NAME "ahci-imx"
29 /* Timer 1-ms Register */
79 MODULE_PARM_DESC(hotplug, "AHCI IMX hot-plug support (0=Don't support, 1=support)");
83 static int imx_phy_crbit_assert(void __iomem *mmio, u32 bit, bool assert) in imx_phy_crbit_assert() argument
90 crval = readl(mmio + IMX_P0PHYCR); in imx_phy_crbit_assert()
95 writel(crval, mmio + IMX_P0PHYCR); in imx_phy_crbit_assert()
99 srval = readl(mmio + IMX_P0PHYSR); in imx_phy_crbit_assert()
103 } while (--timeout); in imx_phy_crbit_assert()
105 return timeout ? 0 : -ETIMEDOUT; in imx_phy_crbit_assert()
108 static int imx_phy_reg_addressing(u16 addr, void __iomem *mmio) in imx_phy_reg_addressing() argument
114 writel(crval, mmio + IMX_P0PHYCR); in imx_phy_reg_addressing()
117 ret = imx_phy_crbit_assert(mmio, IMX_P0PHYCR_CR_CAP_ADDR, true); in imx_phy_reg_addressing()
122 ret = imx_phy_crbit_assert(mmio, IMX_P0PHYCR_CR_CAP_ADDR, false); in imx_phy_reg_addressing()
129 static int imx_phy_reg_write(u16 val, void __iomem *mmio) in imx_phy_reg_write() argument
135 writel(crval, mmio + IMX_P0PHYCR); in imx_phy_reg_write()
138 ret = imx_phy_crbit_assert(mmio, IMX_P0PHYCR_CR_CAP_DATA, true); in imx_phy_reg_write()
143 ret = imx_phy_crbit_assert(mmio, IMX_P0PHYCR_CR_CAP_DATA, false); in imx_phy_reg_write()
153 writel(crval, mmio + IMX_P0PHYCR); in imx_phy_reg_write()
158 ret = imx_phy_crbit_assert(mmio, IMX_P0PHYCR_CR_WRITE, true); in imx_phy_reg_write()
163 ret = imx_phy_crbit_assert(mmio, IMX_P0PHYCR_CR_WRITE, false); in imx_phy_reg_write()
171 static int imx_phy_reg_read(u16 *val, void __iomem *mmio) in imx_phy_reg_read() argument
176 ret = imx_phy_crbit_assert(mmio, IMX_P0PHYCR_CR_READ, true); in imx_phy_reg_read()
181 *val = readl(mmio + IMX_P0PHYSR) & IMX_P0PHYSR_CR_DATA_OUT; in imx_phy_reg_read()
184 ret = imx_phy_crbit_assert(mmio, IMX_P0PHYCR_CR_READ, false); in imx_phy_reg_read()
193 struct imx_ahci_priv *imxpriv = hpriv->plat_data; in imx_sata_phy_reset()
194 void __iomem *mmio = hpriv->mmio; in imx_sata_phy_reset() local
199 if (imxpriv->type == AHCI_IMX6QP) { in imx_sata_phy_reset()
201 regmap_update_bits(imxpriv->gpr, IOMUXC_GPR5, in imx_sata_phy_reset()
204 regmap_update_bits(imxpriv->gpr, IOMUXC_GPR5, in imx_sata_phy_reset()
207 regmap_update_bits(imxpriv->gpr, IOMUXC_GPR5, in imx_sata_phy_reset()
214 ret = imx_phy_reg_addressing(IMX_CLOCK_RESET, mmio); in imx_sata_phy_reset()
217 ret = imx_phy_reg_write(IMX_CLOCK_RESET_RESET, mmio); in imx_sata_phy_reset()
224 ret = imx_phy_reg_addressing(IMX_LANE0_OUT_STAT, mmio); in imx_sata_phy_reset()
227 ret = imx_phy_reg_read(&val, mmio); in imx_sata_phy_reset()
232 } while (--timeout); in imx_sata_phy_reset()
234 return timeout ? 0 : -ETIMEDOUT; in imx_sata_phy_reset()
246 static int read_adc_sum(void *dev, u16 rtune_ctl_reg, void __iomem * mmio) in read_adc_sum() argument
252 imx_phy_reg_addressing(SATA_PHY_CR_CLOCK_RTUNE_CTL, mmio); in read_adc_sum()
253 imx_phy_reg_write(rtune_ctl_reg, mmio); in read_adc_sum()
259 imx_phy_reg_addressing(SATA_PHY_CR_CLOCK_ADC_OUT, mmio); in read_adc_sum()
261 imx_phy_reg_read(&adc_out_reg, mmio); in read_adc_sum()
278 imx_phy_reg_read(&adc_out_reg, mmio); in read_adc_sum()
302 void __iomem *mmio = hpriv->mmio; in __sata_ahci_read_temperature() local
304 /* check rd-wr to reg */ in __sata_ahci_read_temperature()
306 imx_phy_reg_addressing(SATA_PHY_CR_CLOCK_CRCMP_LT_LIMIT, mmio); in __sata_ahci_read_temperature()
307 imx_phy_reg_write(read_sum, mmio); in __sata_ahci_read_temperature()
308 imx_phy_reg_read(&read_sum, mmio); in __sata_ahci_read_temperature()
312 imx_phy_reg_write(0x5A5A, mmio); in __sata_ahci_read_temperature()
313 imx_phy_reg_read(&read_sum, mmio); in __sata_ahci_read_temperature()
317 imx_phy_reg_write(0x1234, mmio); in __sata_ahci_read_temperature()
318 imx_phy_reg_read(&read_sum, mmio); in __sata_ahci_read_temperature()
323 imx_phy_reg_addressing(SATA_PHY_CR_CLOCK_MPLL_TST, mmio); in __sata_ahci_read_temperature()
324 imx_phy_reg_read(&mpll_test_reg, mmio); in __sata_ahci_read_temperature()
325 imx_phy_reg_addressing(SATA_PHY_CR_CLOCK_RTUNE_CTL, mmio); in __sata_ahci_read_temperature()
326 imx_phy_reg_read(&rtune_ctl_reg, mmio); in __sata_ahci_read_temperature()
327 imx_phy_reg_addressing(SATA_PHY_CR_CLOCK_DAC_CTL, mmio); in __sata_ahci_read_temperature()
328 imx_phy_reg_read(&dac_ctl_reg, mmio); in __sata_ahci_read_temperature()
348 imx_phy_reg_addressing(SATA_PHY_CR_CLOCK_MPLL_TST, mmio); in __sata_ahci_read_temperature()
349 imx_phy_reg_write(mpll_test_reg, mmio); in __sata_ahci_read_temperature()
350 imx_phy_reg_addressing(SATA_PHY_CR_CLOCK_DAC_CTL, mmio); in __sata_ahci_read_temperature()
351 imx_phy_reg_write(dac_ctl_reg, mmio); in __sata_ahci_read_temperature()
352 m1 = read_adc_sum(dev, rtune_ctl_reg, mmio); in __sata_ahci_read_temperature()
357 m2 = read_adc_sum(dev, rtune_ctl_reg, mmio); in __sata_ahci_read_temperature()
369 imx_phy_reg_addressing(SATA_PHY_CR_CLOCK_MPLL_TST, mmio); in __sata_ahci_read_temperature()
370 imx_phy_reg_write(mpll_test_reg, mmio); in __sata_ahci_read_temperature()
371 imx_phy_reg_addressing(SATA_PHY_CR_CLOCK_DAC_CTL, mmio); in __sata_ahci_read_temperature()
372 imx_phy_reg_write(dac_ctl_reg, mmio); in __sata_ahci_read_temperature()
373 imx_phy_reg_addressing(SATA_PHY_CR_CLOCK_RTUNE_CTL, mmio); in __sata_ahci_read_temperature()
374 imx_phy_reg_write(rtune_ctl_reg, mmio); in __sata_ahci_read_temperature()
379 a = (m2 - m1) / (m2/1000); in __sata_ahci_read_temperature()
380 *temp = ((-559) * a * a) / 1000 + (1379) * a + (-458000); in __sata_ahci_read_temperature()
420 struct imx_ahci_priv *imxpriv = hpriv->plat_data; in imx8_sata_enable()
421 struct device *dev = &imxpriv->ahci_pdev->dev; in imx8_sata_enable()
431 ret = phy_init(imxpriv->cali_phy0); in imx8_sata_enable()
436 ret = phy_power_on(imxpriv->cali_phy0); in imx8_sata_enable()
441 ret = phy_init(imxpriv->cali_phy1); in imx8_sata_enable()
446 ret = phy_power_on(imxpriv->cali_phy1); in imx8_sata_enable()
451 ret = phy_init(imxpriv->sata_phy); in imx8_sata_enable()
456 ret = phy_set_mode(imxpriv->sata_phy, PHY_MODE_SATA); in imx8_sata_enable()
461 ret = phy_power_on(imxpriv->sata_phy); in imx8_sata_enable()
468 phy_power_off(imxpriv->cali_phy1); in imx8_sata_enable()
469 phy_exit(imxpriv->cali_phy1); in imx8_sata_enable()
470 phy_power_off(imxpriv->cali_phy0); in imx8_sata_enable()
471 phy_exit(imxpriv->cali_phy0); in imx8_sata_enable()
474 val = readl(hpriv->mmio + IMX8QM_SATA_AHCI_PTC); in imx8_sata_enable()
477 writel(val, hpriv->mmio + IMX8QM_SATA_AHCI_PTC); in imx8_sata_enable()
482 phy_exit(imxpriv->sata_phy); in imx8_sata_enable()
484 phy_power_off(imxpriv->cali_phy1); in imx8_sata_enable()
486 phy_exit(imxpriv->cali_phy1); in imx8_sata_enable()
488 phy_power_off(imxpriv->cali_phy0); in imx8_sata_enable()
490 phy_exit(imxpriv->cali_phy0); in imx8_sata_enable()
497 struct imx_ahci_priv *imxpriv = hpriv->plat_data; in imx_sata_enable()
498 struct device *dev = &imxpriv->ahci_pdev->dev; in imx_sata_enable()
501 if (imxpriv->no_device) in imx_sata_enable()
508 ret = clk_prepare_enable(imxpriv->sata_ref_clk); in imx_sata_enable()
512 if (imxpriv->type == AHCI_IMX6Q || imxpriv->type == AHCI_IMX6QP) { in imx_sata_enable()
519 regmap_update_bits(imxpriv->gpr, IOMUXC_GPR13, in imx_sata_enable()
530 imxpriv->phy_params); in imx_sata_enable()
531 regmap_update_bits(imxpriv->gpr, IOMUXC_GPR13, in imx_sata_enable()
542 } else if (imxpriv->type == AHCI_IMX8QM) { in imx_sata_enable()
554 clk_disable_unprepare(imxpriv->sata_ref_clk); in imx_sata_enable()
563 struct imx_ahci_priv *imxpriv = hpriv->plat_data; in imx_sata_disable()
565 if (imxpriv->no_device) in imx_sata_disable()
568 switch (imxpriv->type) { in imx_sata_disable()
570 regmap_update_bits(imxpriv->gpr, IOMUXC_GPR5, in imx_sata_disable()
573 regmap_update_bits(imxpriv->gpr, IOMUXC_GPR13, in imx_sata_disable()
579 regmap_update_bits(imxpriv->gpr, IOMUXC_GPR13, in imx_sata_disable()
585 if (imxpriv->sata_phy) { in imx_sata_disable()
586 phy_power_off(imxpriv->sata_phy); in imx_sata_disable()
587 phy_exit(imxpriv->sata_phy); in imx_sata_disable()
595 clk_disable_unprepare(imxpriv->sata_ref_clk); in imx_sata_disable()
604 struct ata_host *host = dev_get_drvdata(ap->dev); in ahci_imx_error_handler()
605 struct ahci_host_priv *hpriv = host->private_data; in ahci_imx_error_handler()
606 void __iomem *mmio = hpriv->mmio; in ahci_imx_error_handler() local
607 struct imx_ahci_priv *imxpriv = hpriv->plat_data; in ahci_imx_error_handler()
611 if (imxpriv->type == AHCI_IMX8QM) in ahci_imx_error_handler()
614 if (!(imxpriv->first_time) || ahci_imx_hotplug) in ahci_imx_error_handler()
617 imxpriv->first_time = false; in ahci_imx_error_handler()
619 ata_for_each_dev(dev, &ap->link, ENABLED) in ahci_imx_error_handler()
626 reg_val = readl(mmio + IMX_P0PHYCR); in ahci_imx_error_handler()
627 writel(reg_val | IMX_P0PHYCR_TEST_PDDQ, mmio + IMX_P0PHYCR); in ahci_imx_error_handler()
629 imxpriv->no_device = true; in ahci_imx_error_handler()
631 dev_info(ap->dev, "no device found, disabling link.\n"); in ahci_imx_error_handler()
632 dev_info(ap->dev, "pass " MODULE_PARAM_PREFIX ".hotplug=1 to enable hotplug\n"); in ahci_imx_error_handler()
638 struct ata_port *ap = link->ap; in ahci_imx_softreset()
639 struct ata_host *host = dev_get_drvdata(ap->dev); in ahci_imx_softreset()
640 struct ahci_host_priv *hpriv = host->private_data; in ahci_imx_softreset()
641 struct imx_ahci_priv *imxpriv = hpriv->plat_data; in ahci_imx_softreset()
644 if (imxpriv->type == AHCI_IMX53) in ahci_imx_softreset()
667 { .compatible = "fsl,imx53-ahci", .data = (void *)AHCI_IMX53 },
668 { .compatible = "fsl,imx6q-ahci", .data = (void *)AHCI_IMX6Q },
669 { .compatible = "fsl,imx6qp-ahci", .data = (void *)AHCI_IMX6QP },
670 { .compatible = "fsl,imx8qm-ahci", .data = (void *)AHCI_IMX8QM },
764 .name = "fsl,transmit-level-mV",
769 .name = "fsl,transmit-boost-mdB",
774 .name = "fsl,transmit-atten-16ths",
779 .name = "fsl,receive-eq-mdB",
784 .name = "fsl,no-spread-spectrum",
793 struct device_node *np = dev->of_node; in imx_ahci_parse_props()
800 if (prop->num_values == 0) { in imx_ahci_parse_props()
801 if (of_property_read_bool(np, prop->name)) in imx_ahci_parse_props()
802 reg_value |= prop->set_value; in imx_ahci_parse_props()
804 reg_value |= prop->def_value; in imx_ahci_parse_props()
808 if (of_property_read_u32(np, prop->name, &of_val)) { in imx_ahci_parse_props()
810 prop->name, prop->def_value); in imx_ahci_parse_props()
811 reg_value |= prop->def_value; in imx_ahci_parse_props()
815 for (j = 0; j < prop->num_values; j++) { in imx_ahci_parse_props()
816 if (prop->values[j].of_value == of_val) { in imx_ahci_parse_props()
818 prop->name, of_val, prop->values[j].reg_value); in imx_ahci_parse_props()
819 reg_value |= prop->values[j].reg_value; in imx_ahci_parse_props()
824 if (j == prop->num_values) { in imx_ahci_parse_props()
825 dev_err(dev, "DT property %s is not a valid value\n", in imx_ahci_parse_props()
826 prop->name); in imx_ahci_parse_props()
827 reg_value |= prop->def_value; in imx_ahci_parse_props()
840 imxpriv->sata_phy = devm_phy_get(dev, "sata-phy"); in imx8_sata_probe()
841 if (IS_ERR(imxpriv->sata_phy)) in imx8_sata_probe()
842 return dev_err_probe(dev, PTR_ERR(imxpriv->sata_phy), in imx8_sata_probe()
845 imxpriv->cali_phy0 = devm_phy_get(dev, "cali-phy0"); in imx8_sata_probe()
846 if (IS_ERR(imxpriv->cali_phy0)) in imx8_sata_probe()
847 return dev_err_probe(dev, PTR_ERR(imxpriv->cali_phy0), in imx8_sata_probe()
849 imxpriv->cali_phy1 = devm_phy_get(dev, "cali-phy1"); in imx8_sata_probe()
850 if (IS_ERR(imxpriv->cali_phy1)) in imx8_sata_probe()
851 return dev_err_probe(dev, PTR_ERR(imxpriv->cali_phy1), in imx8_sata_probe()
858 struct device *dev = &pdev->dev; in imx_ahci_probe()
866 return -ENOMEM; in imx_ahci_probe()
868 imxpriv->ahci_pdev = pdev; in imx_ahci_probe()
869 imxpriv->no_device = false; in imx_ahci_probe()
870 imxpriv->first_time = true; in imx_ahci_probe()
871 imxpriv->type = (enum ahci_imx_type)device_get_match_data(dev); in imx_ahci_probe()
873 imxpriv->sata_clk = devm_clk_get(dev, "sata"); in imx_ahci_probe()
874 if (IS_ERR(imxpriv->sata_clk)) { in imx_ahci_probe()
876 return PTR_ERR(imxpriv->sata_clk); in imx_ahci_probe()
879 imxpriv->sata_ref_clk = devm_clk_get(dev, "sata_ref"); in imx_ahci_probe()
880 if (IS_ERR(imxpriv->sata_ref_clk)) { in imx_ahci_probe()
882 return PTR_ERR(imxpriv->sata_ref_clk); in imx_ahci_probe()
885 if (imxpriv->type == AHCI_IMX6Q || imxpriv->type == AHCI_IMX6QP) { in imx_ahci_probe()
888 imxpriv->gpr = syscon_regmap_lookup_by_compatible( in imx_ahci_probe()
889 "fsl,imx6q-iomuxc-gpr"); in imx_ahci_probe()
890 if (IS_ERR(imxpriv->gpr)) { in imx_ahci_probe()
892 "failed to find fsl,imx6q-iomux-gpr regmap\n"); in imx_ahci_probe()
893 return PTR_ERR(imxpriv->gpr); in imx_ahci_probe()
899 imxpriv->phy_params = in imx_ahci_probe()
904 } else if (imxpriv->type == AHCI_IMX8QM) { in imx_ahci_probe()
914 hpriv->plat_data = imxpriv; in imx_ahci_probe()
916 ret = clk_prepare_enable(imxpriv->sata_clk); in imx_ahci_probe()
920 if (imxpriv->type == AHCI_IMX53 && in imx_ahci_probe()
947 reg_val = readl(hpriv->mmio + HOST_CAP); in imx_ahci_probe()
950 writel(reg_val, hpriv->mmio + HOST_CAP); in imx_ahci_probe()
952 reg_val = readl(hpriv->mmio + HOST_PORTS_IMPL); in imx_ahci_probe()
955 writel(reg_val, hpriv->mmio + HOST_PORTS_IMPL); in imx_ahci_probe()
958 if (imxpriv->type != AHCI_IMX8QM) { in imx_ahci_probe()
963 imxpriv->ahb_clk = devm_clk_get(dev, "ahb"); in imx_ahci_probe()
964 if (IS_ERR(imxpriv->ahb_clk)) { in imx_ahci_probe()
966 ret = PTR_ERR(imxpriv->ahb_clk); in imx_ahci_probe()
969 reg_val = clk_get_rate(imxpriv->ahb_clk) / 1000; in imx_ahci_probe()
970 writel(reg_val, hpriv->mmio + IMX_TIMER1MS); in imx_ahci_probe()
983 clk_disable_unprepare(imxpriv->sata_clk); in imx_ahci_probe()
989 struct ahci_host_priv *hpriv = host->private_data; in ahci_imx_host_stop()
990 struct imx_ahci_priv *imxpriv = hpriv->plat_data; in ahci_imx_host_stop()
993 clk_disable_unprepare(imxpriv->sata_clk); in ahci_imx_host_stop()
1000 struct ahci_host_priv *hpriv = host->private_data; in imx_ahci_suspend()
1015 struct ahci_host_priv *hpriv = host->private_data; in imx_ahci_resume()