Lines Matching +full:force +full:- +full:external +full:- +full:phy
1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 * ahci.h - Common AHCI SATA definitions and declarations
6 * Please ALWAYS copy linux-ide@vger.kernel.org
9 * Copyright 2004-2005 Red Hat, Inc.
12 * as Documentation/driver-api/libata.rst
25 #include <linux/phy/phy.h>
80 HOST_RESET = BIT(0), /* reset controller; self-clear */
86 HOST_CAP_SXS = BIT(5), /* Supports External SATA */
92 HOST_CAP_FBS = BIT(16), /* FIS-based switching support */
98 HOST_CAP_SSS = BIT(27), /* Staggered Spin-up */
102 HOST_CAP_64 = BIT(31), /* PCI DAC (64-bit DMA) support */
123 PORT_SCR_STAT = 0x28, /* SATA phy register: SStatus */
124 PORT_SCR_CTL = 0x2c, /* SATA phy register: SControl */
125 PORT_SCR_ERR = 0x30, /* SATA phy register: SError */
126 PORT_SCR_ACT = 0x34, /* SATA phy register: SActive */
127 PORT_SCR_NTF = 0x3c, /* SATA phy register: SNotification */
128 PORT_FBS = 0x40, /* FIS-based Switching */
137 PORT_IRQ_IF_NONFATAL = BIT(26), /* interface non-fatal error */
169 PORT_CMD_ESP = BIT(21), /* External Sata Port */
209 /* hpriv->flags bits */
216 AHCI_HFLAG_32BIT_ONLY = BIT(3), /* force 32bit */
221 AHCI_HFLAG_YES_NCQ = BIT(9), /* force NCQ cap on */
227 AHCI_HFLAG_YES_FBS = BIT(14), /* force FBS cap on */
230 error-handling stage) */
235 AHCI_HFLAG_MULTI_MSI = BIT(20), /* per-port MSI(-X) */
241 AHCI_HFLAG_YES_ALPM = BIT(23), /* force ALPM cap on */
250 /* ap->flags bits */
271 EM_CTL_SES = BIT(18), /* SES-2 messages supported */
272 EM_CTL_SAFTE = BIT(17), /* SAF-TE messages supported */
277 EM_MSG_TYPE_SAFTE = BIT(1), /* SAF-TE */
278 EM_MSG_TYPE_SES2 = BIT(2), /* SES-2 */
333 void __iomem * mmio; /* bus-independent mem map */
356 * the PHY position in this array.
358 struct phy **phys;
377 /* only required for per-port MSI(-X) support */
439 void __iomem *mmio = hpriv->mmio; in __ahci_port_base()
446 struct ahci_host_priv *hpriv = ap->host->private_data; in ahci_port_base()
448 return __ahci_port_base(hpriv, ap->port_no); in ahci_port_base()