Lines Matching +full:address +full:- +full:address +full:- +full:data
1 // SPDX-License-Identifier: GPL-2.0
21 .address = 0x00,
26 .address = 0x04,
29 }, /* SYSX -> VSYS_SX */
31 .address = 0x08,
34 }, /* SYSU -> VSYS_U */
36 .address = 0x0c,
39 }, /* SYSS -> VSYS_S */
41 .address = 0x10,
44 }, /* V50S -> V5P0S */
46 .address = 0x14,
49 }, /* HOST -> VHOST, USB2/3 host */
51 .address = 0x18,
54 }, /* VBUS -> VBUS, USB2/3 OTG */
56 .address = 0x1c,
59 }, /* HDMI -> VHDMI */
61 .address = 0x20,
66 .address = 0x24,
69 }, /* X285 -> V2P85SX, camera */
71 .address = 0x28,
76 .address = 0x2c,
79 }, /* V33S -> V3P3S, display/ssd/audio */
81 .address = 0x30,
84 }, /* V33U -> V3P3U, SDIO wifi&bt */
86 .address = 0x34 .. 0x40,
91 .address = 0x44,
94 }, /* V18S -> V1P8S, SOC/USB PHY/SIM */
96 .address = 0x48,
99 }, /* V18X -> V1P8SX, eMMC/camara/audio */
101 .address = 0x4c,
104 }, /* V18U -> V1P8U, LPDDR */
106 .address = 0x50,
109 }, /* V12X -> V1P2SX, SOC SFR */
111 .address = 0x54,
114 }, /* V12S -> V1P2S, MIPI */
116 .address = 0x58,
121 .address = 0x5c,
124 }, /* V10S -> V1P0S, SOC GFX */
126 .address = 0x60,
129 }, /* V10X -> V1P0SX, SOC display/DDR IO/PCIe */
131 .address = 0x64,
134 }, /* V105 -> V1P05S, L2 SRAM */
139 .address = 0x00,
143 .address = 0x04,
147 .address = 0x08,
151 .address = 0x0c,
155 .address = 0x10,
159 .address = 0x14,
163 .address = 0x18,
167 .address = 0x1c,
171 .address = 0x20,
175 .address = 0x48,
179 .address = 0x4c,
183 .address = 0x50,
191 int data; in intel_crc_pmic_get_power() local
193 if (regmap_read(regmap, reg, &data)) in intel_crc_pmic_get_power()
194 return -EIO; in intel_crc_pmic_get_power()
196 *value = (data & PWR_SOURCE_SELECT) && (data & BIT(bit)) ? 1 : 0; in intel_crc_pmic_get_power()
203 int data; in intel_crc_pmic_update_power() local
205 if (regmap_read(regmap, reg, &data)) in intel_crc_pmic_update_power()
206 return -EIO; in intel_crc_pmic_update_power()
209 data |= PWR_SOURCE_SELECT | BIT(bit); in intel_crc_pmic_update_power()
211 data &= ~BIT(bit); in intel_crc_pmic_update_power()
212 data |= PWR_SOURCE_SELECT; in intel_crc_pmic_update_power()
215 if (regmap_write(regmap, reg, data)) in intel_crc_pmic_update_power()
216 return -EIO; in intel_crc_pmic_update_power()
226 * and 2bits in reg-1: bit0,1 in intel_crc_pmic_get_raw_temp()
229 regmap_read(regmap, reg - 1, &temp_h)) in intel_crc_pmic_get_raw_temp()
230 return -EIO; in intel_crc_pmic_get_raw_temp()
238 regmap_update_bits(regmap, reg - 1, 0x3, raw >> 8) ? -EIO : 0; in intel_crc_pmic_update_aux()
247 return -EIO; in intel_crc_pmic_get_policy()
259 return -EIO; in intel_crc_pmic_update_policy()
262 return -EIO; in intel_crc_pmic_update_policy()
265 return -EIO; in intel_crc_pmic_update_policy()
269 return -EIO; in intel_crc_pmic_update_policy()
291 struct intel_soc_pmic *pmic = dev_get_drvdata(pdev->dev.parent); in intel_crc_pmic_opregion_probe()
292 return intel_pmic_install_opregion_handler(&pdev->dev, in intel_crc_pmic_opregion_probe()
293 ACPI_HANDLE(pdev->dev.parent), pmic->regmap, in intel_crc_pmic_opregion_probe()