Lines Matching full:presync
273 presync_sem = req->sem0.presync + req->sem1.presync + req->sem2.presync + req->sem3.presync; in encode_reqs()
277 presync_sem = req->sem0.presync << 0 | req->sem1.presync << 1 | in encode_reqs()
278 req->sem2.presync << 2 | req->sem3.presync << 3; in encode_reqs()
300 * There can only be one presync sem. That needs to be on every xfer in encode_reqs()
324 req->sem0.presync, in encode_reqs()
331 req->sem1.presync, in encode_reqs()
338 req->sem2.presync, in encode_reqs()
345 req->sem3.presync, in encode_reqs()
361 * has no presync condition. in encode_reqs()
363 * hardware behavior to avoid needing one when there is a presync in encode_reqs()
364 * condition. When a presync exists, all requests for that same in encode_reqs()
365 * presync will be queued into a fifo. Thus, since we queue the in encode_reqs()
375 req->sem0.presync, req->sem0.cmd, in encode_reqs()
378 req->sem1.presync, req->sem1.cmd, in encode_reqs()
381 req->sem2.presync, req->sem2.cmd, in encode_reqs()
384 req->sem3.presync, req->sem3.cmd, in encode_reqs()
550 !(sem->presync == 0 || sem->presync == 1) || sem->pad || in invalid_sem()