1 // SPDX-License-Identifier: GPL-2.0-only
3  * Copyright (C) 2020-2024 Intel Corporation
90 		return -EIO;  in host_ss_noc_qreqn_check_37xx()
100 		return -EIO;  in host_ss_noc_qreqn_check_40xx()
118 		return -EIO;  in host_ss_noc_qacceptn_check_37xx()
128 		return -EIO;  in host_ss_noc_qacceptn_check_40xx()
146 		return -EIO;  in host_ss_noc_qdeny_check_37xx()
156 		return -EIO;  in host_ss_noc_qdeny_check_40xx()
175 		return -EIO;  in top_noc_qrenqn_check_37xx()
186 		return -EIO;  in top_noc_qrenqn_check_40xx()
275 	if (vdev->hw->pll.profiling_freq == PLL_PROFILING_FREQ_DEFAULT) {  in pwr_island_delay_set_50xx()
316 		ndelay(500);  in pwr_island_trickle_drive_40xx()
331 		ndelay(500);  in pwr_island_drive_37xx()
599 		return -EIO;  in top_noc_qacceptn_check_37xx()
610 		return -EIO;  in top_noc_qacceptn_check_40xx()
629 		return -EIO;  in top_noc_qdeny_check_37xx()
640 		return -EIO;  in top_noc_qdeny_check_40xx()
816 	val = vdev->fw->entry_point >> 9;  in soc_cpu_boot_37xx()
822 	ivpu_dbg(vdev, PM, "Booting firmware, mode: %s\n",  in soc_cpu_boot_37xx()
823 		 vdev->fw->entry_point == vdev->fw->cold_boot_entry_point ? "cold boot" : "resume");  in soc_cpu_boot_37xx()
833 		return -EIO;  in cpu_noc_qacceptn_check_40xx()
843 		return -EIO;  in cpu_noc_qdeny_check_40xx()
895 	val64 = vdev->fw->entry_point;  in soc_cpu_boot_40xx()
896 	val64 <<= ffs(VPU_40XX_HOST_SS_VERIFICATION_ADDRESS_LO_IMAGE_LOCATION_MASK) - 1;  in soc_cpu_boot_40xx()
903 	ivpu_dbg(vdev, PM, "Booting firmware, mode: %s\n",  in soc_cpu_boot_40xx()
921 	/* Enable writing and set non-zero WDT value */  in wdt_disable_37xx()
1065 	atomic_inc(&vdev->hw->firewall_irq_counter);  in irq_noc_firewall_handler()
1068 		 atomic_read(&vdev->hw->firewall_irq_counter));  in irq_noc_firewall_handler()
1088 		ivpu_dbg(vdev, IRQ, "MMU sync complete\n");  in ivpu_hw_ip_irq_handler_37xx()
1122 		ivpu_dbg(vdev, IRQ, "MMU sync complete\n");  in ivpu_hw_ip_irq_handler_40xx()
1141 	u32 reg_stride = VPU_37XX_CPU_SS_DOORBELL_1 - VPU_37XX_CPU_SS_DOORBELL_0;  in db_set_37xx()
1149 	u32 reg_stride = VPU_40XX_CPU_SS_DOORBELL_1 - VPU_40XX_CPU_SS_DOORBELL_0;  in db_set_40xx()