Lines Matching +full:fw +full:- +full:cfg

1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2020-2025 Intel Corporation
27 #define FW_RUNTIME_MAX_ADDR (FW_GLOBAL_MEM_END - FW_SHARED_MEM_SIZE)
35 /* Check if FW API is compatible with the driver */
73 int ret = -ENOENT; in ivpu_fw_request()
77 ret = request_firmware(&vdev->fw->file, ivpu_firmware, vdev->drm.dev); in ivpu_fw_request()
79 vdev->fw->name = ivpu_firmware; in ivpu_fw_request()
87 ret = firmware_request_nowarn(&vdev->fw->file, fw_names[i].name, vdev->drm.dev); in ivpu_fw_request()
89 vdev->fw->name = fw_names[i].name; in ivpu_fw_request()
103 u16 major = (u16)(fw_hdr->api_version[index] >> 16); in ivpu_fw_check_api()
104 u16 minor = (u16)(fw_hdr->api_version[index]); in ivpu_fw_check_api()
107 ivpu_err(vdev, "Incompatible FW %s API version: %d.%d, required %d.0 or later\n", in ivpu_fw_check_api()
109 return -EINVAL; in ivpu_fw_check_api()
112 ivpu_warn(vdev, "Major FW %s API version different: %d.%d (expected %d.%d)\n", in ivpu_fw_check_api()
115 ivpu_dbg(vdev, FW_BOOT, "FW %s API version: %d.%d (expected %d.%d)\n", in ivpu_fw_check_api()
125 u16 fw_major = (u16)(fw_hdr->api_version[index] >> 16); in ivpu_fw_check_api_ver_lt()
126 u16 fw_minor = (u16)(fw_hdr->api_version[index]); in ivpu_fw_check_api_ver_lt()
156 struct ivpu_fw_info *fw = vdev->fw; in ivpu_fw_parse() local
157 const struct vpu_firmware_header *fw_hdr = (const void *)fw->file->data; in ivpu_fw_parse()
160 if (fw->file->size <= FW_FILE_IMAGE_OFFSET) { in ivpu_fw_parse()
161 ivpu_err(vdev, "Firmware file is too small: %zu\n", fw->file->size); in ivpu_fw_parse()
162 return -EINVAL; in ivpu_fw_parse()
165 if (fw_hdr->header_version != VPU_FW_HEADER_VERSION) { in ivpu_fw_parse()
166 ivpu_err(vdev, "Invalid firmware header version: %u\n", fw_hdr->header_version); in ivpu_fw_parse()
167 return -EINVAL; in ivpu_fw_parse()
170 runtime_addr = fw_hdr->boot_params_load_address; in ivpu_fw_parse()
171 runtime_size = fw_hdr->runtime_size; in ivpu_fw_parse()
172 image_load_addr = fw_hdr->image_load_address; in ivpu_fw_parse()
173 image_size = fw_hdr->image_size; in ivpu_fw_parse()
177 return -EINVAL; in ivpu_fw_parse()
180 if (runtime_size < fw->file->size || runtime_size > FW_RUNTIME_MAX_SIZE) { in ivpu_fw_parse()
182 return -EINVAL; in ivpu_fw_parse()
185 if (FW_FILE_IMAGE_OFFSET + image_size > fw->file->size) { in ivpu_fw_parse()
187 return -EINVAL; in ivpu_fw_parse()
194 return -EINVAL; in ivpu_fw_parse()
197 if (fw_hdr->shave_nn_fw_size > FW_SHAVE_NN_MAX_SIZE) { in ivpu_fw_parse()
198 ivpu_err(vdev, "SHAVE NN firmware is too big: %u\n", fw_hdr->shave_nn_fw_size); in ivpu_fw_parse()
199 return -EINVAL; in ivpu_fw_parse()
202 if (fw_hdr->entry_point < image_load_addr || in ivpu_fw_parse()
203 fw_hdr->entry_point >= image_load_addr + image_size) { in ivpu_fw_parse()
204 ivpu_err(vdev, "Invalid entry point: 0x%llx\n", fw_hdr->entry_point); in ivpu_fw_parse()
205 return -EINVAL; in ivpu_fw_parse()
208 fw_hdr->header_version, fw_hdr->image_format); in ivpu_fw_parse()
210 if (!scnprintf(fw->version, sizeof(fw->version), "%s", fw->file->data + VPU_FW_HEADER_SIZE)) in ivpu_fw_parse()
213 ivpu_info(vdev, "Firmware: %s, version: %s\n", fw->name, fw->version); in ivpu_fw_parse()
216 return -EINVAL; in ivpu_fw_parse()
218 return -EINVAL; in ivpu_fw_parse()
220 fw->runtime_addr = runtime_addr; in ivpu_fw_parse()
221 fw->runtime_size = runtime_size; in ivpu_fw_parse()
222 fw->image_load_offset = image_load_addr - runtime_addr; in ivpu_fw_parse()
223 fw->image_size = image_size; in ivpu_fw_parse()
224 fw->shave_nn_size = PAGE_ALIGN(fw_hdr->shave_nn_fw_size); in ivpu_fw_parse()
226 fw->cold_boot_entry_point = fw_hdr->entry_point; in ivpu_fw_parse()
227 fw->entry_point = fw->cold_boot_entry_point; in ivpu_fw_parse()
229 fw->trace_level = min_t(u32, ivpu_fw_log_level, IVPU_FW_LOG_FATAL); in ivpu_fw_parse()
230 fw->trace_destination_mask = VPU_TRACE_DESTINATION_VERBOSE_TRACING; in ivpu_fw_parse()
231 fw->trace_hw_component_mask = -1; in ivpu_fw_parse()
233 fw->dvfs_mode = 0; in ivpu_fw_parse()
235 fw->sched_mode = ivpu_fw_sched_mode_select(vdev, fw_hdr); in ivpu_fw_parse()
236 ivpu_info(vdev, "Scheduler mode: %s\n", fw->sched_mode ? "HW" : "OS"); in ivpu_fw_parse()
238 if (fw_hdr->preemption_buffer_1_max_size) in ivpu_fw_parse()
239 fw->primary_preempt_buf_size = fw_hdr->preemption_buffer_1_max_size; in ivpu_fw_parse()
241 fw->primary_preempt_buf_size = fw_hdr->preemption_buffer_1_size; in ivpu_fw_parse()
243 if (fw_hdr->preemption_buffer_2_max_size) in ivpu_fw_parse()
244 fw->secondary_preempt_buf_size = fw_hdr->preemption_buffer_2_max_size; in ivpu_fw_parse()
246 fw->secondary_preempt_buf_size = fw_hdr->preemption_buffer_2_size; in ivpu_fw_parse()
248 fw->primary_preempt_buf_size, fw->secondary_preempt_buf_size); in ivpu_fw_parse()
250 if (fw_hdr->ro_section_start_address && !is_within_range(fw_hdr->ro_section_start_address, in ivpu_fw_parse()
251 fw_hdr->ro_section_size, in ivpu_fw_parse()
252 fw_hdr->image_load_address, in ivpu_fw_parse()
253 fw_hdr->image_size)) { in ivpu_fw_parse()
254 ivpu_err(vdev, "Invalid read-only section: start address 0x%llx, size %u\n", in ivpu_fw_parse()
255 fw_hdr->ro_section_start_address, fw_hdr->ro_section_size); in ivpu_fw_parse()
256 return -EINVAL; in ivpu_fw_parse()
259 fw->read_only_addr = fw_hdr->ro_section_start_address; in ivpu_fw_parse()
260 fw->read_only_size = fw_hdr->ro_section_size; in ivpu_fw_parse()
263 fw->file->size, fw->image_size, fw->runtime_size, fw->shave_nn_size); in ivpu_fw_parse()
265 fw->runtime_addr, image_load_addr, fw->entry_point); in ivpu_fw_parse()
266 ivpu_dbg(vdev, FW_BOOT, "Read-only section: address 0x%llx, size %u\n", in ivpu_fw_parse()
267 fw->read_only_addr, fw->read_only_size); in ivpu_fw_parse()
274 release_firmware(vdev->fw->file); in ivpu_fw_release()
277 /* Initialize workarounds that depend on FW version */
281 const struct vpu_firmware_header *fw_hdr = (const void *)vdev->fw->file->data; in ivpu_fw_init_wa()
285 vdev->wa.disable_d0i3_msg = true; in ivpu_fw_init_wa()
289 vdev->wa.disable_d0i3_msg = false; in ivpu_fw_init_wa()
296 struct ivpu_fw_info *fw = vdev->fw; in ivpu_fw_update_global_range() local
297 u64 start = ALIGN(fw->runtime_addr + fw->runtime_size, FW_SHARED_MEM_ALIGNMENT); in ivpu_fw_update_global_range()
302 return -EINVAL; in ivpu_fw_update_global_range()
305 ivpu_hw_range_init(&vdev->hw->ranges.global, start, size); in ivpu_fw_update_global_range()
311 struct ivpu_fw_info *fw = vdev->fw; in ivpu_fw_mem_init() local
320 fw_range.start = fw->runtime_addr; in ivpu_fw_mem_init()
321 fw_range.end = fw->runtime_addr + fw->runtime_size; in ivpu_fw_mem_init()
322 fw->mem = ivpu_bo_create(vdev, &vdev->gctx, &fw_range, fw->runtime_size, in ivpu_fw_mem_init()
324 if (!fw->mem) { in ivpu_fw_mem_init()
326 return -ENOMEM; in ivpu_fw_mem_init()
329 ret = ivpu_mmu_context_set_pages_ro(vdev, &vdev->gctx, fw->read_only_addr, in ivpu_fw_mem_init()
330 fw->read_only_size); in ivpu_fw_mem_init()
332 ivpu_err(vdev, "Failed to set firmware image read-only\n"); in ivpu_fw_mem_init()
336 fw->mem_log_crit = ivpu_bo_create_global(vdev, IVPU_FW_CRITICAL_BUFFER_SIZE, in ivpu_fw_mem_init()
338 if (!fw->mem_log_crit) { in ivpu_fw_mem_init()
340 ret = -ENOMEM; in ivpu_fw_mem_init()
349 fw->mem_log_verb = ivpu_bo_create_global(vdev, log_verb_size, in ivpu_fw_mem_init()
351 if (!fw->mem_log_verb) { in ivpu_fw_mem_init()
353 ret = -ENOMEM; in ivpu_fw_mem_init()
357 if (fw->shave_nn_size) { in ivpu_fw_mem_init()
358 fw->mem_shave_nn = ivpu_bo_create(vdev, &vdev->gctx, &vdev->hw->ranges.shave, in ivpu_fw_mem_init()
359 fw->shave_nn_size, DRM_IVPU_BO_WC); in ivpu_fw_mem_init()
360 if (!fw->mem_shave_nn) { in ivpu_fw_mem_init()
362 ret = -ENOMEM; in ivpu_fw_mem_init()
370 ivpu_bo_free(fw->mem_log_verb); in ivpu_fw_mem_init()
372 ivpu_bo_free(fw->mem_log_crit); in ivpu_fw_mem_init()
374 ivpu_bo_free(fw->mem); in ivpu_fw_mem_init()
380 struct ivpu_fw_info *fw = vdev->fw; in ivpu_fw_mem_fini() local
382 if (fw->mem_shave_nn) { in ivpu_fw_mem_fini()
383 ivpu_bo_free(fw->mem_shave_nn); in ivpu_fw_mem_fini()
384 fw->mem_shave_nn = NULL; in ivpu_fw_mem_fini()
387 ivpu_bo_free(fw->mem_log_verb); in ivpu_fw_mem_fini()
388 ivpu_bo_free(fw->mem_log_crit); in ivpu_fw_mem_fini()
389 ivpu_bo_free(fw->mem); in ivpu_fw_mem_fini()
391 fw->mem_log_verb = NULL; in ivpu_fw_mem_fini()
392 fw->mem_log_crit = NULL; in ivpu_fw_mem_fini()
393 fw->mem = NULL; in ivpu_fw_mem_fini()
431 struct ivpu_fw_info *fw = vdev->fw; in ivpu_fw_load() local
432 u64 image_end_offset = fw->image_load_offset + fw->image_size; in ivpu_fw_load()
434 memset(ivpu_bo_vaddr(fw->mem), 0, fw->image_load_offset); in ivpu_fw_load()
435 memcpy(ivpu_bo_vaddr(fw->mem) + fw->image_load_offset, in ivpu_fw_load()
436 fw->file->data + FW_FILE_IMAGE_OFFSET, fw->image_size); in ivpu_fw_load()
439 u8 *start = ivpu_bo_vaddr(fw->mem) + image_end_offset; in ivpu_fw_load()
440 u64 size = ivpu_bo_size(fw->mem) - image_end_offset; in ivpu_fw_load()
445 wmb(); /* Flush WC buffers after writing fw->mem */ in ivpu_fw_load()
451 boot_params->magic); in ivpu_fw_boot_params_print()
453 boot_params->vpu_id); in ivpu_fw_boot_params_print()
455 boot_params->vpu_count); in ivpu_fw_boot_params_print()
457 boot_params->frequency); in ivpu_fw_boot_params_print()
459 boot_params->perf_clk_frequency); in ivpu_fw_boot_params_print()
462 boot_params->ipc_header_area_start); in ivpu_fw_boot_params_print()
464 boot_params->ipc_header_area_size); in ivpu_fw_boot_params_print()
466 boot_params->shared_region_base); in ivpu_fw_boot_params_print()
468 boot_params->shared_region_size); in ivpu_fw_boot_params_print()
470 boot_params->ipc_payload_area_start); in ivpu_fw_boot_params_print()
472 boot_params->ipc_payload_area_size); in ivpu_fw_boot_params_print()
474 boot_params->global_aliased_pio_base); in ivpu_fw_boot_params_print()
476 boot_params->global_aliased_pio_size); in ivpu_fw_boot_params_print()
479 boot_params->autoconfig); in ivpu_fw_boot_params_print()
482 boot_params->cache_defaults[VPU_BOOT_L2_CACHE_CFG_NN].use); in ivpu_fw_boot_params_print()
483 ivpu_dbg(vdev, FW_BOOT, "boot_params.cache_defaults[VPU_BOOT_L2_CACHE_CFG_NN].cfg = 0x%x\n", in ivpu_fw_boot_params_print()
484 boot_params->cache_defaults[VPU_BOOT_L2_CACHE_CFG_NN].cfg); in ivpu_fw_boot_params_print()
487 boot_params->global_memory_allocator_base); in ivpu_fw_boot_params_print()
489 boot_params->global_memory_allocator_size); in ivpu_fw_boot_params_print()
492 boot_params->shave_nn_fw_base); in ivpu_fw_boot_params_print()
495 boot_params->watchdog_irq_mss); in ivpu_fw_boot_params_print()
497 boot_params->watchdog_irq_nce); in ivpu_fw_boot_params_print()
499 boot_params->host_to_vpu_irq); in ivpu_fw_boot_params_print()
501 boot_params->job_done_irq); in ivpu_fw_boot_params_print()
504 boot_params->host_version_id); in ivpu_fw_boot_params_print()
506 boot_params->si_stepping); in ivpu_fw_boot_params_print()
508 boot_params->device_id); in ivpu_fw_boot_params_print()
510 boot_params->feature_exclusion); in ivpu_fw_boot_params_print()
512 boot_params->sku); in ivpu_fw_boot_params_print()
514 boot_params->min_freq_pll_ratio); in ivpu_fw_boot_params_print()
516 boot_params->pn_freq_pll_ratio); in ivpu_fw_boot_params_print()
518 boot_params->max_freq_pll_ratio); in ivpu_fw_boot_params_print()
520 boot_params->default_trace_level); in ivpu_fw_boot_params_print()
522 boot_params->tracing_buff_message_format_mask); in ivpu_fw_boot_params_print()
524 boot_params->trace_destination_mask); in ivpu_fw_boot_params_print()
526 boot_params->trace_hw_component_mask); in ivpu_fw_boot_params_print()
528 boot_params->boot_type); in ivpu_fw_boot_params_print()
530 boot_params->punit_telemetry_sram_base); in ivpu_fw_boot_params_print()
532 boot_params->punit_telemetry_sram_size); in ivpu_fw_boot_params_print()
534 boot_params->vpu_telemetry_enable); in ivpu_fw_boot_params_print()
536 boot_params->vpu_scheduling_mode); in ivpu_fw_boot_params_print()
538 boot_params->dvfs_mode); in ivpu_fw_boot_params_print()
540 boot_params->d0i3_delayed_entry); in ivpu_fw_boot_params_print()
542 boot_params->d0i3_residency_time_us); in ivpu_fw_boot_params_print()
544 boot_params->d0i3_entry_vpu_ts); in ivpu_fw_boot_params_print()
546 boot_params->system_time_us); in ivpu_fw_boot_params_print()
548 boot_params->power_profile); in ivpu_fw_boot_params_print()
553 struct ivpu_bo *ipc_mem_rx = vdev->ipc->mem_rx; in ivpu_fw_boot_params_setup()
557 boot_params->d0i3_residency_time_us = in ivpu_fw_boot_params_setup()
558 ktime_us_delta(ktime_get_boottime(), vdev->hw->d0i3_entry_host_ts); in ivpu_fw_boot_params_setup()
559 boot_params->d0i3_entry_vpu_ts = vdev->hw->d0i3_entry_vpu_ts; in ivpu_fw_boot_params_setup()
560 boot_params->system_time_us = ktime_to_us(ktime_get_real()); in ivpu_fw_boot_params_setup()
563 boot_params->d0i3_residency_time_us); in ivpu_fw_boot_params_setup()
565 boot_params->d0i3_entry_vpu_ts); in ivpu_fw_boot_params_setup()
567 boot_params->system_time_us); in ivpu_fw_boot_params_setup()
569 boot_params->save_restore_ret_address = 0; in ivpu_fw_boot_params_setup()
570 vdev->pm->is_warmboot = true; in ivpu_fw_boot_params_setup()
575 vdev->pm->is_warmboot = false; in ivpu_fw_boot_params_setup()
577 boot_params->magic = VPU_BOOT_PARAMS_MAGIC; in ivpu_fw_boot_params_setup()
578 boot_params->vpu_id = to_pci_dev(vdev->drm.dev)->bus->number; in ivpu_fw_boot_params_setup()
582 * to higher resolution one for fine-grained and more accurate firmware in ivpu_fw_boot_params_setup()
585 boot_params->perf_clk_frequency = ivpu_hw_profiling_freq_get(vdev); in ivpu_fw_boot_params_setup()
591 boot_params->shared_region_base = vdev->hw->ranges.global.start; in ivpu_fw_boot_params_setup()
592 boot_params->shared_region_size = vdev->hw->ranges.global.end - in ivpu_fw_boot_params_setup()
593 vdev->hw->ranges.global.start; in ivpu_fw_boot_params_setup()
595 boot_params->ipc_header_area_start = ipc_mem_rx->vpu_addr; in ivpu_fw_boot_params_setup()
596 boot_params->ipc_header_area_size = ivpu_bo_size(ipc_mem_rx) / 2; in ivpu_fw_boot_params_setup()
598 boot_params->ipc_payload_area_start = ipc_mem_rx->vpu_addr + ivpu_bo_size(ipc_mem_rx) / 2; in ivpu_fw_boot_params_setup()
599 boot_params->ipc_payload_area_size = ivpu_bo_size(ipc_mem_rx) / 2; in ivpu_fw_boot_params_setup()
602 boot_params->global_aliased_pio_base = vdev->hw->ranges.user.start; in ivpu_fw_boot_params_setup()
603 boot_params->global_aliased_pio_size = ivpu_hw_range_size(&vdev->hw->ranges.user); in ivpu_fw_boot_params_setup()
607 boot_params->autoconfig = 1; in ivpu_fw_boot_params_setup()
610 boot_params->cache_defaults[VPU_BOOT_L2_CACHE_CFG_NN].use = 1; in ivpu_fw_boot_params_setup()
611 boot_params->cache_defaults[VPU_BOOT_L2_CACHE_CFG_NN].cfg = in ivpu_fw_boot_params_setup()
612 ADDR_TO_L2_CACHE_CFG(vdev->hw->ranges.shave.start); in ivpu_fw_boot_params_setup()
614 if (vdev->fw->mem_shave_nn) in ivpu_fw_boot_params_setup()
615 boot_params->shave_nn_fw_base = vdev->fw->mem_shave_nn->vpu_addr; in ivpu_fw_boot_params_setup()
617 boot_params->watchdog_irq_mss = WATCHDOG_MSS_REDIRECT; in ivpu_fw_boot_params_setup()
618 boot_params->watchdog_irq_nce = WATCHDOG_NCE_REDIRECT; in ivpu_fw_boot_params_setup()
619 boot_params->si_stepping = ivpu_revision(vdev); in ivpu_fw_boot_params_setup()
620 boot_params->device_id = ivpu_device_id(vdev); in ivpu_fw_boot_params_setup()
621 boot_params->feature_exclusion = vdev->hw->tile_fuse; in ivpu_fw_boot_params_setup()
622 boot_params->sku = vdev->hw->sku; in ivpu_fw_boot_params_setup()
624 boot_params->min_freq_pll_ratio = vdev->hw->pll.min_ratio; in ivpu_fw_boot_params_setup()
625 boot_params->pn_freq_pll_ratio = vdev->hw->pll.pn_ratio; in ivpu_fw_boot_params_setup()
626 boot_params->max_freq_pll_ratio = vdev->hw->pll.max_ratio; in ivpu_fw_boot_params_setup()
628 boot_params->default_trace_level = vdev->fw->trace_level; in ivpu_fw_boot_params_setup()
629 boot_params->tracing_buff_message_format_mask = BIT(VPU_TRACING_FORMAT_STRING); in ivpu_fw_boot_params_setup()
630 boot_params->trace_destination_mask = vdev->fw->trace_destination_mask; in ivpu_fw_boot_params_setup()
631 boot_params->trace_hw_component_mask = vdev->fw->trace_hw_component_mask; in ivpu_fw_boot_params_setup()
632 boot_params->crit_tracing_buff_addr = vdev->fw->mem_log_crit->vpu_addr; in ivpu_fw_boot_params_setup()
633 boot_params->crit_tracing_buff_size = ivpu_bo_size(vdev->fw->mem_log_crit); in ivpu_fw_boot_params_setup()
634 boot_params->verbose_tracing_buff_addr = vdev->fw->mem_log_verb->vpu_addr; in ivpu_fw_boot_params_setup()
635 boot_params->verbose_tracing_buff_size = ivpu_bo_size(vdev->fw->mem_log_verb); in ivpu_fw_boot_params_setup()
637 boot_params->punit_telemetry_sram_base = ivpu_hw_telemetry_offset_get(vdev); in ivpu_fw_boot_params_setup()
638 boot_params->punit_telemetry_sram_size = ivpu_hw_telemetry_size_get(vdev); in ivpu_fw_boot_params_setup()
639 boot_params->vpu_telemetry_enable = ivpu_hw_telemetry_enable_get(vdev); in ivpu_fw_boot_params_setup()
640 boot_params->vpu_scheduling_mode = vdev->fw->sched_mode; in ivpu_fw_boot_params_setup()
641 if (vdev->fw->sched_mode == VPU_SCHEDULING_MODE_HW) in ivpu_fw_boot_params_setup()
642 boot_params->vpu_focus_present_timer_ms = IVPU_FOCUS_PRESENT_TIMER_MS; in ivpu_fw_boot_params_setup()
643 boot_params->dvfs_mode = vdev->fw->dvfs_mode; in ivpu_fw_boot_params_setup()
645 boot_params->d0i3_delayed_entry = 1; in ivpu_fw_boot_params_setup()
646 boot_params->d0i3_residency_time_us = 0; in ivpu_fw_boot_params_setup()
647 boot_params->d0i3_entry_vpu_ts = 0; in ivpu_fw_boot_params_setup()
649 boot_params->power_profile |= BIT(1); in ivpu_fw_boot_params_setup()
651 boot_params->system_time_us = ktime_to_us(ktime_get_real()); in ivpu_fw_boot_params_setup()