Lines Matching +full:conditional +full:- +full:select
2 * tie-asm.h -- compile-time HAL assembler definitions dependent on CORE & TIE
7 /* This header file contains assembly-language definitions (assembly
11 Copyright (c) 1999-2015 Cadence Design Systems Inc.
35 /* Selection parameter values for save-area save/restore macros: */
45 #define XTHAL_SAS_CALR 0x0010 /* caller-saved */
46 #define XTHAL_SAS_CALE 0x0020 /* callee-saved */
57 * Macro to store all non-coprocessor (extra) custom TIE and optional state
58 * (not including zero-overhead loop registers).
70 * select Select what category(ies) of registers to store, as a bitmask
72 * alloc Select what category(ies) of registers to allocate; if any
73 * category is selected here that is not in <select>, space for
76 .macro xchal_ncp_store ptr at1 at2 at3 at4 continue=0 ofs=-1 select=XTHAL_SAS_ALL alloc=0
78 // Optional caller-saved registers used by default by the compiler:
79 .ifeq (XTHAL_SAS_OPT | XTHAL_SAS_CC | XTHAL_SAS_CALR) & ~(\select)
90 // Optional caller-saved registers not used by default by the compiler:
91 .ifeq (XTHAL_SAS_OPT | XTHAL_SAS_NOCC | XTHAL_SAS_CALR) & ~(\select)
93 rsr.SCOMPARE1 \at1 // conditional store option
111 * Macro to load all non-coprocessor (extra) custom TIE and optional state
112 * (not including zero-overhead loop registers).
124 * select Select what category(ies) of registers to load, as a bitmask
126 * alloc Select what category(ies) of registers to allocate; if any
127 * category is selected here that is not in <select>, space for
130 .macro xchal_ncp_load ptr at1 at2 at3 at4 continue=0 ofs=-1 select=XTHAL_SAS_ALL alloc=0
132 // Optional caller-saved registers used by default by the compiler:
133 .ifeq (XTHAL_SAS_OPT | XTHAL_SAS_CC | XTHAL_SAS_CALR) & ~(\select)
144 // Optional caller-saved registers not used by default by the compiler:
145 .ifeq (XTHAL_SAS_OPT | XTHAL_SAS_NOCC | XTHAL_SAS_CALR) & ~(\select)
148 wsr.SCOMPARE1 \at1 // conditional store option