Lines Matching refs:hwc

146 				     struct hw_perf_event *hwc, int idx)
152 		prev_raw_count = local64_read(&hwc->prev_count);
154 	} while (local64_cmpxchg(&hwc->prev_count, prev_raw_count,
160 	local64_sub(delta, &hwc->period_left);
164 					 struct hw_perf_event *hwc, int idx)
172 		s64 period = hwc->sample_period;
174 		left = local64_read(&hwc->period_left);
177 			local64_set(&hwc->period_left, left);
178 			hwc->last_period = period;
182 			local64_set(&hwc->period_left, left);
183 			hwc->last_period = period;
190 	local64_set(&hwc->prev_count, -left);
251 	struct hw_perf_event *hwc = &event->hw;
252 	int idx = hwc->idx;
259 		xtensa_perf_event_set_period(event, hwc, idx);
262 	hwc->state = 0;
264 	set_er(hwc->config, XTENSA_PMU_PMCTRL(idx));
269 	struct hw_perf_event *hwc = &event->hw;
270 	int idx = hwc->idx;
272 	if (!(hwc->state & PERF_HES_STOPPED)) {
276 		hwc->state |= PERF_HES_STOPPED;
293 	struct hw_perf_event *hwc = &event->hw;
294 	int idx = hwc->idx;
303 		hwc->idx = idx;
307 	hwc->state = PERF_HES_UPTODATE | PERF_HES_STOPPED;
377 		struct hw_perf_event *hwc = &event->hw;
384 		xtensa_perf_event_update(event, hwc, i);
385 		last_period = hwc->last_period;
386 		if (xtensa_perf_event_set_period(event, hwc, i)) {