Lines Matching +full:use +full:- +full:ram +full:- +full:code
1 # SPDX-License-Identifier: GPL-2.0
61 Xtensa processors are 32-bit RISC machines designed by Tensilica
66 a home page at <http://www.linux-xtensa.org/>.
105 def_bool $(success,test "$(shell,echo __XTENSA_EB__ | $(CC) -E -P -)" = 1)
111 …def_bool $(success,test "$(shell,echo __XTENSA_CALL0_ABI__ | $(CC) -mabi=call0 -E -P - 2>/dev/null…
120 bool "fsf - default (not generic) configuration"
124 bool "dc232b - Diamond 232L Standard Core Rev.B (LE)"
131 bool "dc233c - Diamond 233L Standard Core Rev.C (LE)"
141 Select this variant to use a custom Xtensa processor configuration.
167 ie: it supports a TLB with auto-loading, page protection.
219 instructions raise an exception with the LoadStoreErrorCause code.
220 This makes it hard to use some configurations, e.g. store string
224 byte and 2-byte access to memory attached to instruction bus.
231 This option is used to indicate that the system-on-a-chip (SOC)
245 bool "Enable Symmetric multi-processing support"
254 int "Maximum number of CPUs (2-32)"
268 bool "Secondary cores use alternative reset vector"
272 Secondary cores may be configured to use alternative reset vector,
273 or all cores may use primary reset vector.
306 Select ABI for the kernel code. This ABI is independent of the
311 all register windows support code will be omitted from the
319 Select this option to compile kernel code with the default ABI
321 Normally cores with windowed registers option use windowed ABI and
322 cores without it use call0 ABI.
327 Select this option to compile kernel code with call0 ABI even with
330 be used for the kernel code.
360 Choose this option if you're planning to run only user code
413 XT2000 is the name of Tensilica's feature-rich emulation platform.
450 default "console=ttyS0,38400 root=/dev/ram"
454 architectures, you should supply some command-line options at build
489 Use simcall instruction. simcall is only available on simulators,
495 Use break instruction. It is available on real hardware when GDB
501 tristate "Host file-based simulated block device support"
507 interface provided the device is not in use.
510 int "Number of host file-based simulated block devices"
533 Another simulated disk in a host file for a buildroot-independent
558 bool "Use 8-bit access to XTFPGA LCD"
562 LCD may be connected with 4- or 8-bit interface, 8-bit access may
563 only be used with 8-bit interface. Please consult prototyping user
569 bool "Initialize Xtensa MMU inside the Linux kernel code"
579 This unfortunately won't work for U-Boot and likely also won't
584 use hardware breakpoints (gdb 'hbreak' cmd) to break at _startup.
585 xt-gdb can't place a Software Breakpoint in the 0XD region prior
593 Selecting this will cause U-Boot to set the KERNEL Load and Entry
599 bool "Kernel Execute-In-Place from ROM"
602 Execute-In-Place allows the kernel to run from non-volatile storage
603 directly addressable by the CPU, such as NOR flash. This saves RAM
605 to RAM. Read-write sections, such as the data section and stack,
606 are still copied to RAM. The XIP kernel is not compressed since
626 region: bits 0..3 -- for addresses 0x00000000..0x1fffffff,
627 bits 4..7 -- for addresses 0x20000000..0x3fffffff, and so on.
646 2: WB, no-write-allocate cache,
692 placed at their hardware-defined locations.
708 Use it to put vectors into IRAM or out of FLASH on kernels with
709 XIP-aware MTD support.
779 Linux can use the full amount of RAM in the system by
789 machine with more than 128 MB total physical RAM, answer