189 static u8 add_1reg(u8 byte, u32 dst_reg)  in add_1reg()  function
220 			EMIT3_off32(0xC7, add_1reg(0x40, IA32_EBP),  in emit_ia32_mov_i()
227 			EMIT2_off32(0xC7, add_1reg(0xC0, dst),  in emit_ia32_mov_i()
304 	EMIT2(0xF7, add_1reg(0xE0, sreg));  in emit_ia32_mul_r()
384 		EMIT3(0xC1, add_1reg(0xC8, dreg_lo), 8);  in emit_ia32_to_be_r64()
396 		EMIT1(add_1reg(0xC8, dreg_lo));  in emit_ia32_to_be_r64()
405 		EMIT1(add_1reg(0xC8, dreg_lo));  in emit_ia32_to_be_r64()
409 		EMIT1(add_1reg(0xC8, dreg_hi));  in emit_ia32_to_be_r64()
460 	EMIT2(0xF7, add_1reg(0xF0, IA32_ECX));  in emit_ia32_div_mod_r()
511 	EMIT2(0xD3, add_1reg(b2, dreg));  in emit_ia32_shift_r()
612 		EMIT2_off32(0xC7, add_1reg(0xC0, IA32_EDX), val);  in emit_ia32_alu_i()
619 				EMIT3(0x83, add_1reg(0xD0, dreg), val);  in emit_ia32_alu_i()
624 				EMIT3(0x83, add_1reg(0xC0, dreg), val);  in emit_ia32_alu_i()
633 				EMIT3(0x83, add_1reg(0xD8, dreg), val);  in emit_ia32_alu_i()
638 				EMIT3(0x83, add_1reg(0xE8, dreg), val);  in emit_ia32_alu_i()
646 			EMIT3(0x83, add_1reg(0xC8, dreg), val);  in emit_ia32_alu_i()
653 			EMIT3(0x83, add_1reg(0xE0, dreg), val);  in emit_ia32_alu_i()
660 			EMIT3(0x83, add_1reg(0xF0, dreg), val);  in emit_ia32_alu_i()
665 		EMIT2(0xF7, add_1reg(0xD8, dreg));  in emit_ia32_alu_i()
713 	EMIT2(0xF7, add_1reg(0xD8, dreg_lo));  in emit_ia32_neg64()
715 	EMIT3(0x83, add_1reg(0xD0, dreg_hi), 0x00);  in emit_ia32_neg64()
717 	EMIT2(0xF7, add_1reg(0xD8, dreg_hi));  in emit_ia32_neg64()
757 	EMIT2(0xD3, add_1reg(0xE0, dreg_lo));  in emit_ia32_lsh_r64()
762 	EMIT3(0x83, add_1reg(0xF8, IA32_ECX), 32);  in emit_ia32_lsh_r64()
810 	EMIT2(0xD3, add_1reg(0xF8, dreg_hi));  in emit_ia32_arsh_r64()
815 	EMIT3(0x83, add_1reg(0xF8, IA32_ECX), 32);  in emit_ia32_arsh_r64()
822 	EMIT3(0xC1, add_1reg(0xF8, dreg_hi), 31);  in emit_ia32_arsh_r64()
863 	EMIT2(0xD3, add_1reg(0xE8, dreg_hi));  in emit_ia32_rsh_r64()
868 	EMIT3(0x83, add_1reg(0xF8, IA32_ECX), 32);  in emit_ia32_rsh_r64()
909 		EMIT3(0xC1, add_1reg(0xE0, dreg_lo), val);  in emit_ia32_lsh_i64()
914 		EMIT3(0xC1, add_1reg(0xE0, dreg_lo), value);  in emit_ia32_lsh_i64()
958 		EMIT3(0xC1, add_1reg(0xE8, dreg_hi), val);  in emit_ia32_rsh_i64()
963 		EMIT3(0xC1, add_1reg(0xE8, dreg_hi), value);  in emit_ia32_rsh_i64()
1006 		EMIT3(0xC1, add_1reg(0xF8, dreg_hi), val);  in emit_ia32_arsh_i64()
1011 		EMIT3(0xC1, add_1reg(0xF8, dreg_hi), value);  in emit_ia32_arsh_i64()
1016 		EMIT3(0xC1, add_1reg(0xF8, dreg_hi), 31);  in emit_ia32_arsh_i64()
1019 		EMIT3(0xC1, add_1reg(0xF8, dreg_hi), 31);  in emit_ia32_arsh_i64()
1051 		EMIT3(0xF7, add_1reg(0x60, IA32_EBP), STACK_VAR(src_lo));  in emit_ia32_mul_r64()
1054 		EMIT2(0xF7, add_1reg(0xE0, src_lo));  in emit_ia32_mul_r64()
1069 		EMIT3(0xF7, add_1reg(0x60, IA32_EBP), STACK_VAR(src_hi));  in emit_ia32_mul_r64()
1072 		EMIT2(0xF7, add_1reg(0xE0, src_hi));  in emit_ia32_mul_r64()
1087 		EMIT3(0xF7, add_1reg(0x60, IA32_EBP), STACK_VAR(src_lo));  in emit_ia32_mul_r64()
1090 		EMIT2(0xF7, add_1reg(0xE0, src_lo));  in emit_ia32_mul_r64()
1121 	EMIT2_off32(0xC7, add_1reg(0xC0, IA32_EAX), val);  in emit_ia32_mul_i64()
1124 		EMIT3(0xF7, add_1reg(0x60, IA32_EBP), STACK_VAR(dst_hi));  in emit_ia32_mul_i64()
1127 		EMIT2(0xF7, add_1reg(0xE0, dst_hi));  in emit_ia32_mul_i64()
1133 	EMIT2_off32(0xC7, add_1reg(0xC0, IA32_EAX), hi);  in emit_ia32_mul_i64()
1136 		EMIT3(0xF7, add_1reg(0x60, IA32_EBP), STACK_VAR(dst_lo));  in emit_ia32_mul_i64()
1139 		EMIT2(0xF7, add_1reg(0xE0, dst_lo));  in emit_ia32_mul_i64()
1144 	EMIT2_off32(0xC7, add_1reg(0xC0, IA32_EAX), val);  in emit_ia32_mul_i64()
1147 		EMIT3(0xF7, add_1reg(0x60, IA32_EBP), STACK_VAR(dst_lo));  in emit_ia32_mul_i64()
1150 		EMIT2(0xF7, add_1reg(0xE0, dst_lo));  in emit_ia32_mul_i64()
1223 	EMIT3(0x83, add_1reg(0xE8, IA32_EBP), SCRATCH_SIZE + 12);  in emit_prologue()
1257 	EMIT3(0x83, add_1reg(0xC0, IA32_EBP), SCRATCH_SIZE + 12);  in emit_epilogue()
1335 	EMIT3(0x83, add_1reg(0xF8, IA32_EBX), hi);  in emit_bpf_tail_call()
1338 	EMIT3(0x83, add_1reg(0xF8, IA32_ECX), lo);  in emit_bpf_tail_call()
1344 	EMIT3(0x83, add_1reg(0xC0, IA32_ECX), 0x01);  in emit_bpf_tail_call()
1346 	EMIT3(0x83, add_1reg(0xD0, IA32_EBX), 0x00);  in emit_bpf_tail_call()
1371 	EMIT3(0x83, add_1reg(0xC0, IA32_EDX), PROLOGUE_SIZE);  in emit_bpf_tail_call()
1652 		EMIT3(0x83, add_1reg(0xC0, IA32_ESP), bytes_in_stack);  in emit_kfunc_call()
1760 				EMIT2_off32(0xC7, add_1reg(0xC0, IA32_ECX),  in do_jit()
1780 				EMIT2_off32(0xC7, add_1reg(0xC0, IA32_ECX),  in do_jit()
1803 				EMIT2_off32(0xC7, add_1reg(0xC0, IA32_ECX),  in do_jit()
1825 			EMIT2_off32(0xC7, add_1reg(0xC0, IA32_ECX), imm32);  in do_jit()
1935 				EMIT2(add_1reg(0x40, IA32_EAX), insn->off);  in do_jit()
1937 				EMIT1_off32(add_1reg(0x80, IA32_EAX),  in do_jit()
1945 				EMIT2_off32(0xC7, add_1reg(0x80, IA32_EAX),  in do_jit()
2056 					EMIT3(0xC7, add_1reg(0x40, IA32_EBP),  in do_jit()
2137 			EMIT3(0x83, add_1reg(0xC0, IA32_ESP), 32);  in do_jit()
2301 			EMIT2_off32(0xC7, add_1reg(0xC0, sreg_lo), imm32);  in do_jit()
2308 				EMIT2_off32(0xC7, add_1reg(0xC0, sreg_hi), hi);  in do_jit()
2350 			EMIT2_off32(0xC7, add_1reg(0xC0, IA32_ECX), imm32);  in do_jit()
2354 				EMIT2_off32(0xC7, add_1reg(0xC0, IA32_EBX), hi);  in do_jit()
2396 			EMIT2_off32(0xC7, add_1reg(0xC0, IA32_ECX), imm32);  in do_jit()
2399 			EMIT2_off32(0xC7, add_1reg(0xC0, IA32_EBX), hi);  in do_jit()