Lines Matching +full:0 +full:x133
37 #if 0
49 if ((byte1 & 0xf8) == 0xd8)
58 printk("%02x (%02x+%d)\n", FPU_modrm, FPU_modrm & 0xf8,
71 #endif /* 0 */
96 for (i = 0; i < MAX_PRINTED_BYTES; i++) { in FPU_printall()
98 if ((byte1 & 0xf8) == 0xd8) { in FPU_printall()
112 FPU_modrm & 0xf8, FPU_modrm & 7); in FPU_printall()
134 printk("SW: condition bit 0\n"); in FPU_printall()
153 … b=%d st=%d es=%d sf=%d cc=%d%d%d%d ef=%d%d%d%d%d%d\n", partial_status & 0x8000 ? 1 : 0, /* busy */ in FPU_printall()
154 (partial_status & 0x3800) >> 11, /* stack top pointer */ in FPU_printall()
155 partial_status & 0x80 ? 1 : 0, /* Error summary status */ in FPU_printall()
156 partial_status & 0x40 ? 1 : 0, /* Stack flag */ in FPU_printall()
157 partial_status & SW_C3 ? 1 : 0, partial_status & SW_C2 ? 1 : 0, /* cc */ in FPU_printall()
158 partial_status & SW_C1 ? 1 : 0, partial_status & SW_C0 ? 1 : 0, /* cc */ in FPU_printall()
159 partial_status & SW_Precision ? 1 : 0, in FPU_printall()
160 partial_status & SW_Underflow ? 1 : 0, in FPU_printall()
161 partial_status & SW_Overflow ? 1 : 0, in FPU_printall()
162 partial_status & SW_Zero_Div ? 1 : 0, in FPU_printall()
163 partial_status & SW_Denorm_Op ? 1 : 0, in FPU_printall()
164 partial_status & SW_Invalid ? 1 : 0); in FPU_printall()
167 control_word & 0x1000 ? 1 : 0, in FPU_printall()
168 (control_word & 0x800) >> 11, (control_word & 0x400) >> 10, in FPU_printall()
169 (control_word & 0x200) >> 9, (control_word & 0x100) >> 8, in FPU_printall()
170 control_word & 0x80 ? 1 : 0, in FPU_printall()
171 control_word & SW_Precision ? 1 : 0, in FPU_printall()
172 control_word & SW_Underflow ? 1 : 0, in FPU_printall()
173 control_word & SW_Overflow ? 1 : 0, in FPU_printall()
174 control_word & SW_Zero_Div ? 1 : 0, in FPU_printall()
175 control_word & SW_Denorm_Op ? 1 : 0, in FPU_printall()
176 control_word & SW_Invalid ? 1 : 0); in FPU_printall()
178 for (i = 0; i < 8; i++) { in FPU_printall()
194 (long)(r->sigh & 0xFFFF), in FPU_printall()
196 (long)(r->sigl & 0xFFFF), in FPU_printall()
225 0, NULL}
233 0x14 in fpu_etc.c
234 0x1nn in a *.c file:
235 0x101 in reg_add_sub.c
236 0x102 in reg_mul.c
237 0x104 in poly_atan.c
238 0x105 in reg_mul.c
239 0x107 in fpu_trig.c
240 0x108 in reg_compare.c
241 0x109 in reg_compare.c
242 0x110 in reg_add_sub.c
243 0x111 in fpe_entry.c
244 0x112 in fpu_trig.c
245 0x113 in errors.c
246 0x115 in fpu_trig.c
247 0x116 in fpu_trig.c
248 0x117 in fpu_trig.c
249 0x118 in fpu_trig.c
250 0x119 in fpu_trig.c
251 0x120 in poly_atan.c
252 0x121 in reg_compare.c
253 0x122 in reg_compare.c
254 0x123 in reg_compare.c
255 0x125 in fpu_trig.c
256 0x126 in fpu_entry.c
257 0x127 in poly_2xm1.c
258 0x128 in fpu_entry.c
259 0x129 in fpu_entry.c
260 0x130 in get_address.c
261 0x131 in get_address.c
262 0x132 in get_address.c
263 0x133 in get_address.c
264 0x140 in load_store.c
265 0x141 in load_store.c
266 0x150 in poly_sin.c
267 0x151 in poly_sin.c
268 0x160 in reg_ld_str.c
269 0x161 in reg_ld_str.c
270 0x162 in reg_ld_str.c
271 0x163 in reg_ld_str.c
272 0x164 in reg_ld_str.c
273 0x170 in fpu_tags.c
274 0x171 in fpu_tags.c
275 0x172 in fpu_tags.c
276 0x180 in reg_convert.c
277 0x2nn in an *.S file:
278 0x201 in reg_u_add.S
279 0x202 in reg_u_div.S
280 0x203 in reg_u_div.S
281 0x204 in reg_u_div.S
282 0x205 in reg_u_mul.S
283 0x206 in reg_u_sub.S
284 0x207 in wm_sqrt.S
285 0x208 in reg_div.S
286 0x209 in reg_u_sub.S
287 0x210 in reg_u_sub.S
288 0x211 in reg_u_sub.S
289 0x212 in reg_u_sub.S
290 0x213 in wm_sqrt.S
291 0x214 in wm_sqrt.S
292 0x215 in wm_sqrt.S
293 0x220 in reg_norm.S
294 0x221 in reg_norm.S
295 0x230 in reg_round.S
296 0x231 in reg_round.S
297 0x232 in reg_round.S
298 0x233 in reg_round.S
299 0x234 in reg_round.S
300 0x235 in reg_round.S
301 0x236 in reg_round.S
302 0x240 in div_Xsig.S
303 0x241 in div_Xsig.S
304 0x242 in div_Xsig.S
311 int_type = 0; /* Needed only to stop compiler warnings */ in FPU_exception()
336 for (i = 0; exception_names[i].type; i++) in FPU_exception()
346 printk("FPU emulator: Unknown Exception: 0x%04x!\n", n); in FPU_exception()
349 printk("FPU emulator: Internal error type 0x%04x\n", in FPU_exception()
373 /* Returns < 0 if the exception is unmasked */
378 isNaN = (exponent(a) == EXP_OVER) && (a->sigh & 0x80000000); in real_1op_NaN()
382 signalling = isNaN && !(a->sigh & 0x40000000); in real_1op_NaN()
392 0) | TAG_Special; in real_1op_NaN()
399 if (!(a->sigh & 0x80000000)) { /* pseudo-NaN ? */ in real_1op_NaN()
403 a->sigh |= 0x40000000; in real_1op_NaN()
408 return (!(control_word & CW_Invalid) ? FPU_Exception : 0) | TAG_Special; in real_1op_NaN()
412 /* Returns < 0 if the exception is unmasked */
430 && (a->sigh & 0x80000000))) in real_2op_NaN()
432 && !((exponent(b) == EXP_OVER) && (b->sigh & 0x80000000))); in real_2op_NaN()
439 return (!(control_word & CW_Invalid) ? FPU_Exception : 0) | in real_2op_NaN()
446 signalling = !(a->sigh & b->sigh & 0x40000000); in real_2op_NaN()
456 signalling = !(a->sigh & 0x40000000); in real_2op_NaN()
463 signalling = !(b->sigh & 0x40000000); in real_2op_NaN()
468 signalling = 0; in real_2op_NaN()
469 EXCEPTION(EX_INTERNAL | 0x113); in real_2op_NaN()
478 if (!(x->sigh & 0x80000000)) /* pseudo-NaN ? */ in real_2op_NaN()
487 dest->sigh |= 0x40000000; in real_2op_NaN()
492 return (!(control_word & CW_Invalid) ? FPU_Exception : 0) | TAG_Special; in real_2op_NaN()
496 /* Returns < 0 if the exception is unmasked */
507 return (!(control_word & CW_Invalid) ? FPU_Exception : 0) | TAG_Valid; in arith_invalid()
526 return (!(control_word & CW_ZeroDiv) ? FPU_Exception : 0) | tag; in FPU_divide_by_zero()
536 return 0; in set_precision_flag()