1 /* SPDX-License-Identifier: GPL-2.0 */
9 #include <asm/asm-offsets.h>
10 #include <asm/nospec-branch.h>
63 #define GEN(reg) THUNK reg  macro
64 #include <asm/GEN-for-each-reg.h>
65 #undef GEN
70 #define GEN(reg) __EXPORT_THUNK(__x86_indirect_thunk_ ## reg)  macro
71 #include <asm/GEN-for-each-reg.h>
72 #undef GEN
93 #define GEN(reg) CALL_THUNK reg  macro
94 #include <asm/GEN-for-each-reg.h>
95 #undef GEN
100 #define GEN(reg) __EXPORT_THUNK(__x86_indirect_call_thunk_ ## reg)  macro
101 #include <asm/GEN-for-each-reg.h>
102 #undef GEN
119 #define GEN(reg) JUMP_THUNK reg  macro
120 #include <asm/GEN-for-each-reg.h>
121 #undef GEN
126 #define GEN(reg) __EXPORT_THUNK(__x86_indirect_jump_thunk_ ## reg)  macro
127 #include <asm/GEN-for-each-reg.h>
128 #undef GEN
152 	.skip  32 - (__x86_indirect_its_thunk_\reg - 1b), 0xcc /* skip to the next upper half */
159 #define GEN(reg) ITS_THUNK reg  macro
160 #include <asm/GEN-for-each-reg.h>
161 #undef GEN
175  * relocations for same-section JMPs and that breaks the returns
186  * - srso_alias_untrain_ret() is 2M aligned
187  * - srso_alias_safe_ret() is also in the same 2M page but bits 2, 8, 14
226  * SRSO untraining sequence for Zen1/2, similar to retbleed_untrain_ret()
236 	.skip 64 - (srso_safe_ret - srso_untrain_ret), 0xcc
287  * The SRSO Zen1/2 (MOVABS) untraining sequence is longer than the
293  * Regarding alignment - the instructions which need to be untrained,
294  * must all start at a cacheline boundary for Zen1/2 generations. That
301  * Safety details here pertain to the AMD Zen{1,2} microarchitecture:
304  * 2) The instruction at retbleed_untrain_ret must contain, and not
307  *    from re-poisioning the BTB prediction.
310 	.skip 64 - (retbleed_return_thunk - retbleed_untrain_ret), 0xcc
381 	 * Keep the hotpath in a 16byte I-fetch for the non-debug
394 	call	2f
396 2:
425  * This function name is magical and is used by -mfunction-return=thunk-extern