Lines Matching +full:enforce +full:- +full:video +full:- +full:mode
1 // SPDX-License-Identifier: GPL-2.0-only
3 * Kernel-based Virtual Machine driver for Linux
5 * This module enables machines with Intel VT-x extensions to run virtual
50 #include <asm/spec-ctrl.h>
80 MODULE_DESCRIPTION("KVM support for VMX (Intel VT-x) extensions");
143 /* Guest_tsc -> host_tsc conversion requires 64-bit division. */
170 * These 2 parameters are used to config the controls for Pause-Loop Exiting:
186 /* Default doubles per-vcpu window every exit. */
190 /* Default resets per-vcpu window every exit to ple_window. */
198 /* Default is SYSTEM mode, 1 for host-guest mode (which is BROKEN) */
277 return -ENOMEM; in vmx_setup_l1d_flush()
316 return -EINVAL; in vmentry_l1d_flush_parse()
359 if (!vmx->disable_fb_clear) in vmx_disable_fb_clear()
366 vmx->msr_ia32_mcu_opt_ctrl = msr; in vmx_disable_fb_clear()
371 if (!vmx->disable_fb_clear) in vmx_enable_fb_clear()
374 vmx->msr_ia32_mcu_opt_ctrl &= ~FB_CLEAR_DIS; in vmx_enable_fb_clear()
375 native_wrmsrq(MSR_IA32_MCU_OPT_CTRL, vmx->msr_ia32_mcu_opt_ctrl); in vmx_enable_fb_clear()
385 * CPU buffers is unnecessary, at the cost of MSR accesses on VM-Entry in vmx_update_fb_clear_dis()
386 * and VM-Exit. in vmx_update_fb_clear_dis()
388 vmx->disable_fb_clear = !cpu_feature_enabled(X86_FEATURE_CLEAR_CPU_BUF) && in vmx_update_fb_clear_dis()
398 if ((vcpu->arch.arch_capabilities & ARCH_CAP_FB_CLEAR) || in vmx_update_fb_clear_dis()
399 ((vcpu->arch.arch_capabilities & ARCH_CAP_MDS_NO) && in vmx_update_fb_clear_dis()
400 (vcpu->arch.arch_capabilities & ARCH_CAP_TAA_NO) && in vmx_update_fb_clear_dis()
401 (vcpu->arch.arch_capabilities & ARCH_CAP_PSDP_NO) && in vmx_update_fb_clear_dis()
402 (vcpu->arch.arch_capabilities & ARCH_CAP_FBSDP_NO) && in vmx_update_fb_clear_dis()
403 (vcpu->arch.arch_capabilities & ARCH_CAP_SBDR_SSDP_NO))) in vmx_update_fb_clear_dis()
404 vmx->disable_fb_clear = false; in vmx_update_fb_clear_dis()
473 * We maintain a per-CPU linked-list of VMCS loaded on that CPU. This is needed
521 return -ENOMEM; in hv_enable_l2_tlb_flush()
523 evmcs = (struct hv_enlightened_vmcs *)to_vmx(vcpu)->loaded_vmcs->vmcs; in hv_enable_l2_tlb_flush()
525 evmcs->partition_assist_page = partition_assist_page; in hv_enable_l2_tlb_flush()
526 evmcs->hv_vm_id = (unsigned long)vcpu->kvm; in hv_enable_l2_tlb_flush()
527 evmcs->hv_enlightenments_control.nested_flush_hypercall = 1; in hv_enable_l2_tlb_flush()
556 pr_info("Using Hyper-V Enlightened VMCS\n"); in hv_init_evmcs()
585 * Reset everything to support using non-enlightened VMCS access later in hv_reset_evmcs()
588 vp_ap->nested_control.features.directhypercall = 0; in hv_reset_evmcs()
589 vp_ap->current_nested_vmcs = 0; in hv_reset_evmcs()
590 vp_ap->enlighten_vmentry = 0; in hv_reset_evmcs()
599 * Comment's format: document - errata name - stepping - processor name.
604 /* 323344.pdf - BA86 - D0 - Xeon 7500 Series */
606 /* 323056.pdf - AAX65 - C2 - Xeon L3406 */
607 /* 322814.pdf - AAT59 - C2 - i7-600, i5-500, i5-400 and i3-300 Mobile */
608 /* 322911.pdf - AAU65 - C2 - i5-600, i3-500 Desktop and Pentium G6950 */
610 /* 322911.pdf - AAU65 - K0 - i5-600, i3-500 Desktop and Pentium G6950 */
612 /* 322373.pdf - AAO95 - B1 - Xeon 3400 Series */
613 /* 322166.pdf - AAN92 - B1 - i7-800 and i5-700 Desktop */
615 * 320767.pdf - AAP86 - B1 -
616 * i7-900 Mobile Extreme, i7-800 and i7-700 Mobile
619 /* 321333.pdf - AAM126 - C0 - Xeon 3500 */
621 /* 321333.pdf - AAM126 - C1 - Xeon 3500 */
623 /* 320836.pdf - AAJ124 - C0 - i7-900 Desktop Extreme and i7-900 Desktop */
625 /* 321333.pdf - AAM126 - D0 - Xeon 3500 */
626 /* 321324.pdf - AAK139 - D0 - Xeon 5500 */
627 /* 320836.pdf - AAJ124 - D0 - i7-900 Extreme and i7-900 Desktop */
629 /* Xeon E3-1220 V2 */
657 return &vmx->guest_uret_msrs[i]; in vmx_find_uret_msr()
664 unsigned int slot = msr - vmx->guest_uret_msrs; in vmx_set_guest_uret_msr()
667 if (msr->load_into_hardware) { in vmx_set_guest_uret_msr()
669 ret = kvm_set_user_return_msr(slot, data, msr->mask); in vmx_set_guest_uret_msr()
673 msr->data = data; in vmx_set_guest_uret_msr()
680 * Note, VMXOFF causes a #UD if the CPU is !post-VMXON, but it's impossible to
681 * atomically track post-VMXON state, e.g. this may be called in NMI context.
682 * Eat all faults as all other faults on VMXOFF faults are mode related, i.e.
683 * faults are guaranteed to be due to the !post-VMXON check unless the CPU is
684 * magically in RM, VM86, compat mode, or at CPL>0.
697 return -EIO; in kvm_cpu_vmxoff()
718 vmcs_clear(v->vmcs); in vmx_emergency_disable_virtualization_cpu()
719 if (v->shadow_vmcs) in vmx_emergency_disable_virtualization_cpu()
720 vmcs_clear(v->shadow_vmcs); in vmx_emergency_disable_virtualization_cpu()
731 if (loaded_vmcs->cpu != cpu) in __loaded_vmcs_clear()
733 if (per_cpu(current_vmcs, cpu) == loaded_vmcs->vmcs) in __loaded_vmcs_clear()
736 vmcs_clear(loaded_vmcs->vmcs); in __loaded_vmcs_clear()
737 if (loaded_vmcs->shadow_vmcs && loaded_vmcs->launched) in __loaded_vmcs_clear()
738 vmcs_clear(loaded_vmcs->shadow_vmcs); in __loaded_vmcs_clear()
740 list_del(&loaded_vmcs->loaded_vmcss_on_cpu_link); in __loaded_vmcs_clear()
744 * current percpu list, complete before setting loaded_vmcs->cpu to in __loaded_vmcs_clear()
745 * -1, otherwise a different cpu can see loaded_vmcs->cpu == -1 first in __loaded_vmcs_clear()
751 loaded_vmcs->cpu = -1; in __loaded_vmcs_clear()
752 loaded_vmcs->launched = 0; in __loaded_vmcs_clear()
757 int cpu = loaded_vmcs->cpu; in loaded_vmcs_clear()
759 if (cpu != -1) in loaded_vmcs_clear()
770 if (!kvm_register_is_available(&vmx->vcpu, VCPU_EXREG_SEGMENTS)) { in vmx_segment_cache_test_set()
771 kvm_register_mark_available(&vmx->vcpu, VCPU_EXREG_SEGMENTS); in vmx_segment_cache_test_set()
772 vmx->segment_cache.bitmask = 0; in vmx_segment_cache_test_set()
774 ret = vmx->segment_cache.bitmask & mask; in vmx_segment_cache_test_set()
775 vmx->segment_cache.bitmask |= mask; in vmx_segment_cache_test_set()
781 u16 *p = &vmx->segment_cache.seg[seg].selector; in vmx_read_guest_seg_selector()
790 ulong *p = &vmx->segment_cache.seg[seg].base; in vmx_read_guest_seg_base()
799 u32 *p = &vmx->segment_cache.seg[seg].limit; in vmx_read_guest_seg_limit()
808 u32 *p = &vmx->segment_cache.seg[seg].ar; in vmx_read_guest_seg_ar()
835 if ((vcpu->guest_debug & in vmx_update_exception_bitmap()
839 if (to_vmx(vcpu)->rmode.vm86_active) in vmx_update_exception_bitmap()
850 eb |= get_vmcs12(vcpu)->exception_bitmap; in vmx_update_exception_bitmap()
859 * non-reserved faults. For vmcs02, however, PFEC_MASK in vmx_update_exception_bitmap()
874 if (vcpu->arch.xfd_no_write_intercept) in vmx_update_exception_bitmap()
888 return vmx_test_msr_bitmap_write(vmx->loaded_vmcs->msr_bitmap, msr); in msr_write_intercepted()
895 if (vmx->loaded_vmcs->launched) in __vmx_vcpu_run_flags()
901 * it after vmexit and store it in vmx->spec_ctrl. in __vmx_vcpu_run_flags()
907 kvm_vcpu_can_access_host_mmio(&vmx->vcpu)) in __vmx_vcpu_run_flags()
924 for (i = 0; i < m->nr; ++i) { in vmx_find_loadstore_msr_slot()
925 if (m->val[i].index == msr) in vmx_find_loadstore_msr_slot()
928 return -ENOENT; in vmx_find_loadstore_msr_slot()
934 struct msr_autoload *m = &vmx->msr_autoload; in clear_atomic_switch_msr()
954 i = vmx_find_loadstore_msr_slot(&m->guest, msr); in clear_atomic_switch_msr()
957 --m->guest.nr; in clear_atomic_switch_msr()
958 m->guest.val[i] = m->guest.val[m->guest.nr]; in clear_atomic_switch_msr()
959 vmcs_write32(VM_ENTRY_MSR_LOAD_COUNT, m->guest.nr); in clear_atomic_switch_msr()
962 i = vmx_find_loadstore_msr_slot(&m->host, msr); in clear_atomic_switch_msr()
966 --m->host.nr; in clear_atomic_switch_msr()
967 m->host.val[i] = m->host.val[m->host.nr]; in clear_atomic_switch_msr()
968 vmcs_write32(VM_EXIT_MSR_LOAD_COUNT, m->host.nr); in clear_atomic_switch_msr()
987 struct msr_autoload *m = &vmx->msr_autoload; in add_atomic_switch_msr()
1021 i = vmx_find_loadstore_msr_slot(&m->guest, msr); in add_atomic_switch_msr()
1023 j = vmx_find_loadstore_msr_slot(&m->host, msr); in add_atomic_switch_msr()
1025 if ((i < 0 && m->guest.nr == MAX_NR_LOADSTORE_MSRS) || in add_atomic_switch_msr()
1026 (j < 0 && m->host.nr == MAX_NR_LOADSTORE_MSRS)) { in add_atomic_switch_msr()
1032 i = m->guest.nr++; in add_atomic_switch_msr()
1033 vmcs_write32(VM_ENTRY_MSR_LOAD_COUNT, m->guest.nr); in add_atomic_switch_msr()
1035 m->guest.val[i].index = msr; in add_atomic_switch_msr()
1036 m->guest.val[i].value = guest_val; in add_atomic_switch_msr()
1042 j = m->host.nr++; in add_atomic_switch_msr()
1043 vmcs_write32(VM_EXIT_MSR_LOAD_COUNT, m->host.nr); in add_atomic_switch_msr()
1045 m->host.val[j].index = msr; in add_atomic_switch_msr()
1046 m->host.val[j].value = host_val; in add_atomic_switch_msr()
1051 u64 guest_efer = vmx->vcpu.arch.efer; in update_transition_efer()
1060 * LMA and LME handled by hardware; SCE meaningless outside long mode. in update_transition_efer()
1065 /* SCE is meaningful only in long mode on Intel */ in update_transition_efer()
1076 (enable_ept && ((vmx->vcpu.arch.efer ^ kvm_host.efer) & EFER_NX))) { in update_transition_efer()
1096 vmx->guest_uret_msrs[i].data = guest_efer; in update_transition_efer()
1097 vmx->guest_uret_msrs[i].mask = ~ignore_bits; in update_transition_efer()
1104 * On 32-bit kernels, VM exits still load the FS and GS bases from the
1134 !(vmx->pt_desc.guest.ctl & RTIT_CTL_TRACEEN); in pt_can_write_msr()
1139 /* The base must be 128-byte aligned and a legal physical address. */ in pt_output_base_valid()
1147 wrmsrq(MSR_IA32_RTIT_STATUS, ctx->status); in pt_load_msr()
1148 wrmsrq(MSR_IA32_RTIT_OUTPUT_BASE, ctx->output_base); in pt_load_msr()
1149 wrmsrq(MSR_IA32_RTIT_OUTPUT_MASK, ctx->output_mask); in pt_load_msr()
1150 wrmsrq(MSR_IA32_RTIT_CR3_MATCH, ctx->cr3_match); in pt_load_msr()
1152 wrmsrq(MSR_IA32_RTIT_ADDR0_A + i * 2, ctx->addr_a[i]); in pt_load_msr()
1153 wrmsrq(MSR_IA32_RTIT_ADDR0_B + i * 2, ctx->addr_b[i]); in pt_load_msr()
1161 rdmsrq(MSR_IA32_RTIT_STATUS, ctx->status); in pt_save_msr()
1162 rdmsrq(MSR_IA32_RTIT_OUTPUT_BASE, ctx->output_base); in pt_save_msr()
1163 rdmsrq(MSR_IA32_RTIT_OUTPUT_MASK, ctx->output_mask); in pt_save_msr()
1164 rdmsrq(MSR_IA32_RTIT_CR3_MATCH, ctx->cr3_match); in pt_save_msr()
1166 rdmsrq(MSR_IA32_RTIT_ADDR0_A + i * 2, ctx->addr_a[i]); in pt_save_msr()
1167 rdmsrq(MSR_IA32_RTIT_ADDR0_B + i * 2, ctx->addr_b[i]); in pt_save_msr()
1180 rdmsrq(MSR_IA32_RTIT_CTL, vmx->pt_desc.host.ctl); in pt_guest_enter()
1181 if (vmx->pt_desc.guest.ctl & RTIT_CTL_TRACEEN) { in pt_guest_enter()
1183 pt_save_msr(&vmx->pt_desc.host, vmx->pt_desc.num_address_ranges); in pt_guest_enter()
1184 pt_load_msr(&vmx->pt_desc.guest, vmx->pt_desc.num_address_ranges); in pt_guest_enter()
1193 if (vmx->pt_desc.guest.ctl & RTIT_CTL_TRACEEN) { in pt_guest_exit()
1194 pt_save_msr(&vmx->pt_desc.guest, vmx->pt_desc.num_address_ranges); in pt_guest_exit()
1195 pt_load_msr(&vmx->pt_desc.host, vmx->pt_desc.num_address_ranges); in pt_guest_exit()
1200 * i.e. RTIT_CTL is always cleared on VM-Exit. Restore it if necessary. in pt_guest_exit()
1202 if (vmx->pt_desc.host.ctl) in pt_guest_exit()
1203 wrmsrq(MSR_IA32_RTIT_CTL, vmx->pt_desc.host.ctl); in pt_guest_exit()
1209 if (unlikely(fs_sel != host->fs_sel)) { in vmx_set_host_fs_gs()
1214 host->fs_sel = fs_sel; in vmx_set_host_fs_gs()
1216 if (unlikely(gs_sel != host->gs_sel)) { in vmx_set_host_fs_gs()
1221 host->gs_sel = gs_sel; in vmx_set_host_fs_gs()
1223 if (unlikely(fs_base != host->fs_base)) { in vmx_set_host_fs_gs()
1225 host->fs_base = fs_base; in vmx_set_host_fs_gs()
1227 if (unlikely(gs_base != host->gs_base)) { in vmx_set_host_fs_gs()
1229 host->gs_base = gs_base; in vmx_set_host_fs_gs()
1248 * to/from long-mode by setting MSR_EFER.LMA. in vmx_prepare_switch_to_guest()
1250 if (!vmx->guest_uret_msrs_loaded) { in vmx_prepare_switch_to_guest()
1251 vmx->guest_uret_msrs_loaded = true; in vmx_prepare_switch_to_guest()
1253 if (!vmx->guest_uret_msrs[i].load_into_hardware) in vmx_prepare_switch_to_guest()
1257 vmx->guest_uret_msrs[i].data, in vmx_prepare_switch_to_guest()
1258 vmx->guest_uret_msrs[i].mask); in vmx_prepare_switch_to_guest()
1262 if (vmx->nested.need_vmcs12_to_shadow_sync) in vmx_prepare_switch_to_guest()
1265 if (vt->guest_state_loaded) in vmx_prepare_switch_to_guest()
1268 host_state = &vmx->loaded_vmcs->host_state; in vmx_prepare_switch_to_guest()
1274 host_state->ldt_sel = kvm_read_ldt(); in vmx_prepare_switch_to_guest()
1277 savesegment(ds, host_state->ds_sel); in vmx_prepare_switch_to_guest()
1278 savesegment(es, host_state->es_sel); in vmx_prepare_switch_to_guest()
1281 if (likely(is_64bit_mm(current->mm))) { in vmx_prepare_switch_to_guest()
1283 fs_sel = current->thread.fsindex; in vmx_prepare_switch_to_guest()
1284 gs_sel = current->thread.gsindex; in vmx_prepare_switch_to_guest()
1285 fs_base = current->thread.fsbase; in vmx_prepare_switch_to_guest()
1286 vt->msr_host_kernel_gs_base = current->thread.gsbase; in vmx_prepare_switch_to_guest()
1291 vt->msr_host_kernel_gs_base = read_msr(MSR_KERNEL_GS_BASE); in vmx_prepare_switch_to_guest()
1294 wrmsrq(MSR_KERNEL_GS_BASE, vmx->msr_guest_kernel_gs_base); in vmx_prepare_switch_to_guest()
1303 vt->guest_state_loaded = true; in vmx_prepare_switch_to_guest()
1310 if (!vmx->vt.guest_state_loaded) in vmx_prepare_switch_to_host()
1313 host_state = &vmx->loaded_vmcs->host_state; in vmx_prepare_switch_to_host()
1315 ++vmx->vcpu.stat.host_state_reload; in vmx_prepare_switch_to_host()
1318 rdmsrq(MSR_KERNEL_GS_BASE, vmx->msr_guest_kernel_gs_base); in vmx_prepare_switch_to_host()
1320 if (host_state->ldt_sel || (host_state->gs_sel & 7)) { in vmx_prepare_switch_to_host()
1321 kvm_load_ldt(host_state->ldt_sel); in vmx_prepare_switch_to_host()
1323 load_gs_index(host_state->gs_sel); in vmx_prepare_switch_to_host()
1325 loadsegment(gs, host_state->gs_sel); in vmx_prepare_switch_to_host()
1328 if (host_state->fs_sel & 7) in vmx_prepare_switch_to_host()
1329 loadsegment(fs, host_state->fs_sel); in vmx_prepare_switch_to_host()
1331 if (unlikely(host_state->ds_sel | host_state->es_sel)) { in vmx_prepare_switch_to_host()
1332 loadsegment(ds, host_state->ds_sel); in vmx_prepare_switch_to_host()
1333 loadsegment(es, host_state->es_sel); in vmx_prepare_switch_to_host()
1338 wrmsrq(MSR_KERNEL_GS_BASE, vmx->vt.msr_host_kernel_gs_base); in vmx_prepare_switch_to_host()
1341 vmx->vt.guest_state_loaded = false; in vmx_prepare_switch_to_host()
1342 vmx->guest_uret_msrs_loaded = false; in vmx_prepare_switch_to_host()
1349 if (vmx->vt.guest_state_loaded) in vmx_read_guest_host_msr()
1359 if (vmx->vt.guest_state_loaded) in vmx_write_guest_host_msr()
1368 &vmx->msr_guest_kernel_gs_base); in vmx_read_guest_kernel_gs_base()
1374 &vmx->msr_guest_kernel_gs_base); in vmx_write_guest_kernel_gs_base()
1381 unsigned int old = vmx->ple_window; in grow_ple_window()
1383 vmx->ple_window = __grow_ple_window(old, ple_window, in grow_ple_window()
1387 if (vmx->ple_window != old) { in grow_ple_window()
1388 vmx->ple_window_dirty = true; in grow_ple_window()
1389 trace_kvm_ple_window_update(vcpu->vcpu_id, in grow_ple_window()
1390 vmx->ple_window, old); in grow_ple_window()
1397 unsigned int old = vmx->ple_window; in shrink_ple_window()
1399 vmx->ple_window = __shrink_ple_window(old, ple_window, in shrink_ple_window()
1403 if (vmx->ple_window != old) { in shrink_ple_window()
1404 vmx->ple_window_dirty = true; in shrink_ple_window()
1405 trace_kvm_ple_window_update(vcpu->vcpu_id, in shrink_ple_window()
1406 vmx->ple_window, old); in shrink_ple_window()
1413 bool already_loaded = vmx->loaded_vmcs->cpu == cpu; in vmx_vcpu_load_vmcs()
1417 loaded_vmcs_clear(vmx->loaded_vmcs); in vmx_vcpu_load_vmcs()
1421 * Ensure loaded_vmcs->cpu is read before adding loaded_vmcs to in vmx_vcpu_load_vmcs()
1428 list_add(&vmx->loaded_vmcs->loaded_vmcss_on_cpu_link, in vmx_vcpu_load_vmcs()
1434 if (prev != vmx->loaded_vmcs->vmcs) { in vmx_vcpu_load_vmcs()
1435 per_cpu(current_vmcs, cpu) = vmx->loaded_vmcs->vmcs; in vmx_vcpu_load_vmcs()
1436 vmcs_load(vmx->loaded_vmcs->vmcs); in vmx_vcpu_load_vmcs()
1449 * Linux uses per-cpu TSS and GDT, so set these when switching in vmx_vcpu_load_vmcs()
1453 (unsigned long)&get_cpu_entry_area(cpu)->tss.x86_tss); in vmx_vcpu_load_vmcs()
1462 vmx->loaded_vmcs->cpu = cpu; in vmx_vcpu_load_vmcs()
1472 if (vcpu->scheduled_out && !kvm_pause_in_guest(vcpu->kvm)) in vmx_vcpu_load()
1500 if (vmx->rmode.vm86_active) { in vmx_get_rflags()
1502 save_rflags = vmx->rmode.save_rflags; in vmx_get_rflags()
1505 vmx->rflags = rflags; in vmx_get_rflags()
1507 return vmx->rflags; in vmx_get_rflags()
1522 vmx->rflags = rflags; in vmx_set_rflags()
1528 vmx->rflags = rflags; in vmx_set_rflags()
1529 if (vmx->rmode.vm86_active) { in vmx_set_rflags()
1530 vmx->rmode.save_rflags = rflags; in vmx_set_rflags()
1535 if ((old_rflags ^ vmx->rflags) & X86_EFLAGS_VM) in vmx_set_rflags()
1536 vmx->vt.emulation_required = vmx_emulation_required(vcpu); in vmx_set_rflags()
1582 if (data & vmx->pt_desc.ctl_bitmask) in vmx_rtit_ctl_check()
1589 if ((vmx->pt_desc.guest.ctl & RTIT_CTL_TRACEEN) && in vmx_rtit_ctl_check()
1591 data != vmx->pt_desc.guest.ctl) in vmx_rtit_ctl_check()
1601 !intel_pt_validate_cap(vmx->pt_desc.caps, in vmx_rtit_ctl_check()
1609 value = intel_pt_validate_cap(vmx->pt_desc.caps, PT_CAP_mtc_periods); in vmx_rtit_ctl_check()
1610 if (intel_pt_validate_cap(vmx->pt_desc.caps, PT_CAP_mtc) && in vmx_rtit_ctl_check()
1614 value = intel_pt_validate_cap(vmx->pt_desc.caps, in vmx_rtit_ctl_check()
1616 if (intel_pt_validate_cap(vmx->pt_desc.caps, PT_CAP_psb_cyc) && in vmx_rtit_ctl_check()
1620 value = intel_pt_validate_cap(vmx->pt_desc.caps, PT_CAP_psb_periods); in vmx_rtit_ctl_check()
1621 if (intel_pt_validate_cap(vmx->pt_desc.caps, PT_CAP_psb_cyc) && in vmx_rtit_ctl_check()
1631 if ((value && (vmx->pt_desc.num_address_ranges < 1)) || (value > 2)) in vmx_rtit_ctl_check()
1634 if ((value && (vmx->pt_desc.num_address_ranges < 2)) || (value > 2)) in vmx_rtit_ctl_check()
1637 if ((value && (vmx->pt_desc.num_address_ranges < 3)) || (value > 2)) in vmx_rtit_ctl_check()
1640 if ((value && (vmx->pt_desc.num_address_ranges < 4)) || (value > 2)) in vmx_rtit_ctl_check()
1662 if ((to_vmx(vcpu)->idt_vectoring_info & VECTORING_INFO_VALID_MASK) && in vmx_check_emulate_instruction()
1680 * (namely Hyper-V) don't set it due to it being undefined behavior, in skip_emulated_instruction()
1691 * the RIP that actually triggered the VM-Exit. But, because in skip_emulated_instruction()
1692 * most instructions that cause VM-Exit will #UD in an enclave, in skip_emulated_instruction()
1693 * most instruction-based VM-Exits simply do not occur. in skip_emulated_instruction()
1700 * WARN if KVM tries to skip a non-zero length instruction on in skip_emulated_instruction()
1701 * a VM-Exit from an enclave. in skip_emulated_instruction()
1707 "skipping instruction after SGX enclave VM-Exit"); in skip_emulated_instruction()
1713 * We need to mask out the high 32 bits of RIP if not in 64-bit in skip_emulated_instruction()
1714 * mode, but just finding out that we are in 64-bit mode is in skip_emulated_instruction()
1734 * Recognizes a pending MTF VM-exit and records the nested state for later
1746 * Per the SDM, MTF takes priority over debug-trap exceptions besides in vmx_update_emulated_instruction()
1747 * TSS T-bit traps and ICEBP (INT1). KVM doesn't emulate T-bit traps in vmx_update_emulated_instruction()
1749 * intercepted #DB deliberately avoids single-step #DB and MTF updates in vmx_update_emulated_instruction()
1752 * any #DB exception pending delivery must be a debug-trap of lower in vmx_update_emulated_instruction()
1757 (!vcpu->arch.exception.pending || in vmx_update_emulated_instruction()
1758 vcpu->arch.exception.vector == DB_VECTOR) && in vmx_update_emulated_instruction()
1759 (!vcpu->arch.exception_vmexit.pending || in vmx_update_emulated_instruction()
1760 vcpu->arch.exception_vmexit.vector == DB_VECTOR)) { in vmx_update_emulated_instruction()
1761 vmx->nested.mtf_pending = true; in vmx_update_emulated_instruction()
1764 vmx->nested.mtf_pending = false; in vmx_update_emulated_instruction()
1782 if (kvm_hlt_in_guest(vcpu->kvm) && in vmx_clear_hlt()
1789 struct kvm_queued_exception *ex = &vcpu->arch.exception; in vmx_inject_exception()
1790 u32 intr_info = ex->vector | INTR_INFO_VALID_MASK; in vmx_inject_exception()
1795 if (ex->has_error_code) { in vmx_inject_exception()
1802 * ABI lets userspace shove in arbitrary 32-bit values. Drop in vmx_inject_exception()
1803 * the upper bits to avoid VM-Fail, losing information that in vmx_inject_exception()
1806 vmcs_write32(VM_ENTRY_EXCEPTION_ERROR_CODE, (u16)ex->error_code); in vmx_inject_exception()
1810 if (vmx->rmode.vm86_active) { in vmx_inject_exception()
1812 if (kvm_exception_is_soft(ex->vector)) in vmx_inject_exception()
1813 inc_eip = vcpu->arch.event_exit_inst_len; in vmx_inject_exception()
1814 kvm_inject_realmode_interrupt(vcpu, ex->vector, inc_eip); in vmx_inject_exception()
1818 WARN_ON_ONCE(vmx->vt.emulation_required); in vmx_inject_exception()
1820 if (kvm_exception_is_soft(ex->vector)) { in vmx_inject_exception()
1822 vmx->vcpu.arch.event_exit_inst_len); in vmx_inject_exception()
1841 uret_msr->load_into_hardware = load_into_hardware; in vmx_setup_uret_msr()
1856 * The SYSCALL MSRs are only needed on long mode guests, and only in vmx_setup_uret_msrs()
1859 load_syscall_msrs = is_long_mode(&vmx->vcpu) && in vmx_setup_uret_msrs()
1860 (vmx->vcpu.arch.efer & EFER_SCE); in vmx_setup_uret_msrs()
1869 guest_cpu_cap_has(&vmx->vcpu, X86_FEATURE_RDTSCP) || in vmx_setup_uret_msrs()
1870 guest_cpu_cap_has(&vmx->vcpu, X86_FEATURE_RDPID)); in vmx_setup_uret_msrs()
1882 * next VM-Enter. in vmx_setup_uret_msrs()
1884 vmx->guest_uret_msrs_loaded = false; in vmx_setup_uret_msrs()
1892 return vmcs12->tsc_offset; in vmx_get_l2_tsc_offset()
1903 return vmcs12->tsc_multiplier; in vmx_get_l2_tsc_multiplier()
1910 vmcs_write64(TSC_OFFSET, vcpu->arch.tsc_offset); in vmx_write_tsc_offset()
1915 vmcs_write64(TSC_MULTIPLIER, vcpu->arch.tsc_scaling_ratio); in vmx_write_tsc_multiplier()
1941 WARN_ON_ONCE(vmx->msr_ia32_feature_control_valid_bits & in is_vmx_feature_control_msr_valid()
1944 if (!msr->host_initiated && in is_vmx_feature_control_msr_valid()
1945 (vmx->msr_ia32_feature_control & FEAT_CTL_LOCKED)) in is_vmx_feature_control_msr_valid()
1948 if (msr->host_initiated) in is_vmx_feature_control_msr_valid()
1951 valid_bits = vmx->msr_ia32_feature_control_valid_bits; in is_vmx_feature_control_msr_valid()
1953 return !(msr->data & ~valid_bits); in is_vmx_feature_control_msr_valid()
1969 * Reads an msr value (of 'msr_info->index') into 'msr_info->data'.
1970 * Returns 0 on success, non-0 otherwise.
1979 switch (msr_info->index) { in vmx_get_msr()
1982 msr_info->data = vmcs_readl(GUEST_FS_BASE); in vmx_get_msr()
1985 msr_info->data = vmcs_readl(GUEST_GS_BASE); in vmx_get_msr()
1988 msr_info->data = vmx_read_guest_kernel_gs_base(vmx); in vmx_get_msr()
1994 if (!msr_info->host_initiated && in vmx_get_msr()
1995 !(vcpu->arch.arch_capabilities & ARCH_CAP_TSX_CTRL_MSR)) in vmx_get_msr()
1999 if (!msr_info->host_initiated && !vmx_has_waitpkg(vmx)) in vmx_get_msr()
2002 msr_info->data = vmx->msr_ia32_umwait_control; in vmx_get_msr()
2005 if (!msr_info->host_initiated && in vmx_get_msr()
2009 msr_info->data = to_vmx(vcpu)->spec_ctrl; in vmx_get_msr()
2012 msr_info->data = vmcs_read32(GUEST_SYSENTER_CS); in vmx_get_msr()
2015 msr_info->data = vmcs_readl(GUEST_SYSENTER_EIP); in vmx_get_msr()
2018 msr_info->data = vmcs_readl(GUEST_SYSENTER_ESP); in vmx_get_msr()
2022 (!msr_info->host_initiated && in vmx_get_msr()
2025 msr_info->data = vmcs_read64(GUEST_BNDCFGS); in vmx_get_msr()
2028 if (!msr_info->host_initiated && in vmx_get_msr()
2029 !(vmx->msr_ia32_feature_control & in vmx_get_msr()
2032 msr_info->data = vcpu->arch.mcg_ext_ctl; in vmx_get_msr()
2035 msr_info->data = vmx->msr_ia32_feature_control; in vmx_get_msr()
2038 if (!msr_info->host_initiated && in vmx_get_msr()
2041 msr_info->data = to_vmx(vcpu)->msr_ia32_sgxlepubkeyhash in vmx_get_msr()
2042 [msr_info->index - MSR_IA32_SGXLEPUBKEYHASH0]; in vmx_get_msr()
2047 if (vmx_get_vmx_msr(&vmx->nested.msrs, msr_info->index, in vmx_get_msr()
2048 &msr_info->data)) in vmx_get_msr()
2053 * instead of just ignoring the features, different Hyper-V in vmx_get_msr()
2058 if (!msr_info->host_initiated && guest_cpu_cap_has_evmcs(vcpu)) in vmx_get_msr()
2059 nested_evmcs_filter_control_msr(vcpu, msr_info->index, in vmx_get_msr()
2060 &msr_info->data); in vmx_get_msr()
2066 msr_info->data = vmx->pt_desc.guest.ctl; in vmx_get_msr()
2071 msr_info->data = vmx->pt_desc.guest.status; in vmx_get_msr()
2075 !intel_pt_validate_cap(vmx->pt_desc.caps, in vmx_get_msr()
2078 msr_info->data = vmx->pt_desc.guest.cr3_match; in vmx_get_msr()
2082 (!intel_pt_validate_cap(vmx->pt_desc.caps, in vmx_get_msr()
2084 !intel_pt_validate_cap(vmx->pt_desc.caps, in vmx_get_msr()
2087 msr_info->data = vmx->pt_desc.guest.output_base; in vmx_get_msr()
2091 (!intel_pt_validate_cap(vmx->pt_desc.caps, in vmx_get_msr()
2093 !intel_pt_validate_cap(vmx->pt_desc.caps, in vmx_get_msr()
2096 msr_info->data = vmx->pt_desc.guest.output_mask; in vmx_get_msr()
2099 index = msr_info->index - MSR_IA32_RTIT_ADDR0_A; in vmx_get_msr()
2101 (index >= 2 * vmx->pt_desc.num_address_ranges)) in vmx_get_msr()
2104 msr_info->data = vmx->pt_desc.guest.addr_b[index / 2]; in vmx_get_msr()
2106 msr_info->data = vmx->pt_desc.guest.addr_a[index / 2]; in vmx_get_msr()
2109 msr_info->data = vmcs_readl(GUEST_S_CET); in vmx_get_msr()
2112 msr_info->data = vmcs_readl(GUEST_SSP); in vmx_get_msr()
2115 msr_info->data = vmcs_readl(GUEST_INTR_SSP_TABLE); in vmx_get_msr()
2118 msr_info->data = vmx_guest_debugctl_read(); in vmx_get_msr()
2122 msr = vmx_find_uret_msr(vmx, msr_info->index); in vmx_get_msr()
2124 msr_info->data = msr->data; in vmx_get_msr()
2176 * Returns 0 on success, non-0 otherwise.
2184 u32 msr_index = msr_info->index; in vmx_set_msr()
2185 u64 data = msr_info->data; in vmx_set_msr()
2207 * Always intercepting WRMSR could incur non-negligible in vmx_set_msr()
2210 * upon the first write with a non-zero value (indicating in vmx_set_msr()
2218 vcpu->arch.xfd_no_write_intercept = true; in vmx_set_msr()
2225 get_vmcs12(vcpu)->guest_sysenter_cs = data; in vmx_set_msr()
2231 get_vmcs12(vcpu)->guest_sysenter_eip = data; in vmx_set_msr()
2238 get_vmcs12(vcpu)->guest_sysenter_esp = data; in vmx_set_msr()
2243 if (!vmx_is_valid_debugctl(vcpu, data, msr_info->host_initiated)) in vmx_set_msr()
2246 data &= vmx_get_supported_debugctl(vcpu, msr_info->host_initiated); in vmx_set_msr()
2248 if (is_guest_mode(vcpu) && get_vmcs12(vcpu)->vm_exit_controls & in vmx_set_msr()
2250 get_vmcs12(vcpu)->guest_ia32_debugctl = data; in vmx_set_msr()
2254 if (intel_pmu_lbr_is_enabled(vcpu) && !to_vmx(vcpu)->lbr_desc.event && in vmx_set_msr()
2260 (!msr_info->host_initiated && in vmx_set_msr()
2268 ((vmx->nested.msrs.entry_ctls_high & VM_ENTRY_LOAD_BNDCFGS) || in vmx_set_msr()
2269 (vmx->nested.msrs.exit_ctls_high & VM_EXIT_CLEAR_BNDCFGS))) in vmx_set_msr()
2270 get_vmcs12(vcpu)->guest_bndcfgs = data; in vmx_set_msr()
2275 if (!msr_info->host_initiated && !vmx_has_waitpkg(vmx)) in vmx_set_msr()
2278 /* The reserved bit 1 and non-32 bit [63:32] should be zero */ in vmx_set_msr()
2282 vmx->msr_ia32_umwait_control = data; in vmx_set_msr()
2285 if (!msr_info->host_initiated && in vmx_set_msr()
2292 vmx->spec_ctrl = data; in vmx_set_msr()
2297 * For non-nested: in vmx_set_msr()
2298 * When it's written (to non-zero) for the first time, pass in vmx_set_msr()
2313 if (!msr_info->host_initiated && in vmx_set_msr()
2314 !(vcpu->arch.arch_capabilities & ARCH_CAP_TSX_CTRL_MSR)) in vmx_set_msr()
2325 get_vmcs12(vcpu)->vm_exit_controls & VM_EXIT_SAVE_IA32_PAT) in vmx_set_msr()
2326 get_vmcs12(vcpu)->guest_ia32_pat = data; in vmx_set_msr()
2332 if ((!msr_info->host_initiated && in vmx_set_msr()
2333 !(to_vmx(vcpu)->msr_ia32_feature_control & in vmx_set_msr()
2337 vcpu->arch.mcg_ext_ctl = data; in vmx_set_msr()
2343 vmx->msr_ia32_feature_control = data; in vmx_set_msr()
2344 if (msr_info->host_initiated && data == 0) in vmx_set_msr()
2362 if (!msr_info->host_initiated && in vmx_set_msr()
2364 ((vmx->msr_ia32_feature_control & FEAT_CTL_LOCKED) && in vmx_set_msr()
2365 !(vmx->msr_ia32_feature_control & FEAT_CTL_SGX_LC_ENABLED)))) in vmx_set_msr()
2367 vmx->msr_ia32_sgxlepubkeyhash in vmx_set_msr()
2368 [msr_index - MSR_IA32_SGXLEPUBKEYHASH0] = data; in vmx_set_msr()
2371 if (!msr_info->host_initiated) in vmx_set_msr()
2372 return 1; /* they are read-only */ in vmx_set_msr()
2379 vmx->nested.vmxon) in vmx_set_msr()
2382 vmx->pt_desc.guest.ctl = data; in vmx_set_msr()
2390 vmx->pt_desc.guest.status = data; in vmx_set_msr()
2395 if (!intel_pt_validate_cap(vmx->pt_desc.caps, in vmx_set_msr()
2398 vmx->pt_desc.guest.cr3_match = data; in vmx_set_msr()
2403 if (!intel_pt_validate_cap(vmx->pt_desc.caps, in vmx_set_msr()
2405 !intel_pt_validate_cap(vmx->pt_desc.caps, in vmx_set_msr()
2410 vmx->pt_desc.guest.output_base = data; in vmx_set_msr()
2415 if (!intel_pt_validate_cap(vmx->pt_desc.caps, in vmx_set_msr()
2417 !intel_pt_validate_cap(vmx->pt_desc.caps, in vmx_set_msr()
2420 vmx->pt_desc.guest.output_mask = data; in vmx_set_msr()
2425 index = msr_info->index - MSR_IA32_RTIT_ADDR0_A; in vmx_set_msr()
2426 if (index >= 2 * vmx->pt_desc.num_address_ranges) in vmx_set_msr()
2431 vmx->pt_desc.guest.addr_b[index / 2] = data; in vmx_set_msr()
2433 vmx->pt_desc.guest.addr_a[index / 2] = data; in vmx_set_msr()
2490 vcpu->arch.regs[VCPU_REGS_RSP] = vmcs_readl(GUEST_RSP); in vmx_cache_reg()
2493 vcpu->arch.regs[VCPU_REGS_RIP] = vmcs_readl(GUEST_RIP); in vmx_cache_reg()
2500 guest_owned_bits = vcpu->arch.cr0_guest_owned_bits; in vmx_cache_reg()
2502 vcpu->arch.cr0 &= ~guest_owned_bits; in vmx_cache_reg()
2503 vcpu->arch.cr0 |= vmcs_readl(GUEST_CR0) & guest_owned_bits; in vmx_cache_reg()
2511 vcpu->arch.cr3 = vmcs_readl(GUEST_CR3); in vmx_cache_reg()
2514 guest_owned_bits = vcpu->arch.cr4_guest_owned_bits; in vmx_cache_reg()
2516 vcpu->arch.cr4 &= ~guest_owned_bits; in vmx_cache_reg()
2517 vcpu->arch.cr4 |= vmcs_readl(GUEST_CR4) & guest_owned_bits; in vmx_cache_reg()
2520 KVM_BUG_ON(1, vcpu->kvm); in vmx_cache_reg()
2548 return -EIO; in adjust_vmx_controls()
2577 pr_warn_once("Inconsistent VM-Entry/VM-Exit pair, " \
2583 r = -EIO; \
2626 return -EIO; in setup_vmcs_config()
2632 return -EIO; in setup_vmcs_config()
2650 &vmx_cap->ept, &vmx_cap->vpid); in setup_vmcs_config()
2653 vmx_cap->ept) { in setup_vmcs_config()
2655 "1-setting enable EPT VM-execution control\n"); in setup_vmcs_config()
2658 return -EIO; in setup_vmcs_config()
2660 vmx_cap->ept = 0; in setup_vmcs_config()
2664 vmx_cap->vpid) { in setup_vmcs_config()
2666 "1-setting enable VPID VM-execution control\n"); in setup_vmcs_config()
2669 return -EIO; in setup_vmcs_config()
2671 vmx_cap->vpid = 0; in setup_vmcs_config()
2686 return -EIO; in setup_vmcs_config()
2692 return -EIO; in setup_vmcs_config()
2704 return -EIO; in setup_vmcs_config()
2708 return -EIO; in setup_vmcs_config()
2733 /* IA-32 SDM Vol 3B: VMCS size is never greater than 4kB. */ in setup_vmcs_config()
2735 return -EIO; in setup_vmcs_config()
2740 * VMCS fields for 64-bit kernels, and per the SDM, "This bit is always in setup_vmcs_config()
2744 return -EIO; in setup_vmcs_config()
2747 /* Require Write-Back (WB) memory type for VMCS accesses. */ in setup_vmcs_config()
2749 return -EIO; in setup_vmcs_config()
2753 vmcs_conf->basic = basic_msr; in setup_vmcs_config()
2754 vmcs_conf->pin_based_exec_ctrl = _pin_based_exec_control; in setup_vmcs_config()
2755 vmcs_conf->cpu_based_exec_ctrl = _cpu_based_exec_control; in setup_vmcs_config()
2756 vmcs_conf->cpu_based_2nd_exec_ctrl = _cpu_based_2nd_exec_control; in setup_vmcs_config()
2757 vmcs_conf->cpu_based_3rd_exec_ctrl = _cpu_based_3rd_exec_control; in setup_vmcs_config()
2758 vmcs_conf->vmexit_ctrl = _vmexit_control; in setup_vmcs_config()
2759 vmcs_conf->vmentry_ctrl = _vmentry_control; in setup_vmcs_config()
2760 vmcs_conf->misc = misc_msr; in setup_vmcs_config()
2806 return -EIO; in vmx_check_processor_compat()
2810 return -EIO; in vmx_check_processor_compat()
2816 return -EIO; in vmx_check_processor_compat()
2838 return -EFAULT; in kvm_cpu_vmxon()
2848 return -EBUSY; in vmx_enable_virtualization_cpu()
2851 * This can happen if we hot-added a CPU but failed to allocate in vmx_enable_virtualization_cpu()
2855 return -EFAULT; in vmx_enable_virtualization_cpu()
2904 vmcs->hdr.revision_id = KVM_EVMCS_VERSION; in alloc_vmcs_cpu()
2906 vmcs->hdr.revision_id = vmx_basic_vmcs_revision_id(vmcs_config.basic); in alloc_vmcs_cpu()
2909 vmcs->hdr.shadow_vmcs = 1; in alloc_vmcs_cpu()
2923 if (!loaded_vmcs->vmcs) in free_loaded_vmcs()
2926 free_vmcs(loaded_vmcs->vmcs); in free_loaded_vmcs()
2927 loaded_vmcs->vmcs = NULL; in free_loaded_vmcs()
2928 if (loaded_vmcs->msr_bitmap) in free_loaded_vmcs()
2929 free_page((unsigned long)loaded_vmcs->msr_bitmap); in free_loaded_vmcs()
2930 WARN_ON(loaded_vmcs->shadow_vmcs != NULL); in free_loaded_vmcs()
2935 loaded_vmcs->vmcs = alloc_vmcs(false); in alloc_loaded_vmcs()
2936 if (!loaded_vmcs->vmcs) in alloc_loaded_vmcs()
2937 return -ENOMEM; in alloc_loaded_vmcs()
2939 vmcs_clear(loaded_vmcs->vmcs); in alloc_loaded_vmcs()
2941 loaded_vmcs->shadow_vmcs = NULL; in alloc_loaded_vmcs()
2942 loaded_vmcs->hv_timer_soft_disabled = false; in alloc_loaded_vmcs()
2943 loaded_vmcs->cpu = -1; in alloc_loaded_vmcs()
2944 loaded_vmcs->launched = 0; in alloc_loaded_vmcs()
2947 loaded_vmcs->msr_bitmap = (unsigned long *) in alloc_loaded_vmcs()
2949 if (!loaded_vmcs->msr_bitmap) in alloc_loaded_vmcs()
2951 memset(loaded_vmcs->msr_bitmap, 0xff, PAGE_SIZE); in alloc_loaded_vmcs()
2954 memset(&loaded_vmcs->host_state, 0, sizeof(struct vmcs_host_state)); in alloc_loaded_vmcs()
2955 memset(&loaded_vmcs->controls_shadow, 0, in alloc_loaded_vmcs()
2962 return -ENOMEM; in alloc_loaded_vmcs()
2985 return -ENOMEM; in alloc_kvm_area()
2990 * vmcs->revision_id to KVM_EVMCS_VERSION instead of in alloc_kvm_area()
2999 vmcs->hdr.revision_id = vmx_basic_vmcs_revision_id(vmcs_config.basic); in alloc_kvm_area()
3013 * is in the middle of the transition from real mode to in fix_pmode_seg()
3014 * protected mode it is safe to assume that RPL 0 is a good in fix_pmode_seg()
3018 save->selector &= ~SEGMENT_RPL_MASK; in fix_pmode_seg()
3019 save->dpl = save->selector & SEGMENT_RPL_MASK; in fix_pmode_seg()
3020 save->s = 1; in fix_pmode_seg()
3031 * Update real mode segment cache. It may be not up-to-date if segment in enter_pmode()
3032 * register was written while vcpu was in a guest mode. in enter_pmode()
3034 vmx_get_segment(vcpu, &vmx->rmode.segs[VCPU_SREG_ES], VCPU_SREG_ES); in enter_pmode()
3035 vmx_get_segment(vcpu, &vmx->rmode.segs[VCPU_SREG_DS], VCPU_SREG_DS); in enter_pmode()
3036 vmx_get_segment(vcpu, &vmx->rmode.segs[VCPU_SREG_FS], VCPU_SREG_FS); in enter_pmode()
3037 vmx_get_segment(vcpu, &vmx->rmode.segs[VCPU_SREG_GS], VCPU_SREG_GS); in enter_pmode()
3038 vmx_get_segment(vcpu, &vmx->rmode.segs[VCPU_SREG_SS], VCPU_SREG_SS); in enter_pmode()
3039 vmx_get_segment(vcpu, &vmx->rmode.segs[VCPU_SREG_CS], VCPU_SREG_CS); in enter_pmode()
3041 vmx->rmode.vm86_active = 0; in enter_pmode()
3043 __vmx_set_segment(vcpu, &vmx->rmode.segs[VCPU_SREG_TR], VCPU_SREG_TR); in enter_pmode()
3047 flags |= vmx->rmode.save_rflags & ~RMODE_GUEST_OWNED_EFLAGS_BITS; in enter_pmode()
3055 fix_pmode_seg(vcpu, VCPU_SREG_CS, &vmx->rmode.segs[VCPU_SREG_CS]); in enter_pmode()
3056 fix_pmode_seg(vcpu, VCPU_SREG_SS, &vmx->rmode.segs[VCPU_SREG_SS]); in enter_pmode()
3057 fix_pmode_seg(vcpu, VCPU_SREG_ES, &vmx->rmode.segs[VCPU_SREG_ES]); in enter_pmode()
3058 fix_pmode_seg(vcpu, VCPU_SREG_DS, &vmx->rmode.segs[VCPU_SREG_DS]); in enter_pmode()
3059 fix_pmode_seg(vcpu, VCPU_SREG_FS, &vmx->rmode.segs[VCPU_SREG_FS]); in enter_pmode()
3060 fix_pmode_seg(vcpu, VCPU_SREG_GS, &vmx->rmode.segs[VCPU_SREG_GS]); in enter_pmode()
3084 if (save->base & 0xf) in fix_rmode_seg()
3086 "when entering protected mode (seg=%d)", seg); in fix_rmode_seg()
3089 vmcs_write16(sf->selector, var.selector); in fix_rmode_seg()
3090 vmcs_writel(sf->base, var.base); in fix_rmode_seg()
3091 vmcs_write32(sf->limit, var.limit); in fix_rmode_seg()
3092 vmcs_write32(sf->ar_bytes, vmx_segment_access_rights(&var)); in fix_rmode_seg()
3099 struct kvm_vmx *kvm_vmx = to_kvm_vmx(vcpu->kvm); in enter_rmode()
3102 * KVM should never use VM86 to virtualize Real Mode when L2 is active, in enter_rmode()
3104 * if unrestricted guest is disabled, VM-Enter (from L1) with CR0.PG=0 in enter_rmode()
3105 * should VM-Fail and KVM should reject userspace attempts to stuff in enter_rmode()
3110 vmx_get_segment(vcpu, &vmx->rmode.segs[VCPU_SREG_TR], VCPU_SREG_TR); in enter_rmode()
3111 vmx_get_segment(vcpu, &vmx->rmode.segs[VCPU_SREG_ES], VCPU_SREG_ES); in enter_rmode()
3112 vmx_get_segment(vcpu, &vmx->rmode.segs[VCPU_SREG_DS], VCPU_SREG_DS); in enter_rmode()
3113 vmx_get_segment(vcpu, &vmx->rmode.segs[VCPU_SREG_FS], VCPU_SREG_FS); in enter_rmode()
3114 vmx_get_segment(vcpu, &vmx->rmode.segs[VCPU_SREG_GS], VCPU_SREG_GS); in enter_rmode()
3115 vmx_get_segment(vcpu, &vmx->rmode.segs[VCPU_SREG_SS], VCPU_SREG_SS); in enter_rmode()
3116 vmx_get_segment(vcpu, &vmx->rmode.segs[VCPU_SREG_CS], VCPU_SREG_CS); in enter_rmode()
3118 vmx->rmode.vm86_active = 1; in enter_rmode()
3122 vmcs_writel(GUEST_TR_BASE, kvm_vmx->tss_addr); in enter_rmode()
3123 vmcs_write32(GUEST_TR_LIMIT, RMODE_TSS_SIZE - 1); in enter_rmode()
3127 vmx->rmode.save_rflags = flags; in enter_rmode()
3135 fix_rmode_seg(VCPU_SREG_SS, &vmx->rmode.segs[VCPU_SREG_SS]); in enter_rmode()
3136 fix_rmode_seg(VCPU_SREG_CS, &vmx->rmode.segs[VCPU_SREG_CS]); in enter_rmode()
3137 fix_rmode_seg(VCPU_SREG_ES, &vmx->rmode.segs[VCPU_SREG_ES]); in enter_rmode()
3138 fix_rmode_seg(VCPU_SREG_DS, &vmx->rmode.segs[VCPU_SREG_DS]); in enter_rmode()
3139 fix_rmode_seg(VCPU_SREG_GS, &vmx->rmode.segs[VCPU_SREG_GS]); in enter_rmode()
3140 fix_rmode_seg(VCPU_SREG_FS, &vmx->rmode.segs[VCPU_SREG_FS]); in enter_rmode()
3151 vcpu->arch.efer = efer; in vmx_set_efer()
3158 if (KVM_BUG_ON(efer & EFER_LMA, vcpu->kvm)) in vmx_set_efer()
3176 pr_debug_ratelimited("%s: tss fixup for long mode. \n", in enter_lmode()
3182 vmx_set_efer(vcpu, vcpu->arch.efer | EFER_LMA); in enter_lmode()
3187 vmx_set_efer(vcpu, vcpu->arch.efer & ~EFER_LMA); in exit_lmode()
3198 * the CPU is not required to invalidate guest-physical mappings on in vmx_flush_tlb_all()
3199 * VM-Entry, even if VPID is disabled. Guest-physical mappings are in vmx_flush_tlb_all()
3201 * (INVVPID also isn't required to invalidate guest-physical mappings). in vmx_flush_tlb_all()
3209 vpid_sync_vcpu_single(vmx->vpid); in vmx_flush_tlb_all()
3210 vpid_sync_vcpu_single(vmx->nested.vpid02); in vmx_flush_tlb_all()
3219 return to_vmx(vcpu)->vpid; in vmx_get_current_vpid()
3224 struct kvm_mmu *mmu = vcpu->arch.mmu; in vmx_flush_tlb_current()
3225 u64 root_hpa = mmu->root.hpa; in vmx_flush_tlb_current()
3233 mmu->root_role.level)); in vmx_flush_tlb_current()
3251 * vpid couldn't be allocated for this vCPU. VM-Enter and VM-Exit are in vmx_flush_tlb_guest()
3252 * required to flush GVA->{G,H}PA mappings from the TLB if vpid is in vmx_flush_tlb_guest()
3253 * disabled (VM-Enter with vpid enabled and vpid==0 is disallowed), in vmx_flush_tlb_guest()
3261 struct kvm_mmu *mmu = vcpu->arch.walk_mmu; in vmx_ept_load_pdptrs()
3267 vmcs_write64(GUEST_PDPTR0, mmu->pdptrs[0]); in vmx_ept_load_pdptrs()
3268 vmcs_write64(GUEST_PDPTR1, mmu->pdptrs[1]); in vmx_ept_load_pdptrs()
3269 vmcs_write64(GUEST_PDPTR2, mmu->pdptrs[2]); in vmx_ept_load_pdptrs()
3270 vmcs_write64(GUEST_PDPTR3, mmu->pdptrs[3]); in vmx_ept_load_pdptrs()
3276 struct kvm_mmu *mmu = vcpu->arch.walk_mmu; in ept_save_pdptrs()
3281 mmu->pdptrs[0] = vmcs_read64(GUEST_PDPTR0); in ept_save_pdptrs()
3282 mmu->pdptrs[1] = vmcs_read64(GUEST_PDPTR1); in ept_save_pdptrs()
3283 mmu->pdptrs[2] = vmcs_read64(GUEST_PDPTR2); in ept_save_pdptrs()
3284 mmu->pdptrs[3] = vmcs_read64(GUEST_PDPTR3); in ept_save_pdptrs()
3297 if (to_vmx(vcpu)->nested.vmxon) in vmx_is_valid_cr0()
3319 if (vmx->rmode.vm86_active && (cr0 & X86_CR0_PE)) in vmx_set_cr0()
3322 if (!vmx->rmode.vm86_active && !(cr0 & X86_CR0_PE)) in vmx_set_cr0()
3328 vcpu->arch.cr0 = cr0; in vmx_set_cr0()
3332 if (vcpu->arch.efer & EFER_LME) { in vmx_set_cr0()
3342 * Ensure KVM has an up-to-date snapshot of the guest's CR3. If in vmx_set_cr0()
3359 * e.g. after nested VM-Enter. in vmx_set_cr0()
3372 tmp |= get_vmcs12(vcpu)->cpu_based_vm_exec_control & CR3_EXITING_BITS; in vmx_set_cr0()
3376 /* Note, vmx_set_cr4() consumes the new vcpu->arch.cr0. */ in vmx_set_cr0()
3381 * When !CR0_PG -> CR0_PG, vcpu->arch.cr3 becomes active, but in vmx_set_cr0()
3382 * GUEST_CR3 is still vmx->ept_identity_map_addr if EPT + !URG. in vmx_set_cr0()
3388 /* depends on vcpu->arch.cr0 to be set to a new value */ in vmx_set_cr0()
3389 vmx->vt.emulation_required = vmx_emulation_required(vcpu); in vmx_set_cr0()
3415 struct kvm *kvm = vcpu->kvm; in vmx_load_mmu_pgd()
3427 guest_cr3 = to_kvm_vmx(kvm)->ept_identity_map_addr; in vmx_load_mmu_pgd()
3429 guest_cr3 = vcpu->arch.cr3; in vmx_load_mmu_pgd()
3430 else /* vmcs.GUEST_CR3 is already up-to-date. */ in vmx_load_mmu_pgd()
3452 if (to_vmx(vcpu)->nested.vmxon && !nested_cr4_valid(vcpu, cr4)) in vmx_is_valid_cr4()
3466 * is in force while we are in guest mode. Do not let guests control in vmx_set_cr4()
3472 else if (vmx->rmode.vm86_active) in vmx_set_cr4()
3487 vcpu->arch.cr4 = cr4; in vmx_set_cr4()
3501 * SMEP/SMAP/PKU is disabled if CPU is in non-paging mode in in vmx_set_cr4()
3503 * to be manually disabled when guest switches to non-paging in vmx_set_cr4()
3504 * mode. in vmx_set_cr4()
3519 vcpu->arch.cpuid_dynamic_bits_dirty = true; in vmx_set_cr4()
3527 if (vmx->rmode.vm86_active && seg != VCPU_SREG_LDTR) { in vmx_get_segment()
3528 *var = vmx->rmode.segs[seg]; in vmx_get_segment()
3530 || var->selector == vmx_read_guest_seg_selector(vmx, seg)) in vmx_get_segment()
3532 var->base = vmx_read_guest_seg_base(vmx, seg); in vmx_get_segment()
3533 var->selector = vmx_read_guest_seg_selector(vmx, seg); in vmx_get_segment()
3536 var->base = vmx_read_guest_seg_base(vmx, seg); in vmx_get_segment()
3537 var->limit = vmx_read_guest_seg_limit(vmx, seg); in vmx_get_segment()
3538 var->selector = vmx_read_guest_seg_selector(vmx, seg); in vmx_get_segment()
3540 var->unusable = (ar >> 16) & 1; in vmx_get_segment()
3541 var->type = ar & 15; in vmx_get_segment()
3542 var->s = (ar >> 4) & 1; in vmx_get_segment()
3543 var->dpl = (ar >> 5) & 3; in vmx_get_segment()
3551 var->present = !var->unusable; in vmx_get_segment()
3552 var->avl = (ar >> 12) & 1; in vmx_get_segment()
3553 var->l = (ar >> 13) & 1; in vmx_get_segment()
3554 var->db = (ar >> 14) & 1; in vmx_get_segment()
3555 var->g = (ar >> 15) & 1; in vmx_get_segment()
3562 if (to_vmx(vcpu)->rmode.vm86_active) { in vmx_get_segment_base()
3574 if (unlikely(vmx->rmode.vm86_active)) in __vmx_get_cpl()
3598 ar = var->type & 15; in vmx_segment_access_rights()
3599 ar |= (var->s & 1) << 4; in vmx_segment_access_rights()
3600 ar |= (var->dpl & 3) << 5; in vmx_segment_access_rights()
3601 ar |= (var->present & 1) << 7; in vmx_segment_access_rights()
3602 ar |= (var->avl & 1) << 12; in vmx_segment_access_rights()
3603 ar |= (var->l & 1) << 13; in vmx_segment_access_rights()
3604 ar |= (var->db & 1) << 14; in vmx_segment_access_rights()
3605 ar |= (var->g & 1) << 15; in vmx_segment_access_rights()
3606 ar |= (var->unusable || !var->present) << 16; in vmx_segment_access_rights()
3618 if (vmx->rmode.vm86_active && seg != VCPU_SREG_LDTR) { in __vmx_set_segment()
3619 vmx->rmode.segs[seg] = *var; in __vmx_set_segment()
3621 vmcs_write16(sf->selector, var->selector); in __vmx_set_segment()
3622 else if (var->s) in __vmx_set_segment()
3623 fix_rmode_seg(seg, &vmx->rmode.segs[seg]); in __vmx_set_segment()
3627 vmcs_writel(sf->base, var->base); in __vmx_set_segment()
3628 vmcs_write32(sf->limit, var->limit); in __vmx_set_segment()
3629 vmcs_write16(sf->selector, var->selector); in __vmx_set_segment()
3637 * state vmexit when "unrestricted guest" mode is turned on. in __vmx_set_segment()
3643 var->type |= 0x1; /* Accessed */ in __vmx_set_segment()
3645 vmcs_write32(sf->ar_bytes, vmx_segment_access_rights(var)); in __vmx_set_segment()
3652 to_vmx(vcpu)->vt.emulation_required = vmx_emulation_required(vcpu); in vmx_set_segment()
3665 dt->size = vmcs_read32(GUEST_IDTR_LIMIT); in vmx_get_idt()
3666 dt->address = vmcs_readl(GUEST_IDTR_BASE); in vmx_get_idt()
3671 vmcs_write32(GUEST_IDTR_LIMIT, dt->size); in vmx_set_idt()
3672 vmcs_writel(GUEST_IDTR_BASE, dt->address); in vmx_set_idt()
3677 dt->size = vmcs_read32(GUEST_GDTR_LIMIT); in vmx_get_gdt()
3678 dt->address = vmcs_readl(GUEST_GDTR_BASE); in vmx_get_gdt()
3683 vmcs_write32(GUEST_GDTR_LIMIT, dt->size); in vmx_set_gdt()
3684 vmcs_writel(GUEST_GDTR_BASE, dt->address); in vmx_set_gdt()
3793 if (tr.type != 3 && tr.type != 11) /* TODO: Check if guest is in IA32e mode */ in tr_valid()
3837 /* real mode guest state checks */ in __vmx_guest_state_valid()
3852 /* protected mode guest state checks */ in __vmx_guest_state_valid()
3873 * - Add checks on RIP in __vmx_guest_state_valid()
3874 * - Add checks on RFLAGS in __vmx_guest_state_valid()
3888 return -EFAULT; in init_rmode_tss()
3893 return -EFAULT; in init_rmode_tss()
3896 if (__copy_to_user(ua + RMODE_TSS_SIZE - 1, &data, sizeof(u8))) in init_rmode_tss()
3897 return -EFAULT; in init_rmode_tss()
3909 /* Protect kvm_vmx->ept_identity_pagetable_done. */ in init_rmode_identity_map()
3910 mutex_lock(&kvm->slots_lock); in init_rmode_identity_map()
3912 if (likely(kvm_vmx->ept_identity_pagetable_done)) in init_rmode_identity_map()
3915 if (!kvm_vmx->ept_identity_map_addr) in init_rmode_identity_map()
3916 kvm_vmx->ept_identity_map_addr = VMX_EPT_IDENTITY_PAGETABLE_ADDR; in init_rmode_identity_map()
3920 kvm_vmx->ept_identity_map_addr, in init_rmode_identity_map()
3927 /* Set up identity-mapping pagetable for EPT in real mode */ in init_rmode_identity_map()
3932 r = -EFAULT; in init_rmode_identity_map()
3936 kvm_vmx->ept_identity_pagetable_done = true; in init_rmode_identity_map()
3939 mutex_unlock(&kvm->slots_lock); in init_rmode_identity_map()
3948 vmcs_write16(sf->selector, 0); in seg_setup()
3949 vmcs_writel(sf->base, 0); in seg_setup()
3950 vmcs_write32(sf->limit, 0xffff); in seg_setup()
3955 vmcs_write32(sf->ar_bytes, ar); in seg_setup()
3986 * When KVM is a nested hypervisor on top of Hyper-V and uses in vmx_msr_bitmap_l01_changed()
3991 struct hv_enlightened_vmcs *evmcs = (void *)vmx->vmcs01.vmcs; in vmx_msr_bitmap_l01_changed()
3993 if (evmcs->hv_enlightenments_control.msr_bitmap) in vmx_msr_bitmap_l01_changed()
3994 evmcs->hv_clean_fields &= in vmx_msr_bitmap_l01_changed()
3998 vmx->nested.force_msr_bitmap_recalc = true; in vmx_msr_bitmap_l01_changed()
4004 unsigned long *msr_bitmap = vmx->vmcs01.msr_bitmap; in vmx_set_intercept_for_msr()
4029 * x2APIC indices for 64-bit accesses into the RDMSR and WRMSR halves in vmx_update_msr_bitmap_x2apic()
4036 u64 *msr_bitmap = (u64 *)vmx->vmcs01.msr_bitmap; in vmx_update_msr_bitmap_x2apic()
4037 u8 mode; in vmx_update_msr_bitmap_x2apic() local
4045 mode = MSR_BITMAP_MODE_X2APIC; in vmx_update_msr_bitmap_x2apic()
4047 mode |= MSR_BITMAP_MODE_X2APIC_APICV; in vmx_update_msr_bitmap_x2apic()
4049 mode = 0; in vmx_update_msr_bitmap_x2apic()
4052 if (mode == vmx->x2apic_msr_bitmap_mode) in vmx_update_msr_bitmap_x2apic()
4055 vmx->x2apic_msr_bitmap_mode = mode; in vmx_update_msr_bitmap_x2apic()
4058 * Reset the bitmap for MSRs 0x800 - 0x83f. Leave AMD's uber-extended in vmx_update_msr_bitmap_x2apic()
4062 * mode, only the current timer count needs on-demand emulation by KVM. in vmx_update_msr_bitmap_x2apic()
4064 if (mode & MSR_BITMAP_MODE_X2APIC_APICV) in vmx_update_msr_bitmap_x2apic()
4065 msr_bitmap[read_idx] = ~kvm_lapic_readable_reg_mask(vcpu->arch.apic); in vmx_update_msr_bitmap_x2apic()
4075 !(mode & MSR_BITMAP_MODE_X2APIC)); in vmx_update_msr_bitmap_x2apic()
4077 if (mode & MSR_BITMAP_MODE_X2APIC_APICV) { in vmx_update_msr_bitmap_x2apic()
4089 bool flag = !(vmx->pt_desc.guest.ctl & RTIT_CTL_TRACEEN); in pt_update_intercept_for_msr()
4096 for (i = 0; i < vmx->pt_desc.num_address_ranges; i++) { in pt_update_intercept_for_msr()
4118 if (kvm_cstate_in_guest(vcpu->kvm)) { in vmx_recalc_msr_intercepts()
4124 if (kvm_aperfmperf_in_guest(vcpu->kvm)) { in vmx_recalc_msr_intercepts()
4133 if (vcpu->arch.xfd_no_write_intercept) in vmx_recalc_msr_intercepts()
4137 !to_vmx(vcpu)->spec_ctrl); in vmx_recalc_msr_intercepts()
4169 * x2APIC and LBR MSR intercepts are modified on-demand and cannot be in vmx_recalc_msr_intercepts()
4186 * and freed, and must not be accessed outside of vcpu->mutex. The in vmx_deliver_nested_posted_interrupt()
4192 vector == vmx->nested.posted_intr_nv) { in vmx_deliver_nested_posted_interrupt()
4197 vmx->nested.pi_pending = true; in vmx_deliver_nested_posted_interrupt()
4201 * This pairs with the smp_mb_*() after setting vcpu->mode in in vmx_deliver_nested_posted_interrupt()
4204 * vcpu->mode != IN_GUEST_MODE. The extra barrier is needed as in vmx_deliver_nested_posted_interrupt()
4208 * vcpu->requests and the load from vcpu->mode. in vmx_deliver_nested_posted_interrupt()
4216 return -1; in vmx_deliver_nested_posted_interrupt()
4220 * 1. If target vcpu is running(non-root mode), send posted interrupt
4222 * 2. If target vcpu isn't running(root mode), kick it to pick up the
4234 /* Note, this is called iff the local APIC is in-kernel. */ in vmx_deliver_posted_interrupt()
4235 if (!vcpu->arch.apic->apicv_active) in vmx_deliver_posted_interrupt()
4236 return -1; in vmx_deliver_posted_interrupt()
4238 __vmx_deliver_posted_interrupt(vcpu, &vt->pi_desc, vector); in vmx_deliver_posted_interrupt()
4245 struct kvm_vcpu *vcpu = apic->vcpu; in vmx_deliver_interrupt()
4252 trace_kvm_apicv_accept_irq(vcpu->vcpu_id, delivery_mode, in vmx_deliver_interrupt()
4258 * Set up the vmcs's constant host-state fields, i.e., host-state fields that
4260 * Note that host-state that does change is set elsewhere. E.g., host-state
4279 vmx->loaded_vmcs->host_state.cr3 = cr3; in vmx_set_constant_host_state()
4284 vmx->loaded_vmcs->host_state.cr4 = cr4; in vmx_set_constant_host_state()
4310 * SYSENTER is used for 32-bit system calls on either 32-bit or in vmx_set_constant_host_state()
4311 * 64-bit kernels. It is always zero If neither is allowed, otherwise in vmx_set_constant_host_state()
4312 * vmx_vcpu_load_vmcs loads it with the per-CPU entry stack (and may in vmx_set_constant_host_state()
4333 * so resetting the two registers to 0s at VM-Exit does no harm in vmx_set_constant_host_state()
4347 struct kvm_vcpu *vcpu = &vmx->vcpu; in set_cr4_guest_host_mask()
4349 vcpu->arch.cr4_guest_owned_bits = KVM_POSSIBLE_CR4_GUEST_BITS & in set_cr4_guest_host_mask()
4350 ~vcpu->arch.cr4_guest_rsvd_bits; in set_cr4_guest_host_mask()
4352 vcpu->arch.cr4_guest_owned_bits &= ~X86_CR4_TLBFLUSH_BITS; in set_cr4_guest_host_mask()
4353 vcpu->arch.cr4_guest_owned_bits &= ~X86_CR4_PDPTR_BITS; in set_cr4_guest_host_mask()
4355 if (is_guest_mode(&vmx->vcpu)) in set_cr4_guest_host_mask()
4356 vcpu->arch.cr4_guest_owned_bits &= in set_cr4_guest_host_mask()
4357 ~get_vmcs12(vcpu)->cr4_guest_host_mask; in set_cr4_guest_host_mask()
4358 vmcs_writel(CR4_GUEST_HOST_MASK, ~vcpu->arch.cr4_guest_owned_bits); in set_cr4_guest_host_mask()
4365 if (!kvm_vcpu_apicv_active(&vmx->vcpu)) in vmx_pin_based_exec_ctrl()
4385 * IA32e mode, and loading of EFER and PERF_GLOBAL_CTRL are toggled dynamically. in vmx_get_initial_vmentry_ctrl()
4418 vmx->nested.update_vmcs01_apicv_status = true; in vmx_refresh_apicv_exec_ctrl()
4452 if (vmx->vcpu.arch.switch_db_regs & KVM_DEBUGREG_WONT_EXIT) in vmx_exec_control()
4455 if (!cpu_need_tpr_shadow(&vmx->vcpu)) in vmx_exec_control()
4471 if (kvm_mwait_in_guest(vmx->vcpu.kvm)) in vmx_exec_control()
4474 if (kvm_hlt_in_guest(vmx->vcpu.kvm)) in vmx_exec_control()
4487 if (!enable_ipiv || !kvm_vcpu_apicv_active(&vmx->vcpu)) in vmx_tertiary_exec_control()
4503 * If the control is for an opt-in feature, clear the control if the in vmx_adjust_secondary_exec_control()
4505 * control is opt-out, i.e. an exiting control, clear the control if in vmx_adjust_secondary_exec_control()
4518 kvm_check_has_quirk(vmx->vcpu.kvm, KVM_X86_QUIRK_STUFF_FEATURE_MSRS)) { in vmx_adjust_secondary_exec_control()
4527 vmx->nested.msrs.secondary_ctls_high |= control; in vmx_adjust_secondary_exec_control()
4529 vmx->nested.msrs.secondary_ctls_high &= ~control; in vmx_adjust_secondary_exec_control()
4540 struct kvm_vcpu *__vcpu = &(vmx)->vcpu; \
4550 /* More macro magic for ENABLE_/opt-in versus _EXITING/opt-out controls. */
4559 struct kvm_vcpu *vcpu = &vmx->vcpu; in vmx_secondary_exec_control()
4567 if (vmx->vpid == 0) in vmx_secondary_exec_control()
4576 if (kvm_pause_in_guest(vmx->vcpu.kvm)) in vmx_secondary_exec_control()
4605 if (!enable_pml || !atomic_read(&vcpu->kvm->nr_memslots_dirty_logging)) in vmx_secondary_exec_control()
4636 if (!vcpu->kvm->arch.bus_lock_detection_enabled) in vmx_secondary_exec_control()
4639 if (!kvm_notify_vmexit_enabled(vcpu->kvm)) in vmx_secondary_exec_control()
4647 return get_order(kvm->arch.max_vcpu_ids * sizeof(*to_kvm_vmx(kvm)->pid_table)); in vmx_get_pid_table_order()
4658 if (kvm_vmx->pid_table) in vmx_alloc_ipiv_pid_table()
4664 return -ENOMEM; in vmx_alloc_ipiv_pid_table()
4666 kvm_vmx->pid_table = (void *)page_address(pages); in vmx_alloc_ipiv_pid_table()
4679 struct kvm *kvm = vmx->vcpu.kvm; in init_vmcs()
4686 vmcs_write64(MSR_BITMAP, __pa(vmx->vmcs01.msr_bitmap)); in init_vmcs()
4697 if (vmx->ve_info) in init_vmcs()
4699 __pa(vmx->ve_info)); in init_vmcs()
4705 if (enable_apicv && lapic_in_kernel(&vmx->vcpu)) { in init_vmcs()
4714 vmcs_write64(POSTED_INTR_DESC_ADDR, __pa((&vmx->vt.pi_desc))); in init_vmcs()
4717 if (vmx_can_use_ipiv(&vmx->vcpu)) { in init_vmcs()
4718 vmcs_write64(PID_POINTER_TABLE, __pa(kvm_vmx->pid_table)); in init_vmcs()
4719 vmcs_write16(LAST_PID_POINTER_INDEX, kvm->arch.max_vcpu_ids - 1); in init_vmcs()
4724 vmx->ple_window = ple_window; in init_vmcs()
4725 vmx->ple_window_dirty = true; in init_vmcs()
4729 vmcs_write32(NOTIFY_WINDOW, kvm->arch.notify_window); in init_vmcs()
4746 vmcs_write64(VM_EXIT_MSR_LOAD_ADDR, __pa(vmx->msr_autoload.host.val)); in init_vmcs()
4748 vmcs_write64(VM_ENTRY_MSR_LOAD_ADDR, __pa(vmx->msr_autoload.guest.val)); in init_vmcs()
4751 vmcs_write64(GUEST_IA32_PAT, vmx->vcpu.arch.pat); in init_vmcs()
4758 vmx->vcpu.arch.cr0_guest_owned_bits = vmx_l1_guest_owned_cr0_bits(); in init_vmcs()
4759 vmcs_writel(CR0_GUEST_HOST_MASK, ~vmx->vcpu.arch.cr0_guest_owned_bits); in init_vmcs()
4763 if (vmx->vpid != 0) in init_vmcs()
4764 vmcs_write16(VIRTUAL_PROCESSOR_ID, vmx->vpid); in init_vmcs()
4770 vmcs_write64(PML_ADDRESS, page_to_phys(vmx->pml_pg)); in init_vmcs()
4774 vmx_write_encls_bitmap(&vmx->vcpu, NULL); in init_vmcs()
4777 memset(&vmx->pt_desc, 0, sizeof(vmx->pt_desc)); in init_vmcs()
4779 vmx->pt_desc.guest.output_mask = 0x7F; in init_vmcs()
4787 vmx_guest_debugctl_write(&vmx->vcpu, 0); in init_vmcs()
4791 if (cpu_need_tpr_shadow(&vmx->vcpu)) in init_vmcs()
4793 __pa(vmx->vcpu.arch.apic->regs)); in init_vmcs()
4807 kvm_check_has_quirk(vcpu->kvm, KVM_X86_QUIRK_STUFF_FEATURE_MSRS)) in __vmx_vcpu_reset()
4808 memcpy(&vmx->nested.msrs, &vmcs_config.nested, sizeof(vmx->nested.msrs)); in __vmx_vcpu_reset()
4812 vmx->nested.posted_intr_nv = -1; in __vmx_vcpu_reset()
4813 vmx->nested.vmxon_ptr = INVALID_GPA; in __vmx_vcpu_reset()
4814 vmx->nested.current_vmptr = INVALID_GPA; in __vmx_vcpu_reset()
4817 vmx->nested.hv_evmcs_vmptr = EVMPTR_INVALID; in __vmx_vcpu_reset()
4820 if (kvm_check_has_quirk(vcpu->kvm, KVM_X86_QUIRK_STUFF_FEATURE_MSRS)) in __vmx_vcpu_reset()
4821 vcpu->arch.microcode_version = 0x100000000ULL; in __vmx_vcpu_reset()
4822 vmx->msr_ia32_feature_control_valid_bits = FEAT_CTL_LOCKED; in __vmx_vcpu_reset()
4825 * Enforce invariant: pi_desc.nv is always either POSTED_INTR_VECTOR in __vmx_vcpu_reset()
4828 vmx->vt.pi_desc.nv = POSTED_INTR_VECTOR; in __vmx_vcpu_reset()
4829 __pi_set_sn(&vmx->vt.pi_desc); in __vmx_vcpu_reset()
4839 vmx->rmode.vm86_active = 0; in vmx_vcpu_reset()
4840 vmx->spec_ctrl = 0; in vmx_vcpu_reset()
4842 vmx->msr_ia32_umwait_control = 0; in vmx_vcpu_reset()
4844 vmx->hv_deadline_tsc = -1; in vmx_vcpu_reset()
4894 vpid_sync_context(vmx->vpid); in vmx_vcpu_reset()
4919 int irq = vcpu->arch.interrupt.nr; in vmx_inject_irq()
4921 trace_kvm_inj_virq(irq, vcpu->arch.interrupt.soft, reinjected); in vmx_inject_irq()
4923 ++vcpu->stat.irq_injections; in vmx_inject_irq()
4924 if (vmx->rmode.vm86_active) { in vmx_inject_irq()
4926 if (vcpu->arch.interrupt.soft) in vmx_inject_irq()
4927 inc_eip = vcpu->arch.event_exit_inst_len; in vmx_inject_irq()
4932 if (vcpu->arch.interrupt.soft) { in vmx_inject_irq()
4935 vmx->vcpu.arch.event_exit_inst_len); in vmx_inject_irq()
4949 * Tracking the NMI-blocked state in software is built upon in vmx_inject_nmi()
4951 * well-behaving guests: They have to keep IRQs disabled at in vmx_inject_nmi()
4956 vmx->loaded_vmcs->soft_vnmi_blocked = 1; in vmx_inject_nmi()
4957 vmx->loaded_vmcs->vnmi_blocked_time = 0; in vmx_inject_nmi()
4960 ++vcpu->stat.nmi_injections; in vmx_inject_nmi()
4961 vmx->loaded_vmcs->nmi_known_unmasked = false; in vmx_inject_nmi()
4963 if (vmx->rmode.vm86_active) { in vmx_inject_nmi()
4980 return vmx->loaded_vmcs->soft_vnmi_blocked; in vmx_get_nmi_mask()
4981 if (vmx->loaded_vmcs->nmi_known_unmasked) in vmx_get_nmi_mask()
4984 vmx->loaded_vmcs->nmi_known_unmasked = !masked; in vmx_get_nmi_mask()
4993 if (vmx->loaded_vmcs->soft_vnmi_blocked != masked) { in vmx_set_nmi_mask()
4994 vmx->loaded_vmcs->soft_vnmi_blocked = masked; in vmx_set_nmi_mask()
4995 vmx->loaded_vmcs->vnmi_blocked_time = 0; in vmx_set_nmi_mask()
4998 vmx->loaded_vmcs->nmi_known_unmasked = !masked; in vmx_set_nmi_mask()
5013 if (!enable_vnmi && to_vmx(vcpu)->loaded_vmcs->soft_vnmi_blocked) in vmx_nmi_blocked()
5023 if (to_vmx(vcpu)->nested.nested_run_pending) in vmx_nmi_allowed()
5024 return -EBUSY; in vmx_nmi_allowed()
5026 /* An NMI must not be injected into L2 if it's supposed to VM-Exit. */ in vmx_nmi_allowed()
5028 return -EBUSY; in vmx_nmi_allowed()
5050 if (to_vmx(vcpu)->nested.nested_run_pending) in vmx_interrupt_allowed()
5051 return -EBUSY; in vmx_interrupt_allowed()
5054 * An IRQ must not be injected into L2 if it's supposed to VM-Exit, in vmx_interrupt_allowed()
5058 return -EBUSY; in vmx_interrupt_allowed()
5070 mutex_lock(&kvm->slots_lock); in vmx_set_tss_addr()
5073 mutex_unlock(&kvm->slots_lock); in vmx_set_tss_addr()
5078 to_kvm_vmx(kvm)->tss_addr = addr; in vmx_set_tss_addr()
5085 to_kvm_vmx(kvm)->ept_identity_map_addr = ident_addr; in vmx_set_identity_map_addr()
5095 * from user space while in guest debugging mode. in rmode_exception()
5097 to_vmx(vcpu)->vcpu.arch.event_exit_inst_len = in rmode_exception()
5099 if (vcpu->guest_debug & KVM_GUESTDBG_USE_SW_BP) in rmode_exception()
5103 return !(vcpu->guest_debug & in rmode_exception()
5123 * Cause the #SS fault with 0 error code in VM86 mode. in handle_rmode_exception()
5127 if (vcpu->arch.halt_request) { in handle_rmode_exception()
5128 vcpu->arch.halt_request = 0; in handle_rmode_exception()
5137 * Forward all other exceptions that are valid in real mode. in handle_rmode_exception()
5138 * FIXME: Breaks guest debugging in real mode, needs to be fixed with in handle_rmode_exception()
5158 * - Guest CPL == 3 (user mode)
5159 * - Guest has #AC detection enabled in CR0
5160 * - Guest EFLAGS has AC bit set
5173 return vcpu->arch.guest_fpu.fpstate->xfd && in is_xfd_nm_fault()
5180 struct kvm_run *kvm_run = vcpu->run; in handle_exception_nmi()
5185 vect_info = vmx->idt_vectoring_info; in handle_exception_nmi()
5190 * vmx_vcpu_run() if a #MC occurs on VM-Entry. NMIs are handled by in handle_exception_nmi()
5204 is_xfd_nm_fault(vcpu) ? vcpu->arch.guest_fpu.xfd_err : 0); in handle_exception_nmi()
5212 struct vmx_ve_information *ve_info = vmx->ve_info; in handle_exception_nmi()
5214 WARN_ONCE(ve_info->exit_reason != EXIT_REASON_EPT_VIOLATION, in handle_exception_nmi()
5215 "Unexpected #VE on VM-Exit reason 0x%x", ve_info->exit_reason); in handle_exception_nmi()
5217 kvm_mmu_print_sptes(vcpu, ve_info->guest_physical_address, "#VE"); in handle_exception_nmi()
5225 if (!vmx->rmode.vm86_active && is_gp_fault(intr_info)) { in handle_exception_nmi()
5230 * IN{S}, OUT{S}, and RDPMC, none of which generate a non-zero in handle_exception_nmi()
5247 vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR; in handle_exception_nmi()
5248 vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_SIMUL_EX; in handle_exception_nmi()
5249 vcpu->run->internal.ndata = 4; in handle_exception_nmi()
5250 vcpu->run->internal.data[0] = vect_info; in handle_exception_nmi()
5251 vcpu->run->internal.data[1] = intr_info; in handle_exception_nmi()
5252 vcpu->run->internal.data[2] = error_code; in handle_exception_nmi()
5253 vcpu->run->internal.data[3] = vcpu->arch.last_vmentry_cpu; in handle_exception_nmi()
5259 if (enable_ept && !vcpu->arch.apf.host_apf_flags) { in handle_exception_nmi()
5273 if (vmx->rmode.vm86_active && rmode_exception(vcpu, ex_no)) in handle_exception_nmi()
5279 if (!(vcpu->guest_debug & in handle_exception_nmi()
5283 * instruction. ICEBP generates a trap-like #DB, but in handle_exception_nmi()
5285 * is an instruction intercept, i.e. the VM-Exit occurs in handle_exception_nmi()
5287 * avoid single-step #DB and MTF updates, as ICEBP is in handle_exception_nmi()
5292 * if single-step is enabled in RFLAGS and STI or MOVSS in handle_exception_nmi()
5294 * on VM-Exit due to #DB interception. VM-Entry has a in handle_exception_nmi()
5295 * consistency check that a single-step #DB is pending in handle_exception_nmi()
5299 * delay when activating single-step breakpoints must in handle_exception_nmi()
5301 * as appropriate for all other VM-Exits types. in handle_exception_nmi()
5314 kvm_run->debug.arch.dr6 = dr6 | DR6_ACTIVE_LOW; in handle_exception_nmi()
5315 kvm_run->debug.arch.dr7 = vmcs_readl(GUEST_DR7); in handle_exception_nmi()
5320 * user space while in guest debugging mode. Reading it for in handle_exception_nmi()
5323 vmx->vcpu.arch.event_exit_inst_len = in handle_exception_nmi()
5325 kvm_run->exit_reason = KVM_EXIT_DEBUG; in handle_exception_nmi()
5326 kvm_run->debug.arch.pc = kvm_get_linear_rip(vcpu); in handle_exception_nmi()
5327 kvm_run->debug.arch.exception = ex_no; in handle_exception_nmi()
5336 * Handle split lock. Depending on detection mode this will in handle_exception_nmi()
5344 kvm_run->exit_reason = KVM_EXIT_EXCEPTION; in handle_exception_nmi()
5345 kvm_run->ex.exception = ex_no; in handle_exception_nmi()
5346 kvm_run->ex.error_code = error_code; in handle_exception_nmi()
5354 ++vcpu->stat.irq_exits; in handle_external_interrupt()
5360 vcpu->run->exit_reason = KVM_EXIT_SHUTDOWN; in handle_triple_fault()
5361 vcpu->mmio_needed = 0; in handle_triple_fault()
5374 ++vcpu->stat.io_exits; in handle_io()
5396 /* called to set cr0 as appropriate for a mov-to-cr0 exit. */
5408 * hardware. It consists of the L2-owned bits from the new in handle_set_cr0()
5409 * value combined with the L1-owned bits from L1's guest_cr0. in handle_set_cr0()
5411 val = (val & ~vmcs12->cr0_guest_host_mask) | in handle_set_cr0()
5412 (vmcs12->guest_cr0 & vmcs12->cr0_guest_host_mask); in handle_set_cr0()
5430 val = (val & ~vmcs12->cr4_guest_host_mask) | in handle_set_cr4()
5431 (vmcs12->guest_cr4 & vmcs12->cr4_guest_host_mask); in handle_set_cr4()
5490 * KVM_GUESTDBG_SINGLESTEP-triggered in handle_cr()
5493 vcpu->run->exit_reason = KVM_EXIT_SET_TPR; in handle_cr()
5499 KVM_BUG(1, vcpu->kvm, "Guest always owns CR0.TS"); in handle_cr()
5500 return -EIO; in handle_cr()
5526 vcpu->run->exit_reason = 0; in handle_cr()
5551 * As the vm-exit takes precedence over the debug trap, we in handle_dr()
5555 if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) { in handle_dr()
5556 vcpu->run->debug.arch.dr6 = DR6_BD | DR6_ACTIVE_LOW; in handle_dr()
5557 vcpu->run->debug.arch.dr7 = dr7; in handle_dr()
5558 vcpu->run->debug.arch.pc = kvm_get_linear_rip(vcpu); in handle_dr()
5559 vcpu->run->debug.arch.exception = DB_VECTOR; in handle_dr()
5560 vcpu->run->exit_reason = KVM_EXIT_DEBUG; in handle_dr()
5568 if (vcpu->guest_debug == 0) { in handle_dr()
5576 vcpu->arch.switch_db_regs |= KVM_DEBUGREG_WONT_EXIT; in handle_dr()
5594 get_debugreg(vcpu->arch.db[0], 0); in vmx_sync_dirty_debug_regs()
5595 get_debugreg(vcpu->arch.db[1], 1); in vmx_sync_dirty_debug_regs()
5596 get_debugreg(vcpu->arch.db[2], 2); in vmx_sync_dirty_debug_regs()
5597 get_debugreg(vcpu->arch.db[3], 3); in vmx_sync_dirty_debug_regs()
5598 get_debugreg(vcpu->arch.dr6, 6); in vmx_sync_dirty_debug_regs()
5599 vcpu->arch.dr7 = vmcs_readl(GUEST_DR7); in vmx_sync_dirty_debug_regs()
5601 vcpu->arch.switch_db_regs &= ~KVM_DEBUGREG_WONT_EXIT; in vmx_sync_dirty_debug_regs()
5628 ++vcpu->stat.irq_window_exits; in handle_interrupt_window()
5650 * not cared. So make a short-circuit here by avoiding in handle_apic_access()
5667 /* EOI-induced VM exit is trap-like and thus no need to adjust IP */ in handle_apic_eoi_induced()
5677 * APIC-write VM-Exit is trap-like, KVM doesn't need to advance RIP and in handle_apic_write()
5680 * the vAPIC page for the correct 16-byte chunk. KVM needs only to in handle_apic_write()
5698 idt_v = (vmx->idt_vectoring_info & VECTORING_INFO_VALID_MASK); in handle_task_switch()
5699 idt_index = (vmx->idt_vectoring_info & VECTORING_INFO_VECTOR_MASK); in handle_task_switch()
5700 type = (vmx->idt_vectoring_info & VECTORING_INFO_TYPE_MASK); in handle_task_switch()
5708 vcpu->arch.nmi_injected = false; in handle_task_switch()
5716 if (vmx->idt_vectoring_info & in handle_task_switch()
5742 type == INTR_TYPE_SOFT_INTR ? idt_index : -1, in handle_task_switch()
5757 if (!(to_vmx(vcpu)->idt_vectoring_info & VECTORING_INFO_VALID_MASK) && in handle_ept_violation()
5770 * would also use advanced VM-exit information for EPT violations to in handle_ept_violation()
5802 if (KVM_BUG_ON(!enable_vnmi, vcpu->kvm)) in handle_nmi_window()
5803 return -EIO; in handle_nmi_window()
5806 ++vcpu->stat.nmi_window_exits; in handle_nmi_window()
5814 * with unsrestricted guest mode disabled) and KVM can't faithfully emulate the
5821 if (!vmx->vt.emulation_required) in vmx_unhandleable_emulation_required()
5826 * nested VM-Enter is pending completion, as VM-Enter will VM-Fail if in vmx_unhandleable_emulation_required()
5828 * should synthesize VM-Fail instead emulation L2 code. This path is in vmx_unhandleable_emulation_required()
5830 * performed the nested VM-Enter consistency checks. in vmx_unhandleable_emulation_required()
5832 if (vmx->nested.nested_run_pending) in vmx_unhandleable_emulation_required()
5836 * KVM only supports emulating exceptions if the vCPU is in Real Mode. in vmx_unhandleable_emulation_required()
5837 * If emulation is required, KVM can't perform a successful VM-Enter to in vmx_unhandleable_emulation_required()
5840 return !vmx->rmode.vm86_active && in vmx_unhandleable_emulation_required()
5841 (kvm_is_exception_pending(vcpu) || vcpu->arch.exception.injected); in vmx_unhandleable_emulation_required()
5853 while (vmx->vt.emulation_required && count-- != 0) { in handle_invalid_guest_state()
5855 return handle_interrupt_window(&vmx->vcpu); in handle_invalid_guest_state()
5861 * Ensure that any updates to kvm->buses[] observed by the in handle_invalid_guest_state()
5875 if (vcpu->arch.halt_request) { in handle_invalid_guest_state()
5876 vcpu->arch.halt_request = 0; in handle_invalid_guest_state()
5903 * Indicate a busy-waiting vcpu in spinlock. We do not enable the PAUSE
5904 * exiting, so only get here on cpu with PAUSE-Loop-Exiting.
5908 if (!kvm_pause_in_guest(vcpu->kvm)) in handle_pause()
5912 * Intel sdm vol3 ch-25.1.3 says: The "PAUSE-loop exiting" in handle_pause()
5913 * VM-execution control is ignored if CPL > 0. OTOH, KVM in handle_pause()
5961 trace_kvm_pml_full(vcpu->vcpu_id); in handle_pml_full()
5969 if (!(to_vmx(vcpu)->idt_vectoring_info & VECTORING_INFO_VALID_MASK) && in handle_pml_full()
5988 * In the *extremely* unlikely scenario that this is a spurious VM-Exit in handle_fastpath_preemption_timer()
5990 * exit and re-enter the guest. in handle_fastpath_preemption_timer()
5992 if (unlikely(vmx->loaded_vmcs->hv_timer_soft_disabled)) in handle_fastpath_preemption_timer()
6004 * expiration likely requires synthesizing a nested VM-Exit. in handle_fastpath_preemption_timer()
6016 * This non-fastpath handler is reached if and only if the preemption in handle_preemption_timer()
6052 * VM-Exits. Unconditionally set the flag here and leave the handling to in handle_bus_lock_vmexit()
6055 to_vt(vcpu)->exit_reason.bus_lock_detected = true; in handle_bus_lock_vmexit()
6064 ++vcpu->stat.notify_window_exits; in handle_notify()
6074 if (vcpu->kvm->arch.notify_vmexit_flags & KVM_X86_NOTIFY_VMEXIT_USER || in handle_notify()
6076 vcpu->run->exit_reason = KVM_EXIT_NOTIFY; in handle_notify()
6077 vcpu->run->notify.flags = context_invalid ? in handle_notify()
6172 *reason = vmx->vt.exit_reason.full; in vmx_get_exit_info()
6174 if (!(vmx->vt.exit_reason.failed_vmentry)) { in vmx_get_exit_info()
6175 *info2 = vmx->idt_vectoring_info; in vmx_get_exit_info()
6199 if (vmx->pml_pg) { in vmx_destroy_pml_buffer()
6200 __free_page(vmx->pml_pg); in vmx_destroy_pml_buffer()
6201 vmx->pml_pg = NULL; in vmx_destroy_pml_buffer()
6230 pml_buf = page_address(vmx->pml_pg); in vmx_flush_pml_buffer()
6232 for (i = PML_HEAD_INDEX; i >= pml_tail_index; i--) { in vmx_flush_pml_buffer()
6236 WARN_ON(gpa & (PAGE_SIZE - 1)); in vmx_flush_pml_buffer()
6248 vmcs_read32(sel + GUEST_ES_AR_BYTES - GUEST_ES_SELECTOR), in vmx_dump_sel()
6249 vmcs_read32(sel + GUEST_ES_LIMIT - GUEST_ES_SELECTOR), in vmx_dump_sel()
6250 vmcs_readl(sel + GUEST_ES_BASE - GUEST_ES_SELECTOR)); in vmx_dump_sel()
6257 vmcs_readl(limit + GUEST_GDTR_BASE - GUEST_GDTR_LIMIT)); in vmx_dump_dtsel()
6266 for (i = 0, e = m->val; i < m->nr; ++i, ++e) in vmx_dump_msrs()
6267 pr_err(" %2d: msr=0x%08x value=0x%016llx\n", i, e->index, e->value); in vmx_dump_msrs()
6300 pr_err("VMCS %p, last attempted VM-entry on CPU %d\n", in dump_vmcs()
6301 vmx->loaded_vmcs->vmcs, vcpu->arch.last_vmentry_cpu); in dump_vmcs()
6332 efer_slot = vmx_find_loadstore_msr_slot(&vmx->msr_autoload.guest, MSR_EFER); in dump_vmcs()
6337 vmx->msr_autoload.guest.val[efer_slot].value); in dump_vmcs()
6340 vcpu->arch.efer | (EFER_LMA | EFER_LME)); in dump_vmcs()
6343 vcpu->arch.efer & ~(EFER_LMA | EFER_LME)); in dump_vmcs()
6362 vmx_dump_msrs("guest autoload", &vmx->msr_autoload.guest); in dump_vmcs()
6364 vmx_dump_msrs("guest autostore", &vmx->msr_autostore.guest); in dump_vmcs()
6399 vmx_dump_msrs("host autoload", &vmx->msr_autoload.host); in dump_vmcs()
6438 pr_err("APIC-access addr = 0x%016llx ", vmcs_read64(APIC_ACCESS_ADDR)); in dump_vmcs()
6439 pr_cont("virt-APIC addr = 0x%016llx\n", vmcs_read64(VIRTUAL_APIC_PAGE_ADDR)); in dump_vmcs()
6452 struct vmx_ve_information *ve_info = vmx->ve_info; in dump_vmcs()
6464 ve_info->exit_reason, ve_info->delivery, in dump_vmcs()
6465 ve_info->exit_qualification, in dump_vmcs()
6466 ve_info->guest_linear_address, in dump_vmcs()
6467 ve_info->guest_physical_address, ve_info->eptp_index); in dump_vmcs()
6479 u32 vectoring_info = vmx->idt_vectoring_info; in __vmx_handle_exit()
6486 * mode as if vcpus is in root mode, the PML buffer must has been in __vmx_handle_exit()
6494 * KVM should never reach this point with a pending nested VM-Enter. in __vmx_handle_exit()
6495 * More specifically, short-circuiting VM-Entry to emulate L2 due to in __vmx_handle_exit()
6497 * allowed a nested VM-Enter with an invalid vmcs12. More below. in __vmx_handle_exit()
6499 if (KVM_BUG_ON(vmx->nested.nested_run_pending, vcpu->kvm)) in __vmx_handle_exit()
6500 return -EIO; in __vmx_handle_exit()
6515 * address-translation-based dirty tracking (e.g. EPT write in __vmx_handle_exit()
6525 * operation, nested VM-Enter rejects any attempt to enter L2 in __vmx_handle_exit()
6534 if (vmx->vt.emulation_required) { in __vmx_handle_exit()
6544 if (vmx->vt.emulation_required) in __vmx_handle_exit()
6549 vcpu->run->exit_reason = KVM_EXIT_FAIL_ENTRY; in __vmx_handle_exit()
6550 vcpu->run->fail_entry.hardware_entry_failure_reason in __vmx_handle_exit()
6552 vcpu->run->fail_entry.cpu = vcpu->arch.last_vmentry_cpu; in __vmx_handle_exit()
6556 if (unlikely(vmx->fail)) { in __vmx_handle_exit()
6558 vcpu->run->exit_reason = KVM_EXIT_FAIL_ENTRY; in __vmx_handle_exit()
6559 vcpu->run->fail_entry.hardware_entry_failure_reason in __vmx_handle_exit()
6561 vcpu->run->fail_entry.cpu = vcpu->arch.last_vmentry_cpu; in __vmx_handle_exit()
6578 vmx->loaded_vmcs->soft_vnmi_blocked)) { in __vmx_handle_exit()
6580 vmx->loaded_vmcs->soft_vnmi_blocked = 0; in __vmx_handle_exit()
6581 } else if (vmx->loaded_vmcs->vnmi_blocked_time > 1000000000LL && in __vmx_handle_exit()
6582 vcpu->arch.nmi_pending) { in __vmx_handle_exit()
6585 * NMI-blocked window if the guest runs with IRQs in __vmx_handle_exit()
6589 printk(KERN_WARNING "%s: Breaking out of NMI-blocked " in __vmx_handle_exit()
6591 __func__, vcpu->vcpu_id); in __vmx_handle_exit()
6592 vmx->loaded_vmcs->soft_vnmi_blocked = 0; in __vmx_handle_exit()
6629 vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR; in __vmx_handle_exit()
6630 vcpu->run->internal.suberror = in __vmx_handle_exit()
6632 vcpu->run->internal.ndata = 2; in __vmx_handle_exit()
6633 vcpu->run->internal.data[0] = exit_reason.full; in __vmx_handle_exit()
6634 vcpu->run->internal.data[1] = vcpu->arch.last_vmentry_cpu; in __vmx_handle_exit()
6648 vcpu->run->exit_reason = KVM_EXIT_X86_BUS_LOCK; in vmx_handle_exit()
6650 vcpu->run->flags |= KVM_RUN_X86_BUS_LOCK; in vmx_handle_exit()
6671 * This code is only executed when the flush mode is 'cond' or in vmx_l1d_flush()
6678 * Clear the per-vcpu flush bit, it gets set again if the vCPU in vmx_l1d_flush()
6683 flush_l1d = vcpu->arch.l1tf_flush_l1d; in vmx_l1d_flush()
6684 vcpu->arch.l1tf_flush_l1d = false; in vmx_l1d_flush()
6687 * Clear the per-cpu flush bit, it gets set again from in vmx_l1d_flush()
6697 vcpu->stat.l1d_flush++; in vmx_l1d_flush()
6736 tpr_threshold = (irr == -1 || tpr < irr) ? 0 : irr; in vmx_update_cr8_intercept()
6738 to_vmx(vcpu)->nested.l1_tpr_threshold = tpr_threshold; in vmx_update_cr8_intercept()
6757 vmx->nested.change_vmcs01_virtual_apic_mode = true; in vmx_set_virtual_apic_mode()
6780 * the guest may have inserted a non-APIC mapping into in vmx_set_virtual_apic_mode()
6800 struct kvm *kvm = vcpu->kvm; in vmx_set_apic_access_page_addr()
6810 to_vmx(vcpu)->nested.reload_vmcs01_apic_access_page = true; in vmx_set_apic_access_page_addr()
6825 if (!slot || slot->flags & KVM_MEMSLOT_INVALID) in vmx_set_apic_access_page_addr()
6834 mmu_seq = kvm->mmu_invalidate_seq; in vmx_set_apic_access_page_addr()
6839 * controls the APIC-access page memslot, and only deletes the memslot in vmx_set_apic_access_page_addr()
6846 read_lock(&vcpu->kvm->mmu_lock); in vmx_set_apic_access_page_addr()
6865 read_unlock(&vcpu->kvm->mmu_lock); in vmx_set_apic_access_page_addr()
6878 * VM-Exit, otherwise L1 with run with a stale SVI. in vmx_hwapic_isr_update()
6888 WARN_ON_ONCE(vcpu->wants_to_run && in vmx_hwapic_isr_update()
6890 to_vmx(vcpu)->nested.update_vmcs01_hwapic_isr = true; in vmx_hwapic_isr_update()
6894 if (max_isr == -1) in vmx_hwapic_isr_update()
6911 if (vector == -1) in vmx_set_rvi()
6929 if (KVM_BUG_ON(!enable_apicv, vcpu->kvm)) in vmx_sync_pir_to_irr()
6930 return -EIO; in vmx_sync_pir_to_irr()
6932 if (pi_test_on(&vt->pi_desc)) { in vmx_sync_pir_to_irr()
6933 pi_clear_on(&vt->pi_desc); in vmx_sync_pir_to_irr()
6940 kvm_apic_update_irr(vcpu, vt->pi_desc.pir, &max_irr); in vmx_sync_pir_to_irr()
6953 * VM-Exit to L1. If L1 doesn't want to exit, the interrupt is injected in vmx_sync_pir_to_irr()
6959 * a VM-Exit and the subsequent entry will call sync_pir_to_irr. in vmx_sync_pir_to_irr()
6992 * XFD_ERR is not modified for non-XFD #NM, i.e. if CR0.TS=1. in handle_nm_fault_irqoff()
6999 rdmsrq(MSR_IA32_XFD_ERR, vcpu->arch.guest_fpu.xfd_err); in handle_nm_fault_irqoff()
7006 vcpu->arch.apf.host_apf_flags = kvm_read_and_reset_apf_flags(); in handle_exception_irqoff()
7020 if (KVM_BUG(!is_external_intr(intr_info), vcpu->kvm, in handle_external_interrupt_irqoff()
7021 "unexpected VM-Exit interrupt info: 0x%x", intr_info)) in handle_external_interrupt_irqoff()
7028 * CALL in the non-FRED path. in handle_external_interrupt_irqoff()
7037 vcpu->arch.at_instruction_boundary = true; in handle_external_interrupt_irqoff()
7042 if (to_vt(vcpu)->emulation_required) in vmx_handle_exit_irqoff()
7063 * real mode. in vmx_has_emulated_msr()
7084 idtv_info_valid = vmx->idt_vectoring_info & VECTORING_INFO_VALID_MASK; in vmx_recover_nmi_blocking()
7087 if (vmx->loaded_vmcs->nmi_known_unmasked) in vmx_recover_nmi_blocking()
7090 exit_intr_info = vmx_get_intr_info(&vmx->vcpu); in vmx_recover_nmi_blocking()
7095 * Re-set bit "block by NMI" before VM entry if vmexit caused by in vmx_recover_nmi_blocking()
7099 * If the VM exit sets the valid bit in the IDT-vectoring in vmx_recover_nmi_blocking()
7108 vmx->loaded_vmcs->nmi_known_unmasked = in vmx_recover_nmi_blocking()
7111 } else if (unlikely(vmx->loaded_vmcs->soft_vnmi_blocked)) in vmx_recover_nmi_blocking()
7112 vmx->loaded_vmcs->vnmi_blocked_time += in vmx_recover_nmi_blocking()
7114 vmx->loaded_vmcs->entry_time)); in vmx_recover_nmi_blocking()
7128 vcpu->arch.nmi_injected = false; in __vmx_complete_interrupts()
7142 vcpu->arch.nmi_injected = true; in __vmx_complete_interrupts()
7151 vcpu->arch.event_exit_inst_len = vmcs_read32(instr_len_field); in __vmx_complete_interrupts()
7165 vcpu->arch.event_exit_inst_len = vmcs_read32(instr_len_field); in __vmx_complete_interrupts()
7177 __vmx_complete_interrupts(&vmx->vcpu, vmx->idt_vectoring_info, in vmx_complete_interrupts()
7196 struct kvm_pmu *pmu = vcpu_to_pmu(&vmx->vcpu); in atomic_switch_perf_msrs()
7198 pmu->host_cross_mapped_mask = 0; in atomic_switch_perf_msrs()
7199 if (pmu->pebs_enable & pmu->global_ctrl) in atomic_switch_perf_msrs()
7223 vmx->loaded_vmcs->hv_timer_soft_disabled = false; in vmx_update_hv_timer()
7224 } else if (vmx->hv_deadline_tsc != -1) { in vmx_update_hv_timer()
7226 if (vmx->hv_deadline_tsc > tscl) in vmx_update_hv_timer()
7227 /* set_hv_timer ensures the delta fits in 32-bits */ in vmx_update_hv_timer()
7228 delta_tsc = (u32)((vmx->hv_deadline_tsc - tscl) >> in vmx_update_hv_timer()
7234 vmx->loaded_vmcs->hv_timer_soft_disabled = false; in vmx_update_hv_timer()
7235 } else if (!vmx->loaded_vmcs->hv_timer_soft_disabled) { in vmx_update_hv_timer()
7236 vmcs_write32(VMX_PREEMPTION_TIMER_VALUE, -1); in vmx_update_hv_timer()
7237 vmx->loaded_vmcs->hv_timer_soft_disabled = true; in vmx_update_hv_timer()
7243 if (unlikely(host_rsp != vmx->loaded_vmcs->host_state.rsp)) { in vmx_update_host_rsp()
7244 vmx->loaded_vmcs->host_state.rsp = host_rsp; in vmx_update_host_rsp()
7258 vmx->spec_ctrl = native_rdmsrq(MSR_IA32_SPEC_CTRL); in vmx_spec_ctrl_restore_host()
7264 * transitioning from a less privileged predictor mode, regardless of in vmx_spec_ctrl_restore_host()
7268 vmx->spec_ctrl != hostval) in vmx_spec_ctrl_restore_host()
7341 if (vcpu->arch.cr2 != native_read_cr2()) in vmx_vcpu_enter_exit()
7342 native_write_cr2(vcpu->arch.cr2); in vmx_vcpu_enter_exit()
7344 vmx->fail = __vmx_vcpu_run(vmx, (unsigned long *)&vcpu->arch.regs, in vmx_vcpu_enter_exit()
7347 vcpu->arch.cr2 = native_read_cr2(); in vmx_vcpu_enter_exit()
7348 vcpu->arch.regs_avail &= ~VMX_REGS_LAZY_LOAD_SET; in vmx_vcpu_enter_exit()
7350 vmx->idt_vectoring_info = 0; in vmx_vcpu_enter_exit()
7354 if (unlikely(vmx->fail)) { in vmx_vcpu_enter_exit()
7355 vmx->vt.exit_reason.full = 0xdead; in vmx_vcpu_enter_exit()
7359 vmx->vt.exit_reason.full = vmcs_read32(VM_EXIT_REASON); in vmx_vcpu_enter_exit()
7361 vmx->idt_vectoring_info = vmcs_read32(IDT_VECTORING_INFO_FIELD); in vmx_vcpu_enter_exit()
7377 vmx->loaded_vmcs->soft_vnmi_blocked)) in vmx_vcpu_run()
7378 vmx->loaded_vmcs->entry_time = ktime_get(); in vmx_vcpu_run()
7383 * consistency check VM-Exit due to invalid guest state and bail. in vmx_vcpu_run()
7385 if (unlikely(vmx->vt.emulation_required)) { in vmx_vcpu_run()
7386 vmx->fail = 0; in vmx_vcpu_run()
7388 vmx->vt.exit_reason.full = EXIT_REASON_INVALID_STATE; in vmx_vcpu_run()
7389 vmx->vt.exit_reason.failed_vmentry = 1; in vmx_vcpu_run()
7391 vmx->vt.exit_qualification = ENTRY_FAIL_DEFAULT; in vmx_vcpu_run()
7393 vmx->vt.exit_intr_info = 0; in vmx_vcpu_run()
7399 if (vmx->ple_window_dirty) { in vmx_vcpu_run()
7400 vmx->ple_window_dirty = false; in vmx_vcpu_run()
7401 vmcs_write32(PLE_WINDOW, vmx->ple_window); in vmx_vcpu_run()
7408 WARN_ON_ONCE(vmx->nested.need_vmcs12_to_shadow_sync); in vmx_vcpu_run()
7411 vmcs_writel(GUEST_RSP, vcpu->arch.regs[VCPU_REGS_RSP]); in vmx_vcpu_run()
7413 vmcs_writel(GUEST_RIP, vcpu->arch.regs[VCPU_REGS_RIP]); in vmx_vcpu_run()
7414 vcpu->arch.regs_dirty = 0; in vmx_vcpu_run()
7417 set_debugreg(vcpu->arch.dr6, 6); in vmx_vcpu_run()
7424 * prior to VM-Enter, as the kernel may load a new ASID (PCID) any time in vmx_vcpu_run()
7425 * it switches back to the current->mm, which can occur in KVM context in vmx_vcpu_run()
7427 * toggles a static key while handling a VM-Exit. in vmx_vcpu_run()
7430 if (unlikely(cr3 != vmx->loaded_vmcs->host_state.cr3)) { in vmx_vcpu_run()
7432 vmx->loaded_vmcs->host_state.cr3 = cr3; in vmx_vcpu_run()
7436 if (unlikely(cr4 != vmx->loaded_vmcs->host_state.cr4)) { in vmx_vcpu_run()
7438 vmx->loaded_vmcs->host_state.cr4 = cr4; in vmx_vcpu_run()
7441 /* When single-stepping over STI and MOV SS, we must clear the in vmx_vcpu_run()
7446 if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP) in vmx_vcpu_run()
7460 smp_send_reschedule(vcpu->cpu); in vmx_vcpu_run()
7469 current_evmcs->hv_clean_fields |= in vmx_vcpu_run()
7472 current_evmcs->hv_vp_id = kvm_hv_get_vpindex(vcpu); in vmx_vcpu_run()
7476 if (vcpu->arch.host_debugctl) in vmx_vcpu_run()
7477 update_debugctlmsr(vcpu->arch.host_debugctl); in vmx_vcpu_run()
7501 if (vmx->nested.nested_run_pending && in vmx_vcpu_run()
7503 ++vcpu->stat.nested_run; in vmx_vcpu_run()
7505 vmx->nested.nested_run_pending = 0; in vmx_vcpu_run()
7508 if (unlikely(vmx->fail)) in vmx_vcpu_run()
7519 vmx->loaded_vmcs->launched = 1; in vmx_vcpu_run()
7533 free_vpid(vmx->vpid); in vmx_vcpu_free()
7535 free_loaded_vmcs(vmx->loaded_vmcs); in vmx_vcpu_free()
7536 free_page((unsigned long)vmx->ve_info); in vmx_vcpu_free()
7548 INIT_LIST_HEAD(&vmx->vt.pi_wakeup_list); in vmx_vcpu_create()
7550 err = -ENOMEM; in vmx_vcpu_create()
7552 vmx->vpid = allocate_vpid(); in vmx_vcpu_create()
7561 vmx->pml_pg = alloc_page(GFP_KERNEL_ACCOUNT | __GFP_ZERO); in vmx_vcpu_create()
7562 if (!vmx->pml_pg) in vmx_vcpu_create()
7567 vmx->guest_uret_msrs[i].mask = -1ull; in vmx_vcpu_create()
7576 tsx_ctrl->mask = ~(u64)TSX_CTRL_CPUID_CLEAR; in vmx_vcpu_create()
7579 err = alloc_loaded_vmcs(&vmx->vmcs01); in vmx_vcpu_create()
7584 * Use Hyper-V 'Enlightened MSR Bitmap' feature when KVM runs as a in vmx_vcpu_create()
7585 * nested (L1) hypervisor and Hyper-V in L0 supports it. Enable the in vmx_vcpu_create()
7591 struct hv_enlightened_vmcs *evmcs = (void *)vmx->vmcs01.vmcs; in vmx_vcpu_create()
7593 evmcs->hv_enlightenments_control.msr_bitmap = 1; in vmx_vcpu_create()
7596 vmx->loaded_vmcs = &vmx->vmcs01; in vmx_vcpu_create()
7599 err = kvm_alloc_apic_access_page(vcpu->kvm); in vmx_vcpu_create()
7605 err = init_rmode_identity_map(vcpu->kvm); in vmx_vcpu_create()
7610 err = -ENOMEM; in vmx_vcpu_create()
7614 BUILD_BUG_ON(sizeof(*vmx->ve_info) > PAGE_SIZE); in vmx_vcpu_create()
7621 vmx->ve_info = page_to_virt(page); in vmx_vcpu_create()
7625 WRITE_ONCE(to_kvm_vmx(vcpu->kvm)->pid_table[vcpu->vcpu_id], in vmx_vcpu_create()
7626 __pa(&vmx->vt.pi_desc) | PID_TABLE_ENTRY_VALID); in vmx_vcpu_create()
7631 free_loaded_vmcs(vmx->loaded_vmcs); in vmx_vcpu_create()
7635 free_vpid(vmx->vpid); in vmx_vcpu_create()
7639 …nt and SMT on, data leak possible. See CVE-2018-3646 and https://www.kernel.org/doc/html/latest/ad…
7640 …tion disabled, data leak possible. See CVE-2018-3646 and https://www.kernel.org/doc/html/latest/ad…
7673 kvm->arch.cpu_dirty_log_size = PML_LOG_NR_ENTRIES; in vmx_vm_init()
7680 * Non-coherent DMA devices need the guest to flush CPU properly. in vmx_ignore_guest_pat()
7698 if (vmx_ignore_guest_pat(vcpu->kvm)) in vmx_get_mt_mask()
7725 * (indicating "allowed-1") if they are supported in the guest's CPUID.
7732 vmx->nested.msrs.cr0_fixed1 = 0xffffffff; in nested_vmx_cr_fixed1_bits_update()
7733 vmx->nested.msrs.cr4_fixed1 = X86_CR4_PCE; in nested_vmx_cr_fixed1_bits_update()
7736 if (entry && (entry->_reg & (_cpuid_mask))) \ in nested_vmx_cr_fixed1_bits_update()
7737 vmx->nested.msrs.cr4_fixed1 |= (_cr4_mask); \ in nested_vmx_cr_fixed1_bits_update()
7782 vmx->pt_desc.caps[CPUID_EAX + i*PT_CPUID_REGS_NUM] = best->eax; in update_intel_pt_cfg()
7783 vmx->pt_desc.caps[CPUID_EBX + i*PT_CPUID_REGS_NUM] = best->ebx; in update_intel_pt_cfg()
7784 vmx->pt_desc.caps[CPUID_ECX + i*PT_CPUID_REGS_NUM] = best->ecx; in update_intel_pt_cfg()
7785 vmx->pt_desc.caps[CPUID_EDX + i*PT_CPUID_REGS_NUM] = best->edx; in update_intel_pt_cfg()
7789 vmx->pt_desc.num_address_ranges = intel_pt_validate_cap(vmx->pt_desc.caps, in update_intel_pt_cfg()
7793 vmx->pt_desc.ctl_bitmask = ~(RTIT_CTL_TRACEEN | RTIT_CTL_OS | in update_intel_pt_cfg()
7801 if (intel_pt_validate_cap(vmx->pt_desc.caps, PT_CAP_cr3_filtering)) in update_intel_pt_cfg()
7802 vmx->pt_desc.ctl_bitmask &= ~RTIT_CTL_CR3EN; in update_intel_pt_cfg()
7808 if (intel_pt_validate_cap(vmx->pt_desc.caps, PT_CAP_psb_cyc)) in update_intel_pt_cfg()
7809 vmx->pt_desc.ctl_bitmask &= ~(RTIT_CTL_CYCLEACC | in update_intel_pt_cfg()
7815 if (intel_pt_validate_cap(vmx->pt_desc.caps, PT_CAP_mtc)) in update_intel_pt_cfg()
7816 vmx->pt_desc.ctl_bitmask &= ~(RTIT_CTL_MTC_EN | in update_intel_pt_cfg()
7820 if (intel_pt_validate_cap(vmx->pt_desc.caps, PT_CAP_ptwrite)) in update_intel_pt_cfg()
7821 vmx->pt_desc.ctl_bitmask &= ~(RTIT_CTL_FUP_ON_PTW | in update_intel_pt_cfg()
7825 if (intel_pt_validate_cap(vmx->pt_desc.caps, PT_CAP_power_event_trace)) in update_intel_pt_cfg()
7826 vmx->pt_desc.ctl_bitmask &= ~RTIT_CTL_PWR_EVT_EN; in update_intel_pt_cfg()
7829 if (intel_pt_validate_cap(vmx->pt_desc.caps, PT_CAP_topa_output)) in update_intel_pt_cfg()
7830 vmx->pt_desc.ctl_bitmask &= ~RTIT_CTL_TOPA; in update_intel_pt_cfg()
7833 if (intel_pt_validate_cap(vmx->pt_desc.caps, PT_CAP_output_subsys)) in update_intel_pt_cfg()
7834 vmx->pt_desc.ctl_bitmask &= ~RTIT_CTL_FABRIC_EN; in update_intel_pt_cfg()
7837 for (i = 0; i < vmx->pt_desc.num_address_ranges; i++) in update_intel_pt_cfg()
7838 vmx->pt_desc.ctl_bitmask &= ~(0xfULL << (32 + i * 4)); in update_intel_pt_cfg()
7860 vmx->msr_ia32_feature_control_valid_bits |= in vmx_vcpu_after_set_cpuid()
7864 vmx->msr_ia32_feature_control_valid_bits &= in vmx_vcpu_after_set_cpuid()
7888 vmx->msr_ia32_feature_control_valid_bits |= FEAT_CTL_SGX_ENABLED; in vmx_vcpu_after_set_cpuid()
7890 vmx->msr_ia32_feature_control_valid_bits &= ~FEAT_CTL_SGX_ENABLED; in vmx_vcpu_after_set_cpuid()
7893 vmx->msr_ia32_feature_control_valid_bits |= in vmx_vcpu_after_set_cpuid()
7896 vmx->msr_ia32_feature_control_valid_bits &= in vmx_vcpu_after_set_cpuid()
7944 * 3. Ensure LBR MSRs cannot hold host data on VM-Entry with in vmx_get_perf_capabilities()
8007 * enforce CET HW behaviors in emulator. On platforms with in vmx_set_cpu_caps()
8028 * If the 'use IO bitmaps' VM-execution control is 0, IO instruction in vmx_is_io_intercepted()
8029 * VM-exits depend on the 'unconditional IO exiting' VM-execution in vmx_is_io_intercepted()
8032 * Otherwise, IO instruction VM-exits are controlled by the IO bitmaps. in vmx_is_io_intercepted()
8037 if (info->intercept == x86_intercept_in || in vmx_is_io_intercepted()
8038 info->intercept == x86_intercept_ins) { in vmx_is_io_intercepted()
8039 port = info->src_val; in vmx_is_io_intercepted()
8040 size = info->dst_bytes; in vmx_is_io_intercepted()
8041 imm = info->src_type == OP_IMM; in vmx_is_io_intercepted()
8043 port = info->dst_val; in vmx_is_io_intercepted()
8044 size = info->src_bytes; in vmx_is_io_intercepted()
8045 imm = info->dst_type == OP_IMM; in vmx_is_io_intercepted()
8049 *exit_qualification = ((unsigned long)port << 16) | (size - 1); in vmx_is_io_intercepted()
8051 if (info->intercept == x86_intercept_ins || in vmx_is_io_intercepted()
8052 info->intercept == x86_intercept_outs) in vmx_is_io_intercepted()
8055 if (info->rep_prefix) in vmx_is_io_intercepted()
8074 switch (info->intercept) { in vmx_check_intercept()
8083 exception->vector = UD_VECTOR; in vmx_check_intercept()
8084 exception->error_code_valid = false; in vmx_check_intercept()
8110 if (info->intercept == x86_intercept_lldt || in vmx_check_intercept()
8111 info->intercept == x86_intercept_ltr || in vmx_check_intercept()
8112 info->intercept == x86_intercept_sldt || in vmx_check_intercept()
8113 info->intercept == x86_intercept_str) in vmx_check_intercept()
8132 * PAUSE is a single-byte NOP with a REPE prefix, i.e. collides in vmx_check_intercept()
8135 * PAUSE-loop-exiting, software can't expect a given PAUSE to in vmx_check_intercept()
8139 if ((info->rep_prefix != REPE_PREFIX) || in vmx_check_intercept()
8151 exit_insn_len = abs_diff((s64)info->next_rip, (s64)info->rip); in vmx_check_intercept()
8165 u64 low = a << shift, high = a >> (64 - shift); in u64_shl_div_u64()
8184 struct kvm_timer *ktimer = &vcpu->arch.apic->lapic_timer; in vmx_set_hv_timer()
8189 delta_tsc = max(guest_deadline_tsc, guest_tscl) - guest_tscl; in vmx_set_hv_timer()
8191 ktimer->timer_advance_ns); in vmx_set_hv_timer()
8194 delta_tsc -= lapic_timer_advance_cycles; in vmx_set_hv_timer()
8199 if (vcpu->arch.l1_tsc_scaling_ratio != kvm_caps.default_tsc_scaling_ratio && in vmx_set_hv_timer()
8202 vcpu->arch.l1_tsc_scaling_ratio, &delta_tsc)) in vmx_set_hv_timer()
8203 return -ERANGE; in vmx_set_hv_timer()
8212 return -ERANGE; in vmx_set_hv_timer()
8214 vmx->hv_deadline_tsc = tscl + delta_tsc; in vmx_set_hv_timer()
8221 to_vmx(vcpu)->hv_deadline_tsc = -1; in vmx_cancel_hv_timer()
8233 vmx->nested.update_vmcs01_cpu_dirty_logging = true; in vmx_update_cpu_dirty_logging()
8242 if (atomic_read(&vcpu->kvm->nr_memslots_dirty_logging)) in vmx_update_cpu_dirty_logging()
8250 if (vcpu->arch.mcg_cap & MCG_LMCE_P) in vmx_setup_mce()
8251 to_vmx(vcpu)->msr_ia32_feature_control_valid_bits |= in vmx_setup_mce()
8254 to_vmx(vcpu)->msr_ia32_feature_control_valid_bits &= in vmx_setup_mce()
8262 if (to_vmx(vcpu)->nested.nested_run_pending) in vmx_smi_allowed()
8263 return -EBUSY; in vmx_smi_allowed()
8273 * SMI and RSM. Using the common VM-Exit + VM-Enter routines is wrong in vmx_enter_smm()
8275 * E.g. most MSRs are left untouched, but many are modified by VM-Exit in vmx_enter_smm()
8276 * and VM-Enter, and thus L2's values may be corrupted on SMI+RSM. in vmx_enter_smm()
8278 vmx->nested.smm.guest_mode = is_guest_mode(vcpu); in vmx_enter_smm()
8279 if (vmx->nested.smm.guest_mode) in vmx_enter_smm()
8280 nested_vmx_vmexit(vcpu, -1, 0, 0); in vmx_enter_smm()
8282 vmx->nested.smm.vmxon = vmx->nested.vmxon; in vmx_enter_smm()
8283 vmx->nested.vmxon = false; in vmx_enter_smm()
8293 if (vmx->nested.smm.vmxon) { in vmx_leave_smm()
8294 vmx->nested.vmxon = true; in vmx_leave_smm()
8295 vmx->nested.smm.vmxon = false; in vmx_leave_smm()
8298 if (vmx->nested.smm.guest_mode) { in vmx_leave_smm()
8303 vmx->nested.nested_run_pending = 1; in vmx_leave_smm()
8304 vmx->nested.smm.guest_mode = false; in vmx_leave_smm()
8317 return to_vmx(vcpu)->nested.vmxon && !is_guest_mode(vcpu); in vmx_apic_init_signal_blocked()
8323 struct hrtimer *timer = &to_vmx(vcpu)->nested.preemption_timer; in vmx_migrate_timers()
8344 free_pages((unsigned long)kvm_vmx->pid_table, vmx_get_pid_table_order(kvm)); in vmx_vm_destroy()
8384 * Untag the address by sign-extending the lam_bit, but NOT to bit 63. in vmx_get_untagged_addr()
8401 (unsigned long *)&vcpu->arch.pmu.global_status); in vmx_handle_intel_pt_intr()
8409 * Though SYSCALL is only supported in 64-bit mode on Intel CPUs, kvm in vmx_setup_user_return_msrs()
8410 * will emulate SYSCALL in legacy mode if the vendor string in guest in vmx_setup_user_return_msrs()
8436 * On pre-MKTME system, boot_cpu_data.x86_phys_bits equals to in vmx_setup_me_spte_mask()
8444 kvm_host.maxphyaddr - 1); in vmx_setup_me_spte_mask()
8491 return -EOPNOTSUPP; in vmx_hardware_setup()
8581 * and EPT A/D bit features are enabled -- PML depends on them to work. in vmx_hardware_setup()
8617 return -EINVAL; in vmx_hardware_setup()
8649 * On Intel CPUs that lack self-snoop feature, letting the guest control in vmx_hardware_setup()
8654 * On certain Intel CPUs (e.g. SPR, ICX), though self-snoop feature is in vmx_hardware_setup()
8657 * map the video RAM, causing wayland desktop to fail to get started in vmx_hardware_setup()
8662 * On top of this, non-coherent DMA devices need the guest to flush CPU in vmx_hardware_setup()
8700 return -EOPNOTSUPP; in vmx_init()
8713 return -EIO; in vmx_init()
8724 * mitigation mode. in vmx_init()