Lines Matching +full:bp +full:- +full:disabled +full:- +full:ports
1 // SPDX-License-Identifier: GPL-2.0-only
3 * Kernel-based Virtual Machine driver for Linux
5 * This module enables machines with Intel VT-x extensions to run virtual
31 #include <linux/entry-kvm.h>
51 #include <asm/spec-ctrl.h>
81 MODULE_DESCRIPTION("KVM support for VMX (Intel VT-x) extensions");
144 /* Guest_tsc -> host_tsc conversion requires 64-bit division. */
171 * These 2 parameters are used to config the controls for Pause-Loop Exiting:
187 /* Default doubles per-vcpu window every exit. */
191 /* Default resets per-vcpu window every exit to ple_window. */
199 /* Default is SYSTEM mode, 1 for host-guest mode (which is BROKEN) */
222 [VMENTER_L1D_FLUSH_EPT_DISABLED] = {"EPT disabled", false},
278 return -ENOMEM; in vmx_setup_l1d_flush()
317 return -EINVAL; in vmentry_l1d_flush_parse()
360 if (!vmx->disable_fb_clear) in vmx_disable_fb_clear()
367 vmx->msr_ia32_mcu_opt_ctrl = msr; in vmx_disable_fb_clear()
372 if (!vmx->disable_fb_clear) in vmx_enable_fb_clear()
375 vmx->msr_ia32_mcu_opt_ctrl &= ~FB_CLEAR_DIS; in vmx_enable_fb_clear()
376 native_wrmsrq(MSR_IA32_MCU_OPT_CTRL, vmx->msr_ia32_mcu_opt_ctrl); in vmx_enable_fb_clear()
386 * CPU buffers is unnecessary, at the cost of MSR accesses on VM-Entry in vmx_update_fb_clear_dis()
387 * and VM-Exit. in vmx_update_fb_clear_dis()
389 vmx->disable_fb_clear = !cpu_feature_enabled(X86_FEATURE_CLEAR_CPU_BUF) && in vmx_update_fb_clear_dis()
399 if ((vcpu->arch.arch_capabilities & ARCH_CAP_FB_CLEAR) || in vmx_update_fb_clear_dis()
400 ((vcpu->arch.arch_capabilities & ARCH_CAP_MDS_NO) && in vmx_update_fb_clear_dis()
401 (vcpu->arch.arch_capabilities & ARCH_CAP_TAA_NO) && in vmx_update_fb_clear_dis()
402 (vcpu->arch.arch_capabilities & ARCH_CAP_PSDP_NO) && in vmx_update_fb_clear_dis()
403 (vcpu->arch.arch_capabilities & ARCH_CAP_FBSDP_NO) && in vmx_update_fb_clear_dis()
404 (vcpu->arch.arch_capabilities & ARCH_CAP_SBDR_SSDP_NO))) in vmx_update_fb_clear_dis()
405 vmx->disable_fb_clear = false; in vmx_update_fb_clear_dis()
474 * We maintain a per-CPU linked-list of VMCS loaded on that CPU. This is needed
522 return -ENOMEM; in hv_enable_l2_tlb_flush()
524 evmcs = (struct hv_enlightened_vmcs *)to_vmx(vcpu)->loaded_vmcs->vmcs; in hv_enable_l2_tlb_flush()
526 evmcs->partition_assist_page = partition_assist_page; in hv_enable_l2_tlb_flush()
527 evmcs->hv_vm_id = (unsigned long)vcpu->kvm; in hv_enable_l2_tlb_flush()
528 evmcs->hv_enlightenments_control.nested_flush_hypercall = 1; in hv_enable_l2_tlb_flush()
557 pr_info("Using Hyper-V Enlightened VMCS\n"); in hv_init_evmcs()
586 * Reset everything to support using non-enlightened VMCS access later in hv_reset_evmcs()
589 vp_ap->nested_control.features.directhypercall = 0; in hv_reset_evmcs()
590 vp_ap->current_nested_vmcs = 0; in hv_reset_evmcs()
591 vp_ap->enlighten_vmentry = 0; in hv_reset_evmcs()
600 * Comment's format: document - errata name - stepping - processor name.
605 /* 323344.pdf - BA86 - D0 - Xeon 7500 Series */
607 /* 323056.pdf - AAX65 - C2 - Xeon L3406 */
608 /* 322814.pdf - AAT59 - C2 - i7-600, i5-500, i5-400 and i3-300 Mobile */
609 /* 322911.pdf - AAU65 - C2 - i5-600, i3-500 Desktop and Pentium G6950 */
611 /* 322911.pdf - AAU65 - K0 - i5-600, i3-500 Desktop and Pentium G6950 */
613 /* 322373.pdf - AAO95 - B1 - Xeon 3400 Series */
614 /* 322166.pdf - AAN92 - B1 - i7-800 and i5-700 Desktop */
616 * 320767.pdf - AAP86 - B1 -
617 * i7-900 Mobile Extreme, i7-800 and i7-700 Mobile
620 /* 321333.pdf - AAM126 - C0 - Xeon 3500 */
622 /* 321333.pdf - AAM126 - C1 - Xeon 3500 */
624 /* 320836.pdf - AAJ124 - C0 - i7-900 Desktop Extreme and i7-900 Desktop */
626 /* 321333.pdf - AAM126 - D0 - Xeon 3500 */
627 /* 321324.pdf - AAK139 - D0 - Xeon 5500 */
628 /* 320836.pdf - AAJ124 - D0 - i7-900 Extreme and i7-900 Desktop */
630 /* Xeon E3-1220 V2 */
658 return &vmx->guest_uret_msrs[i]; in vmx_find_uret_msr()
665 unsigned int slot = msr - vmx->guest_uret_msrs; in vmx_set_guest_uret_msr()
668 if (msr->load_into_hardware) { in vmx_set_guest_uret_msr()
670 ret = kvm_set_user_return_msr(slot, data, msr->mask); in vmx_set_guest_uret_msr()
674 msr->data = data; in vmx_set_guest_uret_msr()
681 * Note, VMXOFF causes a #UD if the CPU is !post-VMXON, but it's impossible to
682 * atomically track post-VMXON state, e.g. this may be called in NMI context.
684 * faults are guaranteed to be due to the !post-VMXON check unless the CPU is
698 return -EIO; in kvm_cpu_vmxoff()
710 * set in task context. If this races with VMX is disabled by an NMI, in vmx_emergency_disable_virtualization_cpu()
719 vmcs_clear(v->vmcs); in vmx_emergency_disable_virtualization_cpu()
720 if (v->shadow_vmcs) in vmx_emergency_disable_virtualization_cpu()
721 vmcs_clear(v->shadow_vmcs); in vmx_emergency_disable_virtualization_cpu()
732 if (loaded_vmcs->cpu != cpu) in __loaded_vmcs_clear()
734 if (per_cpu(current_vmcs, cpu) == loaded_vmcs->vmcs) in __loaded_vmcs_clear()
737 vmcs_clear(loaded_vmcs->vmcs); in __loaded_vmcs_clear()
738 if (loaded_vmcs->shadow_vmcs && loaded_vmcs->launched) in __loaded_vmcs_clear()
739 vmcs_clear(loaded_vmcs->shadow_vmcs); in __loaded_vmcs_clear()
741 list_del(&loaded_vmcs->loaded_vmcss_on_cpu_link); in __loaded_vmcs_clear()
745 * current percpu list, complete before setting loaded_vmcs->cpu to in __loaded_vmcs_clear()
746 * -1, otherwise a different cpu can see loaded_vmcs->cpu == -1 first in __loaded_vmcs_clear()
752 loaded_vmcs->cpu = -1; in __loaded_vmcs_clear()
753 loaded_vmcs->launched = 0; in __loaded_vmcs_clear()
758 int cpu = loaded_vmcs->cpu; in loaded_vmcs_clear()
760 if (cpu != -1) in loaded_vmcs_clear()
771 if (!kvm_register_is_available(&vmx->vcpu, VCPU_EXREG_SEGMENTS)) { in vmx_segment_cache_test_set()
772 kvm_register_mark_available(&vmx->vcpu, VCPU_EXREG_SEGMENTS); in vmx_segment_cache_test_set()
773 vmx->segment_cache.bitmask = 0; in vmx_segment_cache_test_set()
775 ret = vmx->segment_cache.bitmask & mask; in vmx_segment_cache_test_set()
776 vmx->segment_cache.bitmask |= mask; in vmx_segment_cache_test_set()
782 u16 *p = &vmx->segment_cache.seg[seg].selector; in vmx_read_guest_seg_selector()
791 ulong *p = &vmx->segment_cache.seg[seg].base; in vmx_read_guest_seg_base()
800 u32 *p = &vmx->segment_cache.seg[seg].limit; in vmx_read_guest_seg_limit()
809 u32 *p = &vmx->segment_cache.seg[seg].ar; in vmx_read_guest_seg_ar()
829 * Guest access to VMware backdoor ports could legitimately in vmx_update_exception_bitmap()
836 if ((vcpu->guest_debug & in vmx_update_exception_bitmap()
840 if (to_vmx(vcpu)->rmode.vm86_active) in vmx_update_exception_bitmap()
851 eb |= get_vmcs12(vcpu)->exception_bitmap; in vmx_update_exception_bitmap()
860 * non-reserved faults. For vmcs02, however, PFEC_MASK in vmx_update_exception_bitmap()
875 if (vcpu->arch.xfd_no_write_intercept) in vmx_update_exception_bitmap()
889 return vmx_test_msr_bitmap_write(vmx->loaded_vmcs->msr_bitmap, msr); in msr_write_intercepted()
896 if (vmx->loaded_vmcs->launched) in __vmx_vcpu_run_flags()
902 * it after vmexit and store it in vmx->spec_ctrl. in __vmx_vcpu_run_flags()
908 kvm_vcpu_can_access_host_mmio(&vmx->vcpu)) in __vmx_vcpu_run_flags()
925 for (i = 0; i < m->nr; ++i) { in vmx_find_loadstore_msr_slot()
926 if (m->val[i].index == msr) in vmx_find_loadstore_msr_slot()
929 return -ENOENT; in vmx_find_loadstore_msr_slot()
935 struct msr_autoload *m = &vmx->msr_autoload; in clear_atomic_switch_msr()
955 i = vmx_find_loadstore_msr_slot(&m->guest, msr); in clear_atomic_switch_msr()
958 --m->guest.nr; in clear_atomic_switch_msr()
959 m->guest.val[i] = m->guest.val[m->guest.nr]; in clear_atomic_switch_msr()
960 vmcs_write32(VM_ENTRY_MSR_LOAD_COUNT, m->guest.nr); in clear_atomic_switch_msr()
963 i = vmx_find_loadstore_msr_slot(&m->host, msr); in clear_atomic_switch_msr()
967 --m->host.nr; in clear_atomic_switch_msr()
968 m->host.val[i] = m->host.val[m->host.nr]; in clear_atomic_switch_msr()
969 vmcs_write32(VM_EXIT_MSR_LOAD_COUNT, m->host.nr); in clear_atomic_switch_msr()
988 struct msr_autoload *m = &vmx->msr_autoload; in add_atomic_switch_msr()
1014 /* PEBS needs a quiescent period after being disabled (to write in add_atomic_switch_msr()
1022 i = vmx_find_loadstore_msr_slot(&m->guest, msr); in add_atomic_switch_msr()
1024 j = vmx_find_loadstore_msr_slot(&m->host, msr); in add_atomic_switch_msr()
1026 if ((i < 0 && m->guest.nr == MAX_NR_LOADSTORE_MSRS) || in add_atomic_switch_msr()
1027 (j < 0 && m->host.nr == MAX_NR_LOADSTORE_MSRS)) { in add_atomic_switch_msr()
1033 i = m->guest.nr++; in add_atomic_switch_msr()
1034 vmcs_write32(VM_ENTRY_MSR_LOAD_COUNT, m->guest.nr); in add_atomic_switch_msr()
1036 m->guest.val[i].index = msr; in add_atomic_switch_msr()
1037 m->guest.val[i].value = guest_val; in add_atomic_switch_msr()
1043 j = m->host.nr++; in add_atomic_switch_msr()
1044 vmcs_write32(VM_EXIT_MSR_LOAD_COUNT, m->host.nr); in add_atomic_switch_msr()
1046 m->host.val[j].index = msr; in add_atomic_switch_msr()
1047 m->host.val[j].value = host_val; in add_atomic_switch_msr()
1052 u64 guest_efer = vmx->vcpu.arch.efer; in update_transition_efer()
1077 (enable_ept && ((vmx->vcpu.arch.efer ^ kvm_host.efer) & EFER_NX))) { in update_transition_efer()
1097 vmx->guest_uret_msrs[i].data = guest_efer; in update_transition_efer()
1098 vmx->guest_uret_msrs[i].mask = ~ignore_bits; in update_transition_efer()
1105 * On 32-bit kernels, VM exits still load the FS and GS bases from the
1135 !(vmx->pt_desc.guest.ctl & RTIT_CTL_TRACEEN); in pt_can_write_msr()
1140 /* The base must be 128-byte aligned and a legal physical address. */ in pt_output_base_valid()
1148 wrmsrq(MSR_IA32_RTIT_STATUS, ctx->status); in pt_load_msr()
1149 wrmsrq(MSR_IA32_RTIT_OUTPUT_BASE, ctx->output_base); in pt_load_msr()
1150 wrmsrq(MSR_IA32_RTIT_OUTPUT_MASK, ctx->output_mask); in pt_load_msr()
1151 wrmsrq(MSR_IA32_RTIT_CR3_MATCH, ctx->cr3_match); in pt_load_msr()
1153 wrmsrq(MSR_IA32_RTIT_ADDR0_A + i * 2, ctx->addr_a[i]); in pt_load_msr()
1154 wrmsrq(MSR_IA32_RTIT_ADDR0_B + i * 2, ctx->addr_b[i]); in pt_load_msr()
1162 rdmsrq(MSR_IA32_RTIT_STATUS, ctx->status); in pt_save_msr()
1163 rdmsrq(MSR_IA32_RTIT_OUTPUT_BASE, ctx->output_base); in pt_save_msr()
1164 rdmsrq(MSR_IA32_RTIT_OUTPUT_MASK, ctx->output_mask); in pt_save_msr()
1165 rdmsrq(MSR_IA32_RTIT_CR3_MATCH, ctx->cr3_match); in pt_save_msr()
1167 rdmsrq(MSR_IA32_RTIT_ADDR0_A + i * 2, ctx->addr_a[i]); in pt_save_msr()
1168 rdmsrq(MSR_IA32_RTIT_ADDR0_B + i * 2, ctx->addr_b[i]); in pt_save_msr()
1181 rdmsrq(MSR_IA32_RTIT_CTL, vmx->pt_desc.host.ctl); in pt_guest_enter()
1182 if (vmx->pt_desc.guest.ctl & RTIT_CTL_TRACEEN) { in pt_guest_enter()
1184 pt_save_msr(&vmx->pt_desc.host, vmx->pt_desc.num_address_ranges); in pt_guest_enter()
1185 pt_load_msr(&vmx->pt_desc.guest, vmx->pt_desc.num_address_ranges); in pt_guest_enter()
1194 if (vmx->pt_desc.guest.ctl & RTIT_CTL_TRACEEN) { in pt_guest_exit()
1195 pt_save_msr(&vmx->pt_desc.guest, vmx->pt_desc.num_address_ranges); in pt_guest_exit()
1196 pt_load_msr(&vmx->pt_desc.host, vmx->pt_desc.num_address_ranges); in pt_guest_exit()
1201 * i.e. RTIT_CTL is always cleared on VM-Exit. Restore it if necessary. in pt_guest_exit()
1203 if (vmx->pt_desc.host.ctl) in pt_guest_exit()
1204 wrmsrq(MSR_IA32_RTIT_CTL, vmx->pt_desc.host.ctl); in pt_guest_exit()
1210 if (unlikely(fs_sel != host->fs_sel)) { in vmx_set_host_fs_gs()
1215 host->fs_sel = fs_sel; in vmx_set_host_fs_gs()
1217 if (unlikely(gs_sel != host->gs_sel)) { in vmx_set_host_fs_gs()
1222 host->gs_sel = gs_sel; in vmx_set_host_fs_gs()
1224 if (unlikely(fs_base != host->fs_base)) { in vmx_set_host_fs_gs()
1226 host->fs_base = fs_base; in vmx_set_host_fs_gs()
1228 if (unlikely(gs_base != host->gs_base)) { in vmx_set_host_fs_gs()
1230 host->gs_base = gs_base; in vmx_set_host_fs_gs()
1249 * to/from long-mode by setting MSR_EFER.LMA. in vmx_prepare_switch_to_guest()
1251 if (!vmx->guest_uret_msrs_loaded) { in vmx_prepare_switch_to_guest()
1252 vmx->guest_uret_msrs_loaded = true; in vmx_prepare_switch_to_guest()
1254 if (!vmx->guest_uret_msrs[i].load_into_hardware) in vmx_prepare_switch_to_guest()
1258 vmx->guest_uret_msrs[i].data, in vmx_prepare_switch_to_guest()
1259 vmx->guest_uret_msrs[i].mask); in vmx_prepare_switch_to_guest()
1263 if (vmx->nested.need_vmcs12_to_shadow_sync) in vmx_prepare_switch_to_guest()
1266 if (vt->guest_state_loaded) in vmx_prepare_switch_to_guest()
1269 host_state = &vmx->loaded_vmcs->host_state; in vmx_prepare_switch_to_guest()
1275 host_state->ldt_sel = kvm_read_ldt(); in vmx_prepare_switch_to_guest()
1278 savesegment(ds, host_state->ds_sel); in vmx_prepare_switch_to_guest()
1279 savesegment(es, host_state->es_sel); in vmx_prepare_switch_to_guest()
1282 if (likely(is_64bit_mm(current->mm))) { in vmx_prepare_switch_to_guest()
1284 fs_sel = current->thread.fsindex; in vmx_prepare_switch_to_guest()
1285 gs_sel = current->thread.gsindex; in vmx_prepare_switch_to_guest()
1286 fs_base = current->thread.fsbase; in vmx_prepare_switch_to_guest()
1287 vt->msr_host_kernel_gs_base = current->thread.gsbase; in vmx_prepare_switch_to_guest()
1292 vt->msr_host_kernel_gs_base = read_msr(MSR_KERNEL_GS_BASE); in vmx_prepare_switch_to_guest()
1295 wrmsrq(MSR_KERNEL_GS_BASE, vmx->msr_guest_kernel_gs_base); in vmx_prepare_switch_to_guest()
1304 vt->guest_state_loaded = true; in vmx_prepare_switch_to_guest()
1311 if (!vmx->vt.guest_state_loaded) in vmx_prepare_switch_to_host()
1314 host_state = &vmx->loaded_vmcs->host_state; in vmx_prepare_switch_to_host()
1316 ++vmx->vcpu.stat.host_state_reload; in vmx_prepare_switch_to_host()
1319 rdmsrq(MSR_KERNEL_GS_BASE, vmx->msr_guest_kernel_gs_base); in vmx_prepare_switch_to_host()
1321 if (host_state->ldt_sel || (host_state->gs_sel & 7)) { in vmx_prepare_switch_to_host()
1322 kvm_load_ldt(host_state->ldt_sel); in vmx_prepare_switch_to_host()
1324 load_gs_index(host_state->gs_sel); in vmx_prepare_switch_to_host()
1326 loadsegment(gs, host_state->gs_sel); in vmx_prepare_switch_to_host()
1329 if (host_state->fs_sel & 7) in vmx_prepare_switch_to_host()
1330 loadsegment(fs, host_state->fs_sel); in vmx_prepare_switch_to_host()
1332 if (unlikely(host_state->ds_sel | host_state->es_sel)) { in vmx_prepare_switch_to_host()
1333 loadsegment(ds, host_state->ds_sel); in vmx_prepare_switch_to_host()
1334 loadsegment(es, host_state->es_sel); in vmx_prepare_switch_to_host()
1339 wrmsrq(MSR_KERNEL_GS_BASE, vmx->vt.msr_host_kernel_gs_base); in vmx_prepare_switch_to_host()
1342 vmx->vt.guest_state_loaded = false; in vmx_prepare_switch_to_host()
1343 vmx->guest_uret_msrs_loaded = false; in vmx_prepare_switch_to_host()
1350 if (vmx->vt.guest_state_loaded) in vmx_read_guest_kernel_gs_base()
1351 rdmsrq(MSR_KERNEL_GS_BASE, vmx->msr_guest_kernel_gs_base); in vmx_read_guest_kernel_gs_base()
1353 return vmx->msr_guest_kernel_gs_base; in vmx_read_guest_kernel_gs_base()
1359 if (vmx->vt.guest_state_loaded) in vmx_write_guest_kernel_gs_base()
1362 vmx->msr_guest_kernel_gs_base = data; in vmx_write_guest_kernel_gs_base()
1369 unsigned int old = vmx->ple_window; in grow_ple_window()
1371 vmx->ple_window = __grow_ple_window(old, ple_window, in grow_ple_window()
1375 if (vmx->ple_window != old) { in grow_ple_window()
1376 vmx->ple_window_dirty = true; in grow_ple_window()
1377 trace_kvm_ple_window_update(vcpu->vcpu_id, in grow_ple_window()
1378 vmx->ple_window, old); in grow_ple_window()
1385 unsigned int old = vmx->ple_window; in shrink_ple_window()
1387 vmx->ple_window = __shrink_ple_window(old, ple_window, in shrink_ple_window()
1391 if (vmx->ple_window != old) { in shrink_ple_window()
1392 vmx->ple_window_dirty = true; in shrink_ple_window()
1393 trace_kvm_ple_window_update(vcpu->vcpu_id, in shrink_ple_window()
1394 vmx->ple_window, old); in shrink_ple_window()
1401 bool already_loaded = vmx->loaded_vmcs->cpu == cpu; in vmx_vcpu_load_vmcs()
1405 loaded_vmcs_clear(vmx->loaded_vmcs); in vmx_vcpu_load_vmcs()
1409 * Ensure loaded_vmcs->cpu is read before adding loaded_vmcs to in vmx_vcpu_load_vmcs()
1416 list_add(&vmx->loaded_vmcs->loaded_vmcss_on_cpu_link, in vmx_vcpu_load_vmcs()
1422 if (prev != vmx->loaded_vmcs->vmcs) { in vmx_vcpu_load_vmcs()
1423 per_cpu(current_vmcs, cpu) = vmx->loaded_vmcs->vmcs; in vmx_vcpu_load_vmcs()
1424 vmcs_load(vmx->loaded_vmcs->vmcs); in vmx_vcpu_load_vmcs()
1437 * Linux uses per-cpu TSS and GDT, so set these when switching in vmx_vcpu_load_vmcs()
1441 (unsigned long)&get_cpu_entry_area(cpu)->tss.x86_tss); in vmx_vcpu_load_vmcs()
1450 vmx->loaded_vmcs->cpu = cpu; in vmx_vcpu_load_vmcs()
1460 if (vcpu->scheduled_out && !kvm_pause_in_guest(vcpu->kvm)) in vmx_vcpu_load()
1488 if (vmx->rmode.vm86_active) { in vmx_get_rflags()
1490 save_rflags = vmx->rmode.save_rflags; in vmx_get_rflags()
1493 vmx->rflags = rflags; in vmx_get_rflags()
1495 return vmx->rflags; in vmx_get_rflags()
1510 vmx->rflags = rflags; in vmx_set_rflags()
1516 vmx->rflags = rflags; in vmx_set_rflags()
1517 if (vmx->rmode.vm86_active) { in vmx_set_rflags()
1518 vmx->rmode.save_rflags = rflags; in vmx_set_rflags()
1523 if ((old_rflags ^ vmx->rflags) & X86_EFLAGS_VM) in vmx_set_rflags()
1524 vmx->vt.emulation_required = vmx_emulation_required(vcpu); in vmx_set_rflags()
1570 if (data & vmx->pt_desc.ctl_bitmask) in vmx_rtit_ctl_check()
1577 if ((vmx->pt_desc.guest.ctl & RTIT_CTL_TRACEEN) && in vmx_rtit_ctl_check()
1579 data != vmx->pt_desc.guest.ctl) in vmx_rtit_ctl_check()
1589 !intel_pt_validate_cap(vmx->pt_desc.caps, in vmx_rtit_ctl_check()
1597 value = intel_pt_validate_cap(vmx->pt_desc.caps, PT_CAP_mtc_periods); in vmx_rtit_ctl_check()
1598 if (intel_pt_validate_cap(vmx->pt_desc.caps, PT_CAP_mtc) && in vmx_rtit_ctl_check()
1602 value = intel_pt_validate_cap(vmx->pt_desc.caps, in vmx_rtit_ctl_check()
1604 if (intel_pt_validate_cap(vmx->pt_desc.caps, PT_CAP_psb_cyc) && in vmx_rtit_ctl_check()
1608 value = intel_pt_validate_cap(vmx->pt_desc.caps, PT_CAP_psb_periods); in vmx_rtit_ctl_check()
1609 if (intel_pt_validate_cap(vmx->pt_desc.caps, PT_CAP_psb_cyc) && in vmx_rtit_ctl_check()
1619 if ((value && (vmx->pt_desc.num_address_ranges < 1)) || (value > 2)) in vmx_rtit_ctl_check()
1622 if ((value && (vmx->pt_desc.num_address_ranges < 2)) || (value > 2)) in vmx_rtit_ctl_check()
1625 if ((value && (vmx->pt_desc.num_address_ranges < 3)) || (value > 2)) in vmx_rtit_ctl_check()
1628 if ((value && (vmx->pt_desc.num_address_ranges < 4)) || (value > 2)) in vmx_rtit_ctl_check()
1650 if ((to_vmx(vcpu)->idt_vectoring_info & VECTORING_INFO_VALID_MASK) && in vmx_check_emulate_instruction()
1668 * (namely Hyper-V) don't set it due to it being undefined behavior, in skip_emulated_instruction()
1679 * the RIP that actually triggered the VM-Exit. But, because in skip_emulated_instruction()
1680 * most instructions that cause VM-Exit will #UD in an enclave, in skip_emulated_instruction()
1681 * most instruction-based VM-Exits simply do not occur. in skip_emulated_instruction()
1685 * and generate #DB/#BP as expected, which KVM might intercept. in skip_emulated_instruction()
1688 * WARN if KVM tries to skip a non-zero length instruction on in skip_emulated_instruction()
1689 * a VM-Exit from an enclave. in skip_emulated_instruction()
1695 "skipping instruction after SGX enclave VM-Exit"); in skip_emulated_instruction()
1701 * We need to mask out the high 32 bits of RIP if not in 64-bit in skip_emulated_instruction()
1702 * mode, but just finding out that we are in 64-bit mode is in skip_emulated_instruction()
1722 * Recognizes a pending MTF VM-exit and records the nested state for later
1734 * Per the SDM, MTF takes priority over debug-trap exceptions besides in vmx_update_emulated_instruction()
1735 * TSS T-bit traps and ICEBP (INT1). KVM doesn't emulate T-bit traps in vmx_update_emulated_instruction()
1737 * intercepted #DB deliberately avoids single-step #DB and MTF updates in vmx_update_emulated_instruction()
1740 * any #DB exception pending delivery must be a debug-trap of lower in vmx_update_emulated_instruction()
1745 (!vcpu->arch.exception.pending || in vmx_update_emulated_instruction()
1746 vcpu->arch.exception.vector == DB_VECTOR) && in vmx_update_emulated_instruction()
1747 (!vcpu->arch.exception_vmexit.pending || in vmx_update_emulated_instruction()
1748 vcpu->arch.exception_vmexit.vector == DB_VECTOR)) { in vmx_update_emulated_instruction()
1749 vmx->nested.mtf_pending = true; in vmx_update_emulated_instruction()
1752 vmx->nested.mtf_pending = false; in vmx_update_emulated_instruction()
1770 if (kvm_hlt_in_guest(vcpu->kvm) && in vmx_clear_hlt()
1777 struct kvm_queued_exception *ex = &vcpu->arch.exception; in vmx_inject_exception()
1778 u32 intr_info = ex->vector | INTR_INFO_VALID_MASK; in vmx_inject_exception()
1783 if (ex->has_error_code) { in vmx_inject_exception()
1790 * ABI lets userspace shove in arbitrary 32-bit values. Drop in vmx_inject_exception()
1791 * the upper bits to avoid VM-Fail, losing information that in vmx_inject_exception()
1794 vmcs_write32(VM_ENTRY_EXCEPTION_ERROR_CODE, (u16)ex->error_code); in vmx_inject_exception()
1798 if (vmx->rmode.vm86_active) { in vmx_inject_exception()
1800 if (kvm_exception_is_soft(ex->vector)) in vmx_inject_exception()
1801 inc_eip = vcpu->arch.event_exit_inst_len; in vmx_inject_exception()
1802 kvm_inject_realmode_interrupt(vcpu, ex->vector, inc_eip); in vmx_inject_exception()
1806 WARN_ON_ONCE(vmx->vt.emulation_required); in vmx_inject_exception()
1808 if (kvm_exception_is_soft(ex->vector)) { in vmx_inject_exception()
1810 vmx->vcpu.arch.event_exit_inst_len); in vmx_inject_exception()
1829 uret_msr->load_into_hardware = load_into_hardware; in vmx_setup_uret_msr()
1847 load_syscall_msrs = is_long_mode(&vmx->vcpu) && in vmx_setup_uret_msrs()
1848 (vmx->vcpu.arch.efer & EFER_SCE); in vmx_setup_uret_msrs()
1857 guest_cpu_cap_has(&vmx->vcpu, X86_FEATURE_RDTSCP) || in vmx_setup_uret_msrs()
1858 guest_cpu_cap_has(&vmx->vcpu, X86_FEATURE_RDPID)); in vmx_setup_uret_msrs()
1864 * so that TSX remains always disabled. in vmx_setup_uret_msrs()
1870 * next VM-Enter. in vmx_setup_uret_msrs()
1872 vmx->guest_uret_msrs_loaded = false; in vmx_setup_uret_msrs()
1880 return vmcs12->tsc_offset; in vmx_get_l2_tsc_offset()
1891 return vmcs12->tsc_multiplier; in vmx_get_l2_tsc_multiplier()
1898 vmcs_write64(TSC_OFFSET, vcpu->arch.tsc_offset); in vmx_write_tsc_offset()
1903 vmcs_write64(TSC_MULTIPLIER, vcpu->arch.tsc_scaling_ratio); in vmx_write_tsc_multiplier()
1929 WARN_ON_ONCE(vmx->msr_ia32_feature_control_valid_bits & in is_vmx_feature_control_msr_valid()
1932 if (!msr->host_initiated && in is_vmx_feature_control_msr_valid()
1933 (vmx->msr_ia32_feature_control & FEAT_CTL_LOCKED)) in is_vmx_feature_control_msr_valid()
1936 if (msr->host_initiated) in is_vmx_feature_control_msr_valid()
1939 valid_bits = vmx->msr_ia32_feature_control_valid_bits; in is_vmx_feature_control_msr_valid()
1941 return !(msr->data & ~valid_bits); in is_vmx_feature_control_msr_valid()
1957 * Reads an msr value (of 'msr_info->index') into 'msr_info->data'.
1958 * Returns 0 on success, non-0 otherwise.
1967 switch (msr_info->index) { in vmx_get_msr()
1970 msr_info->data = vmcs_readl(GUEST_FS_BASE); in vmx_get_msr()
1973 msr_info->data = vmcs_readl(GUEST_GS_BASE); in vmx_get_msr()
1976 msr_info->data = vmx_read_guest_kernel_gs_base(vmx); in vmx_get_msr()
1982 if (!msr_info->host_initiated && in vmx_get_msr()
1983 !(vcpu->arch.arch_capabilities & ARCH_CAP_TSX_CTRL_MSR)) in vmx_get_msr()
1987 if (!msr_info->host_initiated && !vmx_has_waitpkg(vmx)) in vmx_get_msr()
1990 msr_info->data = vmx->msr_ia32_umwait_control; in vmx_get_msr()
1993 if (!msr_info->host_initiated && in vmx_get_msr()
1997 msr_info->data = to_vmx(vcpu)->spec_ctrl; in vmx_get_msr()
2000 msr_info->data = vmcs_read32(GUEST_SYSENTER_CS); in vmx_get_msr()
2003 msr_info->data = vmcs_readl(GUEST_SYSENTER_EIP); in vmx_get_msr()
2006 msr_info->data = vmcs_readl(GUEST_SYSENTER_ESP); in vmx_get_msr()
2010 (!msr_info->host_initiated && in vmx_get_msr()
2013 msr_info->data = vmcs_read64(GUEST_BNDCFGS); in vmx_get_msr()
2016 if (!msr_info->host_initiated && in vmx_get_msr()
2017 !(vmx->msr_ia32_feature_control & in vmx_get_msr()
2020 msr_info->data = vcpu->arch.mcg_ext_ctl; in vmx_get_msr()
2023 msr_info->data = vmx->msr_ia32_feature_control; in vmx_get_msr()
2026 if (!msr_info->host_initiated && in vmx_get_msr()
2029 msr_info->data = to_vmx(vcpu)->msr_ia32_sgxlepubkeyhash in vmx_get_msr()
2030 [msr_info->index - MSR_IA32_SGXLEPUBKEYHASH0]; in vmx_get_msr()
2035 if (vmx_get_vmx_msr(&vmx->nested.msrs, msr_info->index, in vmx_get_msr()
2036 &msr_info->data)) in vmx_get_msr()
2041 * instead of just ignoring the features, different Hyper-V in vmx_get_msr()
2046 if (!msr_info->host_initiated && guest_cpu_cap_has_evmcs(vcpu)) in vmx_get_msr()
2047 nested_evmcs_filter_control_msr(vcpu, msr_info->index, in vmx_get_msr()
2048 &msr_info->data); in vmx_get_msr()
2054 msr_info->data = vmx->pt_desc.guest.ctl; in vmx_get_msr()
2059 msr_info->data = vmx->pt_desc.guest.status; in vmx_get_msr()
2063 !intel_pt_validate_cap(vmx->pt_desc.caps, in vmx_get_msr()
2066 msr_info->data = vmx->pt_desc.guest.cr3_match; in vmx_get_msr()
2070 (!intel_pt_validate_cap(vmx->pt_desc.caps, in vmx_get_msr()
2072 !intel_pt_validate_cap(vmx->pt_desc.caps, in vmx_get_msr()
2075 msr_info->data = vmx->pt_desc.guest.output_base; in vmx_get_msr()
2079 (!intel_pt_validate_cap(vmx->pt_desc.caps, in vmx_get_msr()
2081 !intel_pt_validate_cap(vmx->pt_desc.caps, in vmx_get_msr()
2084 msr_info->data = vmx->pt_desc.guest.output_mask; in vmx_get_msr()
2087 index = msr_info->index - MSR_IA32_RTIT_ADDR0_A; in vmx_get_msr()
2089 (index >= 2 * vmx->pt_desc.num_address_ranges)) in vmx_get_msr()
2092 msr_info->data = vmx->pt_desc.guest.addr_b[index / 2]; in vmx_get_msr()
2094 msr_info->data = vmx->pt_desc.guest.addr_a[index / 2]; in vmx_get_msr()
2097 msr_info->data = vmx_guest_debugctl_read(); in vmx_get_msr()
2101 msr = vmx_find_uret_msr(vmx, msr_info->index); in vmx_get_msr()
2103 msr_info->data = msr->data; in vmx_get_msr()
2155 * Returns 0 on success, non-0 otherwise.
2163 u32 msr_index = msr_info->index; in vmx_set_msr()
2164 u64 data = msr_info->data; in vmx_set_msr()
2186 * Always intercepting WRMSR could incur non-negligible in vmx_set_msr()
2189 * upon the first write with a non-zero value (indicating in vmx_set_msr()
2197 vcpu->arch.xfd_no_write_intercept = true; in vmx_set_msr()
2204 get_vmcs12(vcpu)->guest_sysenter_cs = data; in vmx_set_msr()
2210 get_vmcs12(vcpu)->guest_sysenter_eip = data; in vmx_set_msr()
2217 get_vmcs12(vcpu)->guest_sysenter_esp = data; in vmx_set_msr()
2222 if (!vmx_is_valid_debugctl(vcpu, data, msr_info->host_initiated)) in vmx_set_msr()
2225 data &= vmx_get_supported_debugctl(vcpu, msr_info->host_initiated); in vmx_set_msr()
2227 if (is_guest_mode(vcpu) && get_vmcs12(vcpu)->vm_exit_controls & in vmx_set_msr()
2229 get_vmcs12(vcpu)->guest_ia32_debugctl = data; in vmx_set_msr()
2233 if (intel_pmu_lbr_is_enabled(vcpu) && !to_vmx(vcpu)->lbr_desc.event && in vmx_set_msr()
2239 (!msr_info->host_initiated && in vmx_set_msr()
2247 ((vmx->nested.msrs.entry_ctls_high & VM_ENTRY_LOAD_BNDCFGS) || in vmx_set_msr()
2248 (vmx->nested.msrs.exit_ctls_high & VM_EXIT_CLEAR_BNDCFGS))) in vmx_set_msr()
2249 get_vmcs12(vcpu)->guest_bndcfgs = data; in vmx_set_msr()
2254 if (!msr_info->host_initiated && !vmx_has_waitpkg(vmx)) in vmx_set_msr()
2257 /* The reserved bit 1 and non-32 bit [63:32] should be zero */ in vmx_set_msr()
2261 vmx->msr_ia32_umwait_control = data; in vmx_set_msr()
2264 if (!msr_info->host_initiated && in vmx_set_msr()
2271 vmx->spec_ctrl = data; in vmx_set_msr()
2276 * For non-nested: in vmx_set_msr()
2277 * When it's written (to non-zero) for the first time, pass in vmx_set_msr()
2292 if (!msr_info->host_initiated && in vmx_set_msr()
2293 !(vcpu->arch.arch_capabilities & ARCH_CAP_TSX_CTRL_MSR)) in vmx_set_msr()
2304 get_vmcs12(vcpu)->vm_exit_controls & VM_EXIT_SAVE_IA32_PAT) in vmx_set_msr()
2305 get_vmcs12(vcpu)->guest_ia32_pat = data; in vmx_set_msr()
2311 if ((!msr_info->host_initiated && in vmx_set_msr()
2312 !(to_vmx(vcpu)->msr_ia32_feature_control & in vmx_set_msr()
2316 vcpu->arch.mcg_ext_ctl = data; in vmx_set_msr()
2322 vmx->msr_ia32_feature_control = data; in vmx_set_msr()
2323 if (msr_info->host_initiated && data == 0) in vmx_set_msr()
2326 /* SGX may be enabled/disabled by guest's firmware */ in vmx_set_msr()
2341 if (!msr_info->host_initiated && in vmx_set_msr()
2343 ((vmx->msr_ia32_feature_control & FEAT_CTL_LOCKED) && in vmx_set_msr()
2344 !(vmx->msr_ia32_feature_control & FEAT_CTL_SGX_LC_ENABLED)))) in vmx_set_msr()
2346 vmx->msr_ia32_sgxlepubkeyhash in vmx_set_msr()
2347 [msr_index - MSR_IA32_SGXLEPUBKEYHASH0] = data; in vmx_set_msr()
2350 if (!msr_info->host_initiated) in vmx_set_msr()
2351 return 1; /* they are read-only */ in vmx_set_msr()
2358 vmx->nested.vmxon) in vmx_set_msr()
2361 vmx->pt_desc.guest.ctl = data; in vmx_set_msr()
2369 vmx->pt_desc.guest.status = data; in vmx_set_msr()
2374 if (!intel_pt_validate_cap(vmx->pt_desc.caps, in vmx_set_msr()
2377 vmx->pt_desc.guest.cr3_match = data; in vmx_set_msr()
2382 if (!intel_pt_validate_cap(vmx->pt_desc.caps, in vmx_set_msr()
2384 !intel_pt_validate_cap(vmx->pt_desc.caps, in vmx_set_msr()
2389 vmx->pt_desc.guest.output_base = data; in vmx_set_msr()
2394 if (!intel_pt_validate_cap(vmx->pt_desc.caps, in vmx_set_msr()
2396 !intel_pt_validate_cap(vmx->pt_desc.caps, in vmx_set_msr()
2399 vmx->pt_desc.guest.output_mask = data; in vmx_set_msr()
2404 index = msr_info->index - MSR_IA32_RTIT_ADDR0_A; in vmx_set_msr()
2405 if (index >= 2 * vmx->pt_desc.num_address_ranges) in vmx_set_msr()
2410 vmx->pt_desc.guest.addr_b[index / 2] = data; in vmx_set_msr()
2412 vmx->pt_desc.guest.addr_a[index / 2] = data; in vmx_set_msr()
2460 vcpu->arch.regs[VCPU_REGS_RSP] = vmcs_readl(GUEST_RSP); in vmx_cache_reg()
2463 vcpu->arch.regs[VCPU_REGS_RIP] = vmcs_readl(GUEST_RIP); in vmx_cache_reg()
2470 guest_owned_bits = vcpu->arch.cr0_guest_owned_bits; in vmx_cache_reg()
2472 vcpu->arch.cr0 &= ~guest_owned_bits; in vmx_cache_reg()
2473 vcpu->arch.cr0 |= vmcs_readl(GUEST_CR0) & guest_owned_bits; in vmx_cache_reg()
2481 vcpu->arch.cr3 = vmcs_readl(GUEST_CR3); in vmx_cache_reg()
2484 guest_owned_bits = vcpu->arch.cr4_guest_owned_bits; in vmx_cache_reg()
2486 vcpu->arch.cr4 &= ~guest_owned_bits; in vmx_cache_reg()
2487 vcpu->arch.cr4 |= vmcs_readl(GUEST_CR4) & guest_owned_bits; in vmx_cache_reg()
2490 KVM_BUG_ON(1, vcpu->kvm); in vmx_cache_reg()
2518 return -EIO; in adjust_vmx_controls()
2547 pr_warn_once("Inconsistent VM-Entry/VM-Exit pair, " \
2553 r = -EIO; \
2595 return -EIO; in setup_vmcs_config()
2601 return -EIO; in setup_vmcs_config()
2619 &vmx_cap->ept, &vmx_cap->vpid); in setup_vmcs_config()
2622 vmx_cap->ept) { in setup_vmcs_config()
2624 "1-setting enable EPT VM-execution control\n"); in setup_vmcs_config()
2627 return -EIO; in setup_vmcs_config()
2629 vmx_cap->ept = 0; in setup_vmcs_config()
2633 vmx_cap->vpid) { in setup_vmcs_config()
2635 "1-setting enable VPID VM-execution control\n"); in setup_vmcs_config()
2638 return -EIO; in setup_vmcs_config()
2640 vmx_cap->vpid = 0; in setup_vmcs_config()
2655 return -EIO; in setup_vmcs_config()
2661 return -EIO; in setup_vmcs_config()
2673 return -EIO; in setup_vmcs_config()
2677 return -EIO; in setup_vmcs_config()
2702 /* IA-32 SDM Vol 3B: VMCS size is never greater than 4kB. */ in setup_vmcs_config()
2704 return -EIO; in setup_vmcs_config()
2709 * VMCS fields for 64-bit kernels, and per the SDM, "This bit is always in setup_vmcs_config()
2713 return -EIO; in setup_vmcs_config()
2716 /* Require Write-Back (WB) memory type for VMCS accesses. */ in setup_vmcs_config()
2718 return -EIO; in setup_vmcs_config()
2722 vmcs_conf->basic = basic_msr; in setup_vmcs_config()
2723 vmcs_conf->pin_based_exec_ctrl = _pin_based_exec_control; in setup_vmcs_config()
2724 vmcs_conf->cpu_based_exec_ctrl = _cpu_based_exec_control; in setup_vmcs_config()
2725 vmcs_conf->cpu_based_2nd_exec_ctrl = _cpu_based_2nd_exec_control; in setup_vmcs_config()
2726 vmcs_conf->cpu_based_3rd_exec_ctrl = _cpu_based_3rd_exec_control; in setup_vmcs_config()
2727 vmcs_conf->vmexit_ctrl = _vmexit_control; in setup_vmcs_config()
2728 vmcs_conf->vmentry_ctrl = _vmentry_control; in setup_vmcs_config()
2729 vmcs_conf->misc = misc_msr; in setup_vmcs_config()
2775 return -EIO; in vmx_check_processor_compat()
2779 return -EIO; in vmx_check_processor_compat()
2785 return -EIO; in vmx_check_processor_compat()
2807 return -EFAULT; in kvm_cpu_vmxon()
2817 return -EBUSY; in vmx_enable_virtualization_cpu()
2820 * This can happen if we hot-added a CPU but failed to allocate in vmx_enable_virtualization_cpu()
2824 return -EFAULT; in vmx_enable_virtualization_cpu()
2873 vmcs->hdr.revision_id = KVM_EVMCS_VERSION; in alloc_vmcs_cpu()
2875 vmcs->hdr.revision_id = vmx_basic_vmcs_revision_id(vmcs_config.basic); in alloc_vmcs_cpu()
2878 vmcs->hdr.shadow_vmcs = 1; in alloc_vmcs_cpu()
2892 if (!loaded_vmcs->vmcs) in free_loaded_vmcs()
2895 free_vmcs(loaded_vmcs->vmcs); in free_loaded_vmcs()
2896 loaded_vmcs->vmcs = NULL; in free_loaded_vmcs()
2897 if (loaded_vmcs->msr_bitmap) in free_loaded_vmcs()
2898 free_page((unsigned long)loaded_vmcs->msr_bitmap); in free_loaded_vmcs()
2899 WARN_ON(loaded_vmcs->shadow_vmcs != NULL); in free_loaded_vmcs()
2904 loaded_vmcs->vmcs = alloc_vmcs(false); in alloc_loaded_vmcs()
2905 if (!loaded_vmcs->vmcs) in alloc_loaded_vmcs()
2906 return -ENOMEM; in alloc_loaded_vmcs()
2908 vmcs_clear(loaded_vmcs->vmcs); in alloc_loaded_vmcs()
2910 loaded_vmcs->shadow_vmcs = NULL; in alloc_loaded_vmcs()
2911 loaded_vmcs->hv_timer_soft_disabled = false; in alloc_loaded_vmcs()
2912 loaded_vmcs->cpu = -1; in alloc_loaded_vmcs()
2913 loaded_vmcs->launched = 0; in alloc_loaded_vmcs()
2916 loaded_vmcs->msr_bitmap = (unsigned long *) in alloc_loaded_vmcs()
2918 if (!loaded_vmcs->msr_bitmap) in alloc_loaded_vmcs()
2920 memset(loaded_vmcs->msr_bitmap, 0xff, PAGE_SIZE); in alloc_loaded_vmcs()
2923 memset(&loaded_vmcs->host_state, 0, sizeof(struct vmcs_host_state)); in alloc_loaded_vmcs()
2924 memset(&loaded_vmcs->controls_shadow, 0, in alloc_loaded_vmcs()
2931 return -ENOMEM; in alloc_loaded_vmcs()
2954 return -ENOMEM; in alloc_kvm_area()
2959 * vmcs->revision_id to KVM_EVMCS_VERSION instead of in alloc_kvm_area()
2968 vmcs->hdr.revision_id = vmx_basic_vmcs_revision_id(vmcs_config.basic); in alloc_kvm_area()
2987 save->selector &= ~SEGMENT_RPL_MASK; in fix_pmode_seg()
2988 save->dpl = save->selector & SEGMENT_RPL_MASK; in fix_pmode_seg()
2989 save->s = 1; in fix_pmode_seg()
3000 * Update real mode segment cache. It may be not up-to-date if segment in enter_pmode()
3003 vmx_get_segment(vcpu, &vmx->rmode.segs[VCPU_SREG_ES], VCPU_SREG_ES); in enter_pmode()
3004 vmx_get_segment(vcpu, &vmx->rmode.segs[VCPU_SREG_DS], VCPU_SREG_DS); in enter_pmode()
3005 vmx_get_segment(vcpu, &vmx->rmode.segs[VCPU_SREG_FS], VCPU_SREG_FS); in enter_pmode()
3006 vmx_get_segment(vcpu, &vmx->rmode.segs[VCPU_SREG_GS], VCPU_SREG_GS); in enter_pmode()
3007 vmx_get_segment(vcpu, &vmx->rmode.segs[VCPU_SREG_SS], VCPU_SREG_SS); in enter_pmode()
3008 vmx_get_segment(vcpu, &vmx->rmode.segs[VCPU_SREG_CS], VCPU_SREG_CS); in enter_pmode()
3010 vmx->rmode.vm86_active = 0; in enter_pmode()
3012 __vmx_set_segment(vcpu, &vmx->rmode.segs[VCPU_SREG_TR], VCPU_SREG_TR); in enter_pmode()
3016 flags |= vmx->rmode.save_rflags & ~RMODE_GUEST_OWNED_EFLAGS_BITS; in enter_pmode()
3024 fix_pmode_seg(vcpu, VCPU_SREG_CS, &vmx->rmode.segs[VCPU_SREG_CS]); in enter_pmode()
3025 fix_pmode_seg(vcpu, VCPU_SREG_SS, &vmx->rmode.segs[VCPU_SREG_SS]); in enter_pmode()
3026 fix_pmode_seg(vcpu, VCPU_SREG_ES, &vmx->rmode.segs[VCPU_SREG_ES]); in enter_pmode()
3027 fix_pmode_seg(vcpu, VCPU_SREG_DS, &vmx->rmode.segs[VCPU_SREG_DS]); in enter_pmode()
3028 fix_pmode_seg(vcpu, VCPU_SREG_FS, &vmx->rmode.segs[VCPU_SREG_FS]); in enter_pmode()
3029 fix_pmode_seg(vcpu, VCPU_SREG_GS, &vmx->rmode.segs[VCPU_SREG_GS]); in enter_pmode()
3053 if (save->base & 0xf) in fix_rmode_seg()
3058 vmcs_write16(sf->selector, var.selector); in fix_rmode_seg()
3059 vmcs_writel(sf->base, var.base); in fix_rmode_seg()
3060 vmcs_write32(sf->limit, var.limit); in fix_rmode_seg()
3061 vmcs_write32(sf->ar_bytes, vmx_segment_access_rights(&var)); in fix_rmode_seg()
3068 struct kvm_vmx *kvm_vmx = to_kvm_vmx(vcpu->kvm); in enter_rmode()
3073 * if unrestricted guest is disabled, VM-Enter (from L1) with CR0.PG=0 in enter_rmode()
3074 * should VM-Fail and KVM should reject userspace attempts to stuff in enter_rmode()
3079 vmx_get_segment(vcpu, &vmx->rmode.segs[VCPU_SREG_TR], VCPU_SREG_TR); in enter_rmode()
3080 vmx_get_segment(vcpu, &vmx->rmode.segs[VCPU_SREG_ES], VCPU_SREG_ES); in enter_rmode()
3081 vmx_get_segment(vcpu, &vmx->rmode.segs[VCPU_SREG_DS], VCPU_SREG_DS); in enter_rmode()
3082 vmx_get_segment(vcpu, &vmx->rmode.segs[VCPU_SREG_FS], VCPU_SREG_FS); in enter_rmode()
3083 vmx_get_segment(vcpu, &vmx->rmode.segs[VCPU_SREG_GS], VCPU_SREG_GS); in enter_rmode()
3084 vmx_get_segment(vcpu, &vmx->rmode.segs[VCPU_SREG_SS], VCPU_SREG_SS); in enter_rmode()
3085 vmx_get_segment(vcpu, &vmx->rmode.segs[VCPU_SREG_CS], VCPU_SREG_CS); in enter_rmode()
3087 vmx->rmode.vm86_active = 1; in enter_rmode()
3091 vmcs_writel(GUEST_TR_BASE, kvm_vmx->tss_addr); in enter_rmode()
3092 vmcs_write32(GUEST_TR_LIMIT, RMODE_TSS_SIZE - 1); in enter_rmode()
3096 vmx->rmode.save_rflags = flags; in enter_rmode()
3104 fix_rmode_seg(VCPU_SREG_SS, &vmx->rmode.segs[VCPU_SREG_SS]); in enter_rmode()
3105 fix_rmode_seg(VCPU_SREG_CS, &vmx->rmode.segs[VCPU_SREG_CS]); in enter_rmode()
3106 fix_rmode_seg(VCPU_SREG_ES, &vmx->rmode.segs[VCPU_SREG_ES]); in enter_rmode()
3107 fix_rmode_seg(VCPU_SREG_DS, &vmx->rmode.segs[VCPU_SREG_DS]); in enter_rmode()
3108 fix_rmode_seg(VCPU_SREG_GS, &vmx->rmode.segs[VCPU_SREG_GS]); in enter_rmode()
3109 fix_rmode_seg(VCPU_SREG_FS, &vmx->rmode.segs[VCPU_SREG_FS]); in enter_rmode()
3120 vcpu->arch.efer = efer; in vmx_set_efer()
3127 if (KVM_BUG_ON(efer & EFER_LMA, vcpu->kvm)) in vmx_set_efer()
3151 vmx_set_efer(vcpu, vcpu->arch.efer | EFER_LMA); in enter_lmode()
3156 vmx_set_efer(vcpu, vcpu->arch.efer & ~EFER_LMA); in exit_lmode()
3167 * the CPU is not required to invalidate guest-physical mappings on in vmx_flush_tlb_all()
3168 * VM-Entry, even if VPID is disabled. Guest-physical mappings are in vmx_flush_tlb_all()
3170 * (INVVPID also isn't required to invalidate guest-physical mappings). in vmx_flush_tlb_all()
3178 vpid_sync_vcpu_single(vmx->vpid); in vmx_flush_tlb_all()
3179 vpid_sync_vcpu_single(vmx->nested.vpid02); in vmx_flush_tlb_all()
3188 return to_vmx(vcpu)->vpid; in vmx_get_current_vpid()
3193 struct kvm_mmu *mmu = vcpu->arch.mmu; in vmx_flush_tlb_current()
3194 u64 root_hpa = mmu->root.hpa; in vmx_flush_tlb_current()
3202 mmu->root_role.level)); in vmx_flush_tlb_current()
3220 * vpid couldn't be allocated for this vCPU. VM-Enter and VM-Exit are in vmx_flush_tlb_guest()
3221 * required to flush GVA->{G,H}PA mappings from the TLB if vpid is in vmx_flush_tlb_guest()
3222 * disabled (VM-Enter with vpid enabled and vpid==0 is disallowed), in vmx_flush_tlb_guest()
3230 struct kvm_mmu *mmu = vcpu->arch.walk_mmu; in vmx_ept_load_pdptrs()
3236 vmcs_write64(GUEST_PDPTR0, mmu->pdptrs[0]); in vmx_ept_load_pdptrs()
3237 vmcs_write64(GUEST_PDPTR1, mmu->pdptrs[1]); in vmx_ept_load_pdptrs()
3238 vmcs_write64(GUEST_PDPTR2, mmu->pdptrs[2]); in vmx_ept_load_pdptrs()
3239 vmcs_write64(GUEST_PDPTR3, mmu->pdptrs[3]); in vmx_ept_load_pdptrs()
3245 struct kvm_mmu *mmu = vcpu->arch.walk_mmu; in ept_save_pdptrs()
3250 mmu->pdptrs[0] = vmcs_read64(GUEST_PDPTR0); in ept_save_pdptrs()
3251 mmu->pdptrs[1] = vmcs_read64(GUEST_PDPTR1); in ept_save_pdptrs()
3252 mmu->pdptrs[2] = vmcs_read64(GUEST_PDPTR2); in ept_save_pdptrs()
3253 mmu->pdptrs[3] = vmcs_read64(GUEST_PDPTR3); in ept_save_pdptrs()
3266 if (to_vmx(vcpu)->nested.vmxon) in vmx_is_valid_cr0()
3288 if (vmx->rmode.vm86_active && (cr0 & X86_CR0_PE)) in vmx_set_cr0()
3291 if (!vmx->rmode.vm86_active && !(cr0 & X86_CR0_PE)) in vmx_set_cr0()
3297 vcpu->arch.cr0 = cr0; in vmx_set_cr0()
3301 if (vcpu->arch.efer & EFER_LME) { in vmx_set_cr0()
3311 * Ensure KVM has an up-to-date snapshot of the guest's CR3. If in vmx_set_cr0()
3323 * paging disabled, and so KVM stuffs its own CR3 in order to in vmx_set_cr0()
3328 * e.g. after nested VM-Enter. in vmx_set_cr0()
3341 tmp |= get_vmcs12(vcpu)->cpu_based_vm_exec_control & CR3_EXITING_BITS; in vmx_set_cr0()
3345 /* Note, vmx_set_cr4() consumes the new vcpu->arch.cr0. */ in vmx_set_cr0()
3350 * When !CR0_PG -> CR0_PG, vcpu->arch.cr3 becomes active, but in vmx_set_cr0()
3351 * GUEST_CR3 is still vmx->ept_identity_map_addr if EPT + !URG. in vmx_set_cr0()
3357 /* depends on vcpu->arch.cr0 to be set to a new value */ in vmx_set_cr0()
3358 vmx->vt.emulation_required = vmx_emulation_required(vcpu); in vmx_set_cr0()
3384 struct kvm *kvm = vcpu->kvm; in vmx_load_mmu_pgd()
3396 guest_cr3 = to_kvm_vmx(kvm)->ept_identity_map_addr; in vmx_load_mmu_pgd()
3398 guest_cr3 = vcpu->arch.cr3; in vmx_load_mmu_pgd()
3399 else /* vmcs.GUEST_CR3 is already up-to-date. */ in vmx_load_mmu_pgd()
3421 if (to_vmx(vcpu)->nested.vmxon && !nested_cr4_valid(vcpu, cr4)) in vmx_is_valid_cr4()
3441 else if (vmx->rmode.vm86_active) in vmx_set_cr4()
3456 vcpu->arch.cr4 = cr4; in vmx_set_cr4()
3470 * SMEP/SMAP/PKU is disabled if CPU is in non-paging mode in in vmx_set_cr4()
3472 * to be manually disabled when guest switches to non-paging in vmx_set_cr4()
3488 vcpu->arch.cpuid_dynamic_bits_dirty = true; in vmx_set_cr4()
3496 if (vmx->rmode.vm86_active && seg != VCPU_SREG_LDTR) { in vmx_get_segment()
3497 *var = vmx->rmode.segs[seg]; in vmx_get_segment()
3499 || var->selector == vmx_read_guest_seg_selector(vmx, seg)) in vmx_get_segment()
3501 var->base = vmx_read_guest_seg_base(vmx, seg); in vmx_get_segment()
3502 var->selector = vmx_read_guest_seg_selector(vmx, seg); in vmx_get_segment()
3505 var->base = vmx_read_guest_seg_base(vmx, seg); in vmx_get_segment()
3506 var->limit = vmx_read_guest_seg_limit(vmx, seg); in vmx_get_segment()
3507 var->selector = vmx_read_guest_seg_selector(vmx, seg); in vmx_get_segment()
3509 var->unusable = (ar >> 16) & 1; in vmx_get_segment()
3510 var->type = ar & 15; in vmx_get_segment()
3511 var->s = (ar >> 4) & 1; in vmx_get_segment()
3512 var->dpl = (ar >> 5) & 3; in vmx_get_segment()
3520 var->present = !var->unusable; in vmx_get_segment()
3521 var->avl = (ar >> 12) & 1; in vmx_get_segment()
3522 var->l = (ar >> 13) & 1; in vmx_get_segment()
3523 var->db = (ar >> 14) & 1; in vmx_get_segment()
3524 var->g = (ar >> 15) & 1; in vmx_get_segment()
3531 if (to_vmx(vcpu)->rmode.vm86_active) { in vmx_get_segment_base()
3543 if (unlikely(vmx->rmode.vm86_active)) in __vmx_get_cpl()
3567 ar = var->type & 15; in vmx_segment_access_rights()
3568 ar |= (var->s & 1) << 4; in vmx_segment_access_rights()
3569 ar |= (var->dpl & 3) << 5; in vmx_segment_access_rights()
3570 ar |= (var->present & 1) << 7; in vmx_segment_access_rights()
3571 ar |= (var->avl & 1) << 12; in vmx_segment_access_rights()
3572 ar |= (var->l & 1) << 13; in vmx_segment_access_rights()
3573 ar |= (var->db & 1) << 14; in vmx_segment_access_rights()
3574 ar |= (var->g & 1) << 15; in vmx_segment_access_rights()
3575 ar |= (var->unusable || !var->present) << 16; in vmx_segment_access_rights()
3587 if (vmx->rmode.vm86_active && seg != VCPU_SREG_LDTR) { in __vmx_set_segment()
3588 vmx->rmode.segs[seg] = *var; in __vmx_set_segment()
3590 vmcs_write16(sf->selector, var->selector); in __vmx_set_segment()
3591 else if (var->s) in __vmx_set_segment()
3592 fix_rmode_seg(seg, &vmx->rmode.segs[seg]); in __vmx_set_segment()
3596 vmcs_writel(sf->base, var->base); in __vmx_set_segment()
3597 vmcs_write32(sf->limit, var->limit); in __vmx_set_segment()
3598 vmcs_write16(sf->selector, var->selector); in __vmx_set_segment()
3612 var->type |= 0x1; /* Accessed */ in __vmx_set_segment()
3614 vmcs_write32(sf->ar_bytes, vmx_segment_access_rights(var)); in __vmx_set_segment()
3621 to_vmx(vcpu)->vt.emulation_required = vmx_emulation_required(vcpu); in vmx_set_segment()
3634 dt->size = vmcs_read32(GUEST_IDTR_LIMIT); in vmx_get_idt()
3635 dt->address = vmcs_readl(GUEST_IDTR_BASE); in vmx_get_idt()
3640 vmcs_write32(GUEST_IDTR_LIMIT, dt->size); in vmx_set_idt()
3641 vmcs_writel(GUEST_IDTR_BASE, dt->address); in vmx_set_idt()
3646 dt->size = vmcs_read32(GUEST_GDTR_LIMIT); in vmx_get_gdt()
3647 dt->address = vmcs_readl(GUEST_GDTR_BASE); in vmx_get_gdt()
3652 vmcs_write32(GUEST_GDTR_LIMIT, dt->size); in vmx_set_gdt()
3653 vmcs_writel(GUEST_GDTR_BASE, dt->address); in vmx_set_gdt()
3842 * - Add checks on RIP in __vmx_guest_state_valid()
3843 * - Add checks on RFLAGS in __vmx_guest_state_valid()
3857 return -EFAULT; in init_rmode_tss()
3862 return -EFAULT; in init_rmode_tss()
3865 if (__copy_to_user(ua + RMODE_TSS_SIZE - 1, &data, sizeof(u8))) in init_rmode_tss()
3866 return -EFAULT; in init_rmode_tss()
3878 /* Protect kvm_vmx->ept_identity_pagetable_done. */ in init_rmode_identity_map()
3879 mutex_lock(&kvm->slots_lock); in init_rmode_identity_map()
3881 if (likely(kvm_vmx->ept_identity_pagetable_done)) in init_rmode_identity_map()
3884 if (!kvm_vmx->ept_identity_map_addr) in init_rmode_identity_map()
3885 kvm_vmx->ept_identity_map_addr = VMX_EPT_IDENTITY_PAGETABLE_ADDR; in init_rmode_identity_map()
3889 kvm_vmx->ept_identity_map_addr, in init_rmode_identity_map()
3896 /* Set up identity-mapping pagetable for EPT in real mode */ in init_rmode_identity_map()
3901 r = -EFAULT; in init_rmode_identity_map()
3905 kvm_vmx->ept_identity_pagetable_done = true; in init_rmode_identity_map()
3908 mutex_unlock(&kvm->slots_lock); in init_rmode_identity_map()
3917 vmcs_write16(sf->selector, 0); in seg_setup()
3918 vmcs_writel(sf->base, 0); in seg_setup()
3919 vmcs_write32(sf->limit, 0xffff); in seg_setup()
3924 vmcs_write32(sf->ar_bytes, ar); in seg_setup()
3955 * When KVM is a nested hypervisor on top of Hyper-V and uses in vmx_msr_bitmap_l01_changed()
3960 struct hv_enlightened_vmcs *evmcs = (void *)vmx->vmcs01.vmcs; in vmx_msr_bitmap_l01_changed()
3962 if (evmcs->hv_enlightenments_control.msr_bitmap) in vmx_msr_bitmap_l01_changed()
3963 evmcs->hv_clean_fields &= in vmx_msr_bitmap_l01_changed()
3967 vmx->nested.force_msr_bitmap_recalc = true; in vmx_msr_bitmap_l01_changed()
3973 unsigned long *msr_bitmap = vmx->vmcs01.msr_bitmap; in vmx_set_intercept_for_msr()
3998 * x2APIC indices for 64-bit accesses into the RDMSR and WRMSR halves in vmx_update_msr_bitmap_x2apic()
4005 u64 *msr_bitmap = (u64 *)vmx->vmcs01.msr_bitmap; in vmx_update_msr_bitmap_x2apic()
4021 if (mode == vmx->x2apic_msr_bitmap_mode) in vmx_update_msr_bitmap_x2apic()
4024 vmx->x2apic_msr_bitmap_mode = mode; in vmx_update_msr_bitmap_x2apic()
4027 * Reset the bitmap for MSRs 0x800 - 0x83f. Leave AMD's uber-extended in vmx_update_msr_bitmap_x2apic()
4031 * mode, only the current timer count needs on-demand emulation by KVM. in vmx_update_msr_bitmap_x2apic()
4034 msr_bitmap[read_idx] = ~kvm_lapic_readable_reg_mask(vcpu->arch.apic); in vmx_update_msr_bitmap_x2apic()
4058 bool flag = !(vmx->pt_desc.guest.ctl & RTIT_CTL_TRACEEN); in pt_update_intercept_for_msr()
4065 for (i = 0; i < vmx->pt_desc.num_address_ranges; i++) { in pt_update_intercept_for_msr()
4085 if (kvm_cstate_in_guest(vcpu->kvm)) { in vmx_recalc_msr_intercepts()
4091 if (kvm_aperfmperf_in_guest(vcpu->kvm)) { in vmx_recalc_msr_intercepts()
4100 if (vcpu->arch.xfd_no_write_intercept) in vmx_recalc_msr_intercepts()
4104 !to_vmx(vcpu)->spec_ctrl); in vmx_recalc_msr_intercepts()
4119 * x2APIC and LBR MSR intercepts are modified on-demand and cannot be in vmx_recalc_msr_intercepts()
4131 * and freed, and must not be accessed outside of vcpu->mutex. The in vmx_deliver_nested_posted_interrupt()
4137 vector == vmx->nested.posted_intr_nv) { in vmx_deliver_nested_posted_interrupt()
4142 vmx->nested.pi_pending = true; in vmx_deliver_nested_posted_interrupt()
4146 * This pairs with the smp_mb_*() after setting vcpu->mode in in vmx_deliver_nested_posted_interrupt()
4149 * vcpu->mode != IN_GUEST_MODE. The extra barrier is needed as in vmx_deliver_nested_posted_interrupt()
4153 * vcpu->requests and the load from vcpu->mode. in vmx_deliver_nested_posted_interrupt()
4161 return -1; in vmx_deliver_nested_posted_interrupt()
4165 * 1. If target vcpu is running(non-root mode), send posted interrupt
4179 /* Note, this is called iff the local APIC is in-kernel. */ in vmx_deliver_posted_interrupt()
4180 if (!vcpu->arch.apic->apicv_active) in vmx_deliver_posted_interrupt()
4181 return -1; in vmx_deliver_posted_interrupt()
4183 __vmx_deliver_posted_interrupt(vcpu, &vt->pi_desc, vector); in vmx_deliver_posted_interrupt()
4190 struct kvm_vcpu *vcpu = apic->vcpu; in vmx_deliver_interrupt()
4197 trace_kvm_apicv_accept_irq(vcpu->vcpu_id, delivery_mode, in vmx_deliver_interrupt()
4203 * Set up the vmcs's constant host-state fields, i.e., host-state fields that
4205 * Note that host-state that does change is set elsewhere. E.g., host-state
4224 vmx->loaded_vmcs->host_state.cr3 = cr3; in vmx_set_constant_host_state()
4229 vmx->loaded_vmcs->host_state.cr4 = cr4; in vmx_set_constant_host_state()
4255 * SYSENTER is used for 32-bit system calls on either 32-bit or in vmx_set_constant_host_state()
4256 * 64-bit kernels. It is always zero If neither is allowed, otherwise in vmx_set_constant_host_state()
4257 * vmx_vcpu_load_vmcs loads it with the per-CPU entry stack (and may in vmx_set_constant_host_state()
4277 struct kvm_vcpu *vcpu = &vmx->vcpu; in set_cr4_guest_host_mask()
4279 vcpu->arch.cr4_guest_owned_bits = KVM_POSSIBLE_CR4_GUEST_BITS & in set_cr4_guest_host_mask()
4280 ~vcpu->arch.cr4_guest_rsvd_bits; in set_cr4_guest_host_mask()
4282 vcpu->arch.cr4_guest_owned_bits &= ~X86_CR4_TLBFLUSH_BITS; in set_cr4_guest_host_mask()
4283 vcpu->arch.cr4_guest_owned_bits &= ~X86_CR4_PDPTR_BITS; in set_cr4_guest_host_mask()
4285 if (is_guest_mode(&vmx->vcpu)) in set_cr4_guest_host_mask()
4286 vcpu->arch.cr4_guest_owned_bits &= in set_cr4_guest_host_mask()
4287 ~get_vmcs12(vcpu)->cr4_guest_host_mask; in set_cr4_guest_host_mask()
4288 vmcs_writel(CR4_GUEST_HOST_MASK, ~vcpu->arch.cr4_guest_owned_bits); in set_cr4_guest_host_mask()
4295 if (!kvm_vcpu_apicv_active(&vmx->vcpu)) in vmx_pin_based_exec_ctrl()
4348 vmx->nested.update_vmcs01_apicv_status = true; in vmx_refresh_apicv_exec_ctrl()
4388 if (vmx->vcpu.arch.switch_db_regs & KVM_DEBUGREG_WONT_EXIT) in vmx_exec_control()
4391 if (!cpu_need_tpr_shadow(&vmx->vcpu)) in vmx_exec_control()
4407 if (kvm_mwait_in_guest(vmx->vcpu.kvm)) in vmx_exec_control()
4410 if (kvm_hlt_in_guest(vmx->vcpu.kvm)) in vmx_exec_control()
4423 if (!enable_ipiv || !kvm_vcpu_apicv_active(&vmx->vcpu)) in vmx_tertiary_exec_control()
4439 * If the control is for an opt-in feature, clear the control if the in vmx_adjust_secondary_exec_control()
4441 * control is opt-out, i.e. an exiting control, clear the control if in vmx_adjust_secondary_exec_control()
4443 * disabled for the associated instruction. Note, the caller is in vmx_adjust_secondary_exec_control()
4454 kvm_check_has_quirk(vmx->vcpu.kvm, KVM_X86_QUIRK_STUFF_FEATURE_MSRS)) { in vmx_adjust_secondary_exec_control()
4463 vmx->nested.msrs.secondary_ctls_high |= control; in vmx_adjust_secondary_exec_control()
4465 vmx->nested.msrs.secondary_ctls_high &= ~control; in vmx_adjust_secondary_exec_control()
4476 struct kvm_vcpu *__vcpu = &(vmx)->vcpu; \
4486 /* More macro magic for ENABLE_/opt-in versus _EXITING/opt-out controls. */
4495 struct kvm_vcpu *vcpu = &vmx->vcpu; in vmx_secondary_exec_control()
4503 if (vmx->vpid == 0) in vmx_secondary_exec_control()
4512 if (kvm_pause_in_guest(vmx->vcpu.kvm)) in vmx_secondary_exec_control()
4525 /* SECONDARY_EXEC_DESC is enabled/disabled on writes to CR4.UMIP, in vmx_secondary_exec_control()
4537 * PML is enabled/disabled when dirty logging of memsmlots changes, but in vmx_secondary_exec_control()
4541 if (!enable_pml || !atomic_read(&vcpu->kvm->nr_memslots_dirty_logging)) in vmx_secondary_exec_control()
4572 if (!vcpu->kvm->arch.bus_lock_detection_enabled) in vmx_secondary_exec_control()
4575 if (!kvm_notify_vmexit_enabled(vcpu->kvm)) in vmx_secondary_exec_control()
4583 return get_order(kvm->arch.max_vcpu_ids * sizeof(*to_kvm_vmx(kvm)->pid_table)); in vmx_get_pid_table_order()
4594 if (kvm_vmx->pid_table) in vmx_alloc_ipiv_pid_table()
4600 return -ENOMEM; in vmx_alloc_ipiv_pid_table()
4602 kvm_vmx->pid_table = (void *)page_address(pages); in vmx_alloc_ipiv_pid_table()
4615 struct kvm *kvm = vmx->vcpu.kvm; in init_vmcs()
4622 vmcs_write64(MSR_BITMAP, __pa(vmx->vmcs01.msr_bitmap)); in init_vmcs()
4633 if (vmx->ve_info) in init_vmcs()
4635 __pa(vmx->ve_info)); in init_vmcs()
4641 if (enable_apicv && lapic_in_kernel(&vmx->vcpu)) { in init_vmcs()
4650 vmcs_write64(POSTED_INTR_DESC_ADDR, __pa((&vmx->vt.pi_desc))); in init_vmcs()
4653 if (vmx_can_use_ipiv(&vmx->vcpu)) { in init_vmcs()
4654 vmcs_write64(PID_POINTER_TABLE, __pa(kvm_vmx->pid_table)); in init_vmcs()
4655 vmcs_write16(LAST_PID_POINTER_INDEX, kvm->arch.max_vcpu_ids - 1); in init_vmcs()
4660 vmx->ple_window = ple_window; in init_vmcs()
4661 vmx->ple_window_dirty = true; in init_vmcs()
4665 vmcs_write32(NOTIFY_WINDOW, kvm->arch.notify_window); in init_vmcs()
4682 vmcs_write64(VM_EXIT_MSR_LOAD_ADDR, __pa(vmx->msr_autoload.host.val)); in init_vmcs()
4684 vmcs_write64(VM_ENTRY_MSR_LOAD_ADDR, __pa(vmx->msr_autoload.guest.val)); in init_vmcs()
4687 vmcs_write64(GUEST_IA32_PAT, vmx->vcpu.arch.pat); in init_vmcs()
4694 vmx->vcpu.arch.cr0_guest_owned_bits = vmx_l1_guest_owned_cr0_bits(); in init_vmcs()
4695 vmcs_writel(CR0_GUEST_HOST_MASK, ~vmx->vcpu.arch.cr0_guest_owned_bits); in init_vmcs()
4699 if (vmx->vpid != 0) in init_vmcs()
4700 vmcs_write16(VIRTUAL_PROCESSOR_ID, vmx->vpid); in init_vmcs()
4706 vmcs_write64(PML_ADDRESS, page_to_phys(vmx->pml_pg)); in init_vmcs()
4710 vmx_write_encls_bitmap(&vmx->vcpu, NULL); in init_vmcs()
4713 memset(&vmx->pt_desc, 0, sizeof(vmx->pt_desc)); in init_vmcs()
4715 vmx->pt_desc.guest.output_mask = 0x7F; in init_vmcs()
4723 vmx_guest_debugctl_write(&vmx->vcpu, 0); in init_vmcs()
4727 if (cpu_need_tpr_shadow(&vmx->vcpu)) in init_vmcs()
4729 __pa(vmx->vcpu.arch.apic->regs)); in init_vmcs()
4743 kvm_check_has_quirk(vcpu->kvm, KVM_X86_QUIRK_STUFF_FEATURE_MSRS)) in __vmx_vcpu_reset()
4744 memcpy(&vmx->nested.msrs, &vmcs_config.nested, sizeof(vmx->nested.msrs)); in __vmx_vcpu_reset()
4748 vmx->nested.posted_intr_nv = -1; in __vmx_vcpu_reset()
4749 vmx->nested.vmxon_ptr = INVALID_GPA; in __vmx_vcpu_reset()
4750 vmx->nested.current_vmptr = INVALID_GPA; in __vmx_vcpu_reset()
4753 vmx->nested.hv_evmcs_vmptr = EVMPTR_INVALID; in __vmx_vcpu_reset()
4756 if (kvm_check_has_quirk(vcpu->kvm, KVM_X86_QUIRK_STUFF_FEATURE_MSRS)) in __vmx_vcpu_reset()
4757 vcpu->arch.microcode_version = 0x100000000ULL; in __vmx_vcpu_reset()
4758 vmx->msr_ia32_feature_control_valid_bits = FEAT_CTL_LOCKED; in __vmx_vcpu_reset()
4764 vmx->vt.pi_desc.nv = POSTED_INTR_VECTOR; in __vmx_vcpu_reset()
4765 __pi_set_sn(&vmx->vt.pi_desc); in __vmx_vcpu_reset()
4775 vmx->rmode.vm86_active = 0; in vmx_vcpu_reset()
4776 vmx->spec_ctrl = 0; in vmx_vcpu_reset()
4778 vmx->msr_ia32_umwait_control = 0; in vmx_vcpu_reset()
4780 vmx->hv_deadline_tsc = -1; in vmx_vcpu_reset()
4822 vpid_sync_context(vmx->vpid); in vmx_vcpu_reset()
4847 int irq = vcpu->arch.interrupt.nr; in vmx_inject_irq()
4849 trace_kvm_inj_virq(irq, vcpu->arch.interrupt.soft, reinjected); in vmx_inject_irq()
4851 ++vcpu->stat.irq_injections; in vmx_inject_irq()
4852 if (vmx->rmode.vm86_active) { in vmx_inject_irq()
4854 if (vcpu->arch.interrupt.soft) in vmx_inject_irq()
4855 inc_eip = vcpu->arch.event_exit_inst_len; in vmx_inject_irq()
4860 if (vcpu->arch.interrupt.soft) { in vmx_inject_irq()
4863 vmx->vcpu.arch.event_exit_inst_len); in vmx_inject_irq()
4877 * Tracking the NMI-blocked state in software is built upon in vmx_inject_nmi()
4879 * well-behaving guests: They have to keep IRQs disabled at in vmx_inject_nmi()
4884 vmx->loaded_vmcs->soft_vnmi_blocked = 1; in vmx_inject_nmi()
4885 vmx->loaded_vmcs->vnmi_blocked_time = 0; in vmx_inject_nmi()
4888 ++vcpu->stat.nmi_injections; in vmx_inject_nmi()
4889 vmx->loaded_vmcs->nmi_known_unmasked = false; in vmx_inject_nmi()
4891 if (vmx->rmode.vm86_active) { in vmx_inject_nmi()
4908 return vmx->loaded_vmcs->soft_vnmi_blocked; in vmx_get_nmi_mask()
4909 if (vmx->loaded_vmcs->nmi_known_unmasked) in vmx_get_nmi_mask()
4912 vmx->loaded_vmcs->nmi_known_unmasked = !masked; in vmx_get_nmi_mask()
4921 if (vmx->loaded_vmcs->soft_vnmi_blocked != masked) { in vmx_set_nmi_mask()
4922 vmx->loaded_vmcs->soft_vnmi_blocked = masked; in vmx_set_nmi_mask()
4923 vmx->loaded_vmcs->vnmi_blocked_time = 0; in vmx_set_nmi_mask()
4926 vmx->loaded_vmcs->nmi_known_unmasked = !masked; in vmx_set_nmi_mask()
4941 if (!enable_vnmi && to_vmx(vcpu)->loaded_vmcs->soft_vnmi_blocked) in vmx_nmi_blocked()
4951 if (to_vmx(vcpu)->nested.nested_run_pending) in vmx_nmi_allowed()
4952 return -EBUSY; in vmx_nmi_allowed()
4954 /* An NMI must not be injected into L2 if it's supposed to VM-Exit. */ in vmx_nmi_allowed()
4956 return -EBUSY; in vmx_nmi_allowed()
4978 if (to_vmx(vcpu)->nested.nested_run_pending) in vmx_interrupt_allowed()
4979 return -EBUSY; in vmx_interrupt_allowed()
4982 * An IRQ must not be injected into L2 if it's supposed to VM-Exit, in vmx_interrupt_allowed()
4986 return -EBUSY; in vmx_interrupt_allowed()
4998 mutex_lock(&kvm->slots_lock); in vmx_set_tss_addr()
5001 mutex_unlock(&kvm->slots_lock); in vmx_set_tss_addr()
5006 to_kvm_vmx(kvm)->tss_addr = addr; in vmx_set_tss_addr()
5013 to_kvm_vmx(kvm)->ept_identity_map_addr = ident_addr; in vmx_set_identity_map_addr()
5025 to_vmx(vcpu)->vcpu.arch.event_exit_inst_len = in rmode_exception()
5027 if (vcpu->guest_debug & KVM_GUESTDBG_USE_SW_BP) in rmode_exception()
5031 return !(vcpu->guest_debug & in rmode_exception()
5055 if (vcpu->arch.halt_request) { in handle_rmode_exception()
5056 vcpu->arch.halt_request = 0; in handle_rmode_exception()
5080 * If the host has split lock detection disabled, then #AC is
5086 * - Guest CPL == 3 (user mode)
5087 * - Guest has #AC detection enabled in CR0
5088 * - Guest EFLAGS has AC bit set
5101 return vcpu->arch.guest_fpu.fpstate->xfd && in is_xfd_nm_fault()
5108 struct kvm_run *kvm_run = vcpu->run; in handle_exception_nmi()
5113 vect_info = vmx->idt_vectoring_info; in handle_exception_nmi()
5118 * vmx_vcpu_run() if a #MC occurs on VM-Entry. NMIs are handled by in handle_exception_nmi()
5132 is_xfd_nm_fault(vcpu) ? vcpu->arch.guest_fpu.xfd_err : 0); in handle_exception_nmi()
5140 struct vmx_ve_information *ve_info = vmx->ve_info; in handle_exception_nmi()
5142 WARN_ONCE(ve_info->exit_reason != EXIT_REASON_EPT_VIOLATION, in handle_exception_nmi()
5143 "Unexpected #VE on VM-Exit reason 0x%x", ve_info->exit_reason); in handle_exception_nmi()
5145 kvm_mmu_print_sptes(vcpu, ve_info->guest_physical_address, "#VE"); in handle_exception_nmi()
5153 if (!vmx->rmode.vm86_active && is_gp_fault(intr_info)) { in handle_exception_nmi()
5158 * IN{S}, OUT{S}, and RDPMC, none of which generate a non-zero in handle_exception_nmi()
5175 vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR; in handle_exception_nmi()
5176 vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_SIMUL_EX; in handle_exception_nmi()
5177 vcpu->run->internal.ndata = 4; in handle_exception_nmi()
5178 vcpu->run->internal.data[0] = vect_info; in handle_exception_nmi()
5179 vcpu->run->internal.data[1] = intr_info; in handle_exception_nmi()
5180 vcpu->run->internal.data[2] = error_code; in handle_exception_nmi()
5181 vcpu->run->internal.data[3] = vcpu->arch.last_vmentry_cpu; in handle_exception_nmi()
5187 if (enable_ept && !vcpu->arch.apf.host_apf_flags) { in handle_exception_nmi()
5201 if (vmx->rmode.vm86_active && rmode_exception(vcpu, ex_no)) in handle_exception_nmi()
5207 if (!(vcpu->guest_debug & in handle_exception_nmi()
5211 * instruction. ICEBP generates a trap-like #DB, but in handle_exception_nmi()
5213 * is an instruction intercept, i.e. the VM-Exit occurs in handle_exception_nmi()
5215 * avoid single-step #DB and MTF updates, as ICEBP is in handle_exception_nmi()
5220 * if single-step is enabled in RFLAGS and STI or MOVSS in handle_exception_nmi()
5222 * on VM-Exit due to #DB interception. VM-Entry has a in handle_exception_nmi()
5223 * consistency check that a single-step #DB is pending in handle_exception_nmi()
5227 * delay when activating single-step breakpoints must in handle_exception_nmi()
5229 * as appropriate for all other VM-Exits types. in handle_exception_nmi()
5242 kvm_run->debug.arch.dr6 = dr6 | DR6_ACTIVE_LOW; in handle_exception_nmi()
5243 kvm_run->debug.arch.dr7 = vmcs_readl(GUEST_DR7); in handle_exception_nmi()
5247 * Update instruction length as we may reinject #BP from in handle_exception_nmi()
5251 vmx->vcpu.arch.event_exit_inst_len = in handle_exception_nmi()
5253 kvm_run->exit_reason = KVM_EXIT_DEBUG; in handle_exception_nmi()
5254 kvm_run->debug.arch.pc = kvm_get_linear_rip(vcpu); in handle_exception_nmi()
5255 kvm_run->debug.arch.exception = ex_no; in handle_exception_nmi()
5272 kvm_run->exit_reason = KVM_EXIT_EXCEPTION; in handle_exception_nmi()
5273 kvm_run->ex.exception = ex_no; in handle_exception_nmi()
5274 kvm_run->ex.error_code = error_code; in handle_exception_nmi()
5282 ++vcpu->stat.irq_exits; in handle_external_interrupt()
5288 vcpu->run->exit_reason = KVM_EXIT_SHUTDOWN; in handle_triple_fault()
5289 vcpu->mmio_needed = 0; in handle_triple_fault()
5302 ++vcpu->stat.io_exits; in handle_io()
5324 /* called to set cr0 as appropriate for a mov-to-cr0 exit. */
5336 * hardware. It consists of the L2-owned bits from the new in handle_set_cr0()
5337 * value combined with the L1-owned bits from L1's guest_cr0. in handle_set_cr0()
5339 val = (val & ~vmcs12->cr0_guest_host_mask) | in handle_set_cr0()
5340 (vmcs12->guest_cr0 & vmcs12->cr0_guest_host_mask); in handle_set_cr0()
5358 val = (val & ~vmcs12->cr4_guest_host_mask) | in handle_set_cr4()
5359 (vmcs12->guest_cr4 & vmcs12->cr4_guest_host_mask); in handle_set_cr4()
5418 * KVM_GUESTDBG_SINGLESTEP-triggered in handle_cr()
5421 vcpu->run->exit_reason = KVM_EXIT_SET_TPR; in handle_cr()
5427 KVM_BUG(1, vcpu->kvm, "Guest always owns CR0.TS"); in handle_cr()
5428 return -EIO; in handle_cr()
5454 vcpu->run->exit_reason = 0; in handle_cr()
5479 * As the vm-exit takes precedence over the debug trap, we in handle_dr()
5483 if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) { in handle_dr()
5484 vcpu->run->debug.arch.dr6 = DR6_BD | DR6_ACTIVE_LOW; in handle_dr()
5485 vcpu->run->debug.arch.dr7 = dr7; in handle_dr()
5486 vcpu->run->debug.arch.pc = kvm_get_linear_rip(vcpu); in handle_dr()
5487 vcpu->run->debug.arch.exception = DB_VECTOR; in handle_dr()
5488 vcpu->run->exit_reason = KVM_EXIT_DEBUG; in handle_dr()
5496 if (vcpu->guest_debug == 0) { in handle_dr()
5504 vcpu->arch.switch_db_regs |= KVM_DEBUGREG_WONT_EXIT; in handle_dr()
5522 get_debugreg(vcpu->arch.db[0], 0); in vmx_sync_dirty_debug_regs()
5523 get_debugreg(vcpu->arch.db[1], 1); in vmx_sync_dirty_debug_regs()
5524 get_debugreg(vcpu->arch.db[2], 2); in vmx_sync_dirty_debug_regs()
5525 get_debugreg(vcpu->arch.db[3], 3); in vmx_sync_dirty_debug_regs()
5526 get_debugreg(vcpu->arch.dr6, 6); in vmx_sync_dirty_debug_regs()
5527 vcpu->arch.dr7 = vmcs_readl(GUEST_DR7); in vmx_sync_dirty_debug_regs()
5529 vcpu->arch.switch_db_regs &= ~KVM_DEBUGREG_WONT_EXIT; in vmx_sync_dirty_debug_regs()
5556 ++vcpu->stat.irq_window_exits; in handle_interrupt_window()
5578 * not cared. So make a short-circuit here by avoiding in handle_apic_access()
5595 /* EOI-induced VM exit is trap-like and thus no need to adjust IP */ in handle_apic_eoi_induced()
5605 * APIC-write VM-Exit is trap-like, KVM doesn't need to advance RIP and in handle_apic_write()
5608 * the vAPIC page for the correct 16-byte chunk. KVM needs only to in handle_apic_write()
5626 idt_v = (vmx->idt_vectoring_info & VECTORING_INFO_VALID_MASK); in handle_task_switch()
5627 idt_index = (vmx->idt_vectoring_info & VECTORING_INFO_VECTOR_MASK); in handle_task_switch()
5628 type = (vmx->idt_vectoring_info & VECTORING_INFO_TYPE_MASK); in handle_task_switch()
5636 vcpu->arch.nmi_injected = false; in handle_task_switch()
5644 if (vmx->idt_vectoring_info & in handle_task_switch()
5670 type == INTR_TYPE_SOFT_INTR ? idt_index : -1, in handle_task_switch()
5685 if (!(to_vmx(vcpu)->idt_vectoring_info & VECTORING_INFO_VALID_MASK) && in handle_ept_violation()
5698 * would also use advanced VM-exit information for EPT violations to in handle_ept_violation()
5730 if (KVM_BUG_ON(!enable_vnmi, vcpu->kvm)) in handle_nmi_window()
5731 return -EIO; in handle_nmi_window()
5734 ++vcpu->stat.nmi_window_exits; in handle_nmi_window()
5742 * with unsrestricted guest mode disabled) and KVM can't faithfully emulate the
5749 if (!vmx->vt.emulation_required) in vmx_unhandleable_emulation_required()
5754 * nested VM-Enter is pending completion, as VM-Enter will VM-Fail if in vmx_unhandleable_emulation_required()
5755 * guest state is invalid and unrestricted guest is disabled, i.e. KVM in vmx_unhandleable_emulation_required()
5756 * should synthesize VM-Fail instead emulation L2 code. This path is in vmx_unhandleable_emulation_required()
5758 * performed the nested VM-Enter consistency checks. in vmx_unhandleable_emulation_required()
5760 if (vmx->nested.nested_run_pending) in vmx_unhandleable_emulation_required()
5765 * If emulation is required, KVM can't perform a successful VM-Enter to in vmx_unhandleable_emulation_required()
5768 return !vmx->rmode.vm86_active && in vmx_unhandleable_emulation_required()
5769 (kvm_is_exception_pending(vcpu) || vcpu->arch.exception.injected); in vmx_unhandleable_emulation_required()
5781 while (vmx->vt.emulation_required && count-- != 0) { in handle_invalid_guest_state()
5783 return handle_interrupt_window(&vmx->vcpu); in handle_invalid_guest_state()
5796 if (vcpu->arch.halt_request) { in handle_invalid_guest_state()
5797 vcpu->arch.halt_request = 0; in handle_invalid_guest_state()
5824 * Indicate a busy-waiting vcpu in spinlock. We do not enable the PAUSE
5825 * exiting, so only get here on cpu with PAUSE-Loop-Exiting.
5829 if (!kvm_pause_in_guest(vcpu->kvm)) in handle_pause()
5833 * Intel sdm vol3 ch-25.1.3 says: The "PAUSE-loop exiting" in handle_pause()
5834 * VM-execution control is ignored if CPL > 0. OTOH, KVM in handle_pause()
5882 trace_kvm_pml_full(vcpu->vcpu_id); in handle_pml_full()
5890 if (!(to_vmx(vcpu)->idt_vectoring_info & VECTORING_INFO_VALID_MASK) && in handle_pml_full()
5909 * In the *extremely* unlikely scenario that this is a spurious VM-Exit in handle_fastpath_preemption_timer()
5910 * due to the timer expiring while it was "soft" disabled, just eat the in handle_fastpath_preemption_timer()
5911 * exit and re-enter the guest. in handle_fastpath_preemption_timer()
5913 if (unlikely(vmx->loaded_vmcs->hv_timer_soft_disabled)) in handle_fastpath_preemption_timer()
5925 * expiration likely requires synthesizing a nested VM-Exit. in handle_fastpath_preemption_timer()
5937 * This non-fastpath handler is reached if and only if the preemption in handle_preemption_timer()
5960 * SGX virtualization is disabled. There is no software enable bit for in handle_encls()
5973 * VM-Exits. Unconditionally set the flag here and leave the handling to in handle_bus_lock_vmexit()
5976 to_vt(vcpu)->exit_reason.bus_lock_detected = true; in handle_bus_lock_vmexit()
5985 ++vcpu->stat.notify_window_exits; in handle_notify()
5995 if (vcpu->kvm->arch.notify_vmexit_flags & KVM_X86_NOTIFY_VMEXIT_USER || in handle_notify()
5997 vcpu->run->exit_reason = KVM_EXIT_NOTIFY; in handle_notify()
5998 vcpu->run->notify.flags = context_invalid ? in handle_notify()
6074 *reason = vmx->vt.exit_reason.full; in vmx_get_exit_info()
6076 if (!(vmx->vt.exit_reason.failed_vmentry)) { in vmx_get_exit_info()
6077 *info2 = vmx->idt_vectoring_info; in vmx_get_exit_info()
6101 if (vmx->pml_pg) { in vmx_destroy_pml_buffer()
6102 __free_page(vmx->pml_pg); in vmx_destroy_pml_buffer()
6103 vmx->pml_pg = NULL; in vmx_destroy_pml_buffer()
6132 pml_buf = page_address(vmx->pml_pg); in vmx_flush_pml_buffer()
6134 for (i = PML_HEAD_INDEX; i >= pml_tail_index; i--) { in vmx_flush_pml_buffer()
6138 WARN_ON(gpa & (PAGE_SIZE - 1)); in vmx_flush_pml_buffer()
6150 vmcs_read32(sel + GUEST_ES_AR_BYTES - GUEST_ES_SELECTOR), in vmx_dump_sel()
6151 vmcs_read32(sel + GUEST_ES_LIMIT - GUEST_ES_SELECTOR), in vmx_dump_sel()
6152 vmcs_readl(sel + GUEST_ES_BASE - GUEST_ES_SELECTOR)); in vmx_dump_sel()
6159 vmcs_readl(limit + GUEST_GDTR_BASE - GUEST_GDTR_LIMIT)); in vmx_dump_dtsel()
6168 for (i = 0, e = m->val; i < m->nr; ++i, ++e) in vmx_dump_msrs()
6169 pr_err(" %2d: msr=0x%08x value=0x%016llx\n", i, e->index, e->value); in vmx_dump_msrs()
6202 pr_err("VMCS %p, last attempted VM-entry on CPU %d\n", in dump_vmcs()
6203 vmx->loaded_vmcs->vmcs, vcpu->arch.last_vmentry_cpu); in dump_vmcs()
6234 efer_slot = vmx_find_loadstore_msr_slot(&vmx->msr_autoload.guest, MSR_EFER); in dump_vmcs()
6239 vmx->msr_autoload.guest.val[efer_slot].value); in dump_vmcs()
6242 vcpu->arch.efer | (EFER_LMA | EFER_LME)); in dump_vmcs()
6245 vcpu->arch.efer & ~(EFER_LMA | EFER_LME)); in dump_vmcs()
6264 vmx_dump_msrs("guest autoload", &vmx->msr_autoload.guest); in dump_vmcs()
6266 vmx_dump_msrs("guest autostore", &vmx->msr_autostore.guest); in dump_vmcs()
6297 vmx_dump_msrs("host autoload", &vmx->msr_autoload.host); in dump_vmcs()
6332 pr_err("APIC-access addr = 0x%016llx ", vmcs_read64(APIC_ACCESS_ADDR)); in dump_vmcs()
6333 pr_cont("virt-APIC addr = 0x%016llx\n", vmcs_read64(VIRTUAL_APIC_PAGE_ADDR)); in dump_vmcs()
6346 struct vmx_ve_information *ve_info = vmx->ve_info; in dump_vmcs()
6358 ve_info->exit_reason, ve_info->delivery, in dump_vmcs()
6359 ve_info->exit_qualification, in dump_vmcs()
6360 ve_info->guest_linear_address, in dump_vmcs()
6361 ve_info->guest_physical_address, ve_info->eptp_index); in dump_vmcs()
6373 u32 vectoring_info = vmx->idt_vectoring_info; in __vmx_handle_exit()
6388 * KVM should never reach this point with a pending nested VM-Enter. in __vmx_handle_exit()
6389 * More specifically, short-circuiting VM-Entry to emulate L2 due to in __vmx_handle_exit()
6391 * allowed a nested VM-Enter with an invalid vmcs12. More below. in __vmx_handle_exit()
6393 if (KVM_BUG_ON(vmx->nested.nested_run_pending, vcpu->kvm)) in __vmx_handle_exit()
6394 return -EIO; in __vmx_handle_exit()
6409 * address-translation-based dirty tracking (e.g. EPT write in __vmx_handle_exit()
6419 * operation, nested VM-Enter rejects any attempt to enter L2 in __vmx_handle_exit()
6428 if (vmx->vt.emulation_required) { in __vmx_handle_exit()
6438 if (vmx->vt.emulation_required) in __vmx_handle_exit()
6443 vcpu->run->exit_reason = KVM_EXIT_FAIL_ENTRY; in __vmx_handle_exit()
6444 vcpu->run->fail_entry.hardware_entry_failure_reason in __vmx_handle_exit()
6446 vcpu->run->fail_entry.cpu = vcpu->arch.last_vmentry_cpu; in __vmx_handle_exit()
6450 if (unlikely(vmx->fail)) { in __vmx_handle_exit()
6452 vcpu->run->exit_reason = KVM_EXIT_FAIL_ENTRY; in __vmx_handle_exit()
6453 vcpu->run->fail_entry.hardware_entry_failure_reason in __vmx_handle_exit()
6455 vcpu->run->fail_entry.cpu = vcpu->arch.last_vmentry_cpu; in __vmx_handle_exit()
6472 vmx->loaded_vmcs->soft_vnmi_blocked)) { in __vmx_handle_exit()
6474 vmx->loaded_vmcs->soft_vnmi_blocked = 0; in __vmx_handle_exit()
6475 } else if (vmx->loaded_vmcs->vnmi_blocked_time > 1000000000LL && in __vmx_handle_exit()
6476 vcpu->arch.nmi_pending) { in __vmx_handle_exit()
6479 * NMI-blocked window if the guest runs with IRQs in __vmx_handle_exit()
6480 * disabled. So we pull the trigger after 1 s of in __vmx_handle_exit()
6483 printk(KERN_WARNING "%s: Breaking out of NMI-blocked " in __vmx_handle_exit()
6485 __func__, vcpu->vcpu_id); in __vmx_handle_exit()
6486 vmx->loaded_vmcs->soft_vnmi_blocked = 0; in __vmx_handle_exit()
6521 vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR; in __vmx_handle_exit()
6522 vcpu->run->internal.suberror = in __vmx_handle_exit()
6524 vcpu->run->internal.ndata = 2; in __vmx_handle_exit()
6525 vcpu->run->internal.data[0] = exit_reason.full; in __vmx_handle_exit()
6526 vcpu->run->internal.data[1] = vcpu->arch.last_vmentry_cpu; in __vmx_handle_exit()
6540 vcpu->run->exit_reason = KVM_EXIT_X86_BUS_LOCK; in vmx_handle_exit()
6542 vcpu->run->flags |= KVM_RUN_X86_BUS_LOCK; in vmx_handle_exit()
6570 * Clear the per-vcpu flush bit, it gets set again if the vCPU in vmx_l1d_flush()
6575 flush_l1d = vcpu->arch.l1tf_flush_l1d; in vmx_l1d_flush()
6576 vcpu->arch.l1tf_flush_l1d = false; in vmx_l1d_flush()
6579 * Clear the per-cpu flush bit, it gets set again from in vmx_l1d_flush()
6589 vcpu->stat.l1d_flush++; in vmx_l1d_flush()
6628 tpr_threshold = (irr == -1 || tpr < irr) ? 0 : irr; in vmx_update_cr8_intercept()
6630 to_vmx(vcpu)->nested.l1_tpr_threshold = tpr_threshold; in vmx_update_cr8_intercept()
6649 vmx->nested.change_vmcs01_virtual_apic_mode = true; in vmx_set_virtual_apic_mode()
6672 * the guest may have inserted a non-APIC mapping into in vmx_set_virtual_apic_mode()
6673 * the TLB while the APIC access page was disabled. in vmx_set_virtual_apic_mode()
6692 struct kvm *kvm = vcpu->kvm; in vmx_set_apic_access_page_addr()
6702 to_vmx(vcpu)->nested.reload_vmcs01_apic_access_page = true; in vmx_set_apic_access_page_addr()
6717 if (!slot || slot->flags & KVM_MEMSLOT_INVALID) in vmx_set_apic_access_page_addr()
6726 mmu_seq = kvm->mmu_invalidate_seq; in vmx_set_apic_access_page_addr()
6731 * controls the APIC-access page memslot, and only deletes the memslot in vmx_set_apic_access_page_addr()
6738 read_lock(&vcpu->kvm->mmu_lock); in vmx_set_apic_access_page_addr()
6757 read_unlock(&vcpu->kvm->mmu_lock); in vmx_set_apic_access_page_addr()
6770 * VM-Exit, otherwise L1 with run with a stale SVI. in vmx_hwapic_isr_update()
6777 * that VID is disabled if and only if the vCPU is in KVM_RUN in vmx_hwapic_isr_update()
6780 WARN_ON_ONCE(vcpu->wants_to_run && in vmx_hwapic_isr_update()
6782 to_vmx(vcpu)->nested.update_vmcs01_hwapic_isr = true; in vmx_hwapic_isr_update()
6786 if (max_isr == -1) in vmx_hwapic_isr_update()
6803 if (vector == -1) in vmx_set_rvi()
6821 if (KVM_BUG_ON(!enable_apicv, vcpu->kvm)) in vmx_sync_pir_to_irr()
6822 return -EIO; in vmx_sync_pir_to_irr()
6824 if (pi_test_on(&vt->pi_desc)) { in vmx_sync_pir_to_irr()
6825 pi_clear_on(&vt->pi_desc); in vmx_sync_pir_to_irr()
6832 kvm_apic_update_irr(vcpu, vt->pi_desc.pir, &max_irr); in vmx_sync_pir_to_irr()
6841 * disabled in two cases: in vmx_sync_pir_to_irr()
6845 * VM-Exit to L1. If L1 doesn't want to exit, the interrupt is injected in vmx_sync_pir_to_irr()
6849 * 2) If APICv is disabled for this vCPU, assigned devices may still in vmx_sync_pir_to_irr()
6851 * a VM-Exit and the subsequent entry will call sync_pir_to_irr. in vmx_sync_pir_to_irr()
6884 * XFD_ERR is not modified for non-XFD #NM, i.e. if CR0.TS=1. in handle_nm_fault_irqoff()
6891 rdmsrq(MSR_IA32_XFD_ERR, vcpu->arch.guest_fpu.xfd_err); in handle_nm_fault_irqoff()
6898 vcpu->arch.apf.host_apf_flags = kvm_read_and_reset_apf_flags(); in handle_exception_irqoff()
6912 if (KVM_BUG(!is_external_intr(intr_info), vcpu->kvm, in handle_external_interrupt_irqoff()
6913 "unexpected VM-Exit interrupt info: 0x%x", intr_info)) in handle_external_interrupt_irqoff()
6923 vcpu->arch.at_instruction_boundary = true; in handle_external_interrupt_irqoff()
6928 if (to_vt(vcpu)->emulation_required) in vmx_handle_exit_irqoff()
6970 idtv_info_valid = vmx->idt_vectoring_info & VECTORING_INFO_VALID_MASK; in vmx_recover_nmi_blocking()
6973 if (vmx->loaded_vmcs->nmi_known_unmasked) in vmx_recover_nmi_blocking()
6976 exit_intr_info = vmx_get_intr_info(&vmx->vcpu); in vmx_recover_nmi_blocking()
6981 * Re-set bit "block by NMI" before VM entry if vmexit caused by in vmx_recover_nmi_blocking()
6985 * If the VM exit sets the valid bit in the IDT-vectoring in vmx_recover_nmi_blocking()
6994 vmx->loaded_vmcs->nmi_known_unmasked = in vmx_recover_nmi_blocking()
6997 } else if (unlikely(vmx->loaded_vmcs->soft_vnmi_blocked)) in vmx_recover_nmi_blocking()
6998 vmx->loaded_vmcs->vnmi_blocked_time += in vmx_recover_nmi_blocking()
7000 vmx->loaded_vmcs->entry_time)); in vmx_recover_nmi_blocking()
7014 vcpu->arch.nmi_injected = false; in __vmx_complete_interrupts()
7028 vcpu->arch.nmi_injected = true; in __vmx_complete_interrupts()
7037 vcpu->arch.event_exit_inst_len = vmcs_read32(instr_len_field); in __vmx_complete_interrupts()
7051 vcpu->arch.event_exit_inst_len = vmcs_read32(instr_len_field); in __vmx_complete_interrupts()
7063 __vmx_complete_interrupts(&vmx->vcpu, vmx->idt_vectoring_info, in vmx_complete_interrupts()
7082 struct kvm_pmu *pmu = vcpu_to_pmu(&vmx->vcpu); in atomic_switch_perf_msrs()
7084 pmu->host_cross_mapped_mask = 0; in atomic_switch_perf_msrs()
7085 if (pmu->pebs_enable & pmu->global_ctrl) in atomic_switch_perf_msrs()
7109 vmx->loaded_vmcs->hv_timer_soft_disabled = false; in vmx_update_hv_timer()
7110 } else if (vmx->hv_deadline_tsc != -1) { in vmx_update_hv_timer()
7112 if (vmx->hv_deadline_tsc > tscl) in vmx_update_hv_timer()
7113 /* set_hv_timer ensures the delta fits in 32-bits */ in vmx_update_hv_timer()
7114 delta_tsc = (u32)((vmx->hv_deadline_tsc - tscl) >> in vmx_update_hv_timer()
7120 vmx->loaded_vmcs->hv_timer_soft_disabled = false; in vmx_update_hv_timer()
7121 } else if (!vmx->loaded_vmcs->hv_timer_soft_disabled) { in vmx_update_hv_timer()
7122 vmcs_write32(VMX_PREEMPTION_TIMER_VALUE, -1); in vmx_update_hv_timer()
7123 vmx->loaded_vmcs->hv_timer_soft_disabled = true; in vmx_update_hv_timer()
7129 if (unlikely(host_rsp != vmx->loaded_vmcs->host_state.rsp)) { in vmx_update_host_rsp()
7130 vmx->loaded_vmcs->host_state.rsp = host_rsp; in vmx_update_host_rsp()
7144 vmx->spec_ctrl = native_rdmsrq(MSR_IA32_SPEC_CTRL); in vmx_spec_ctrl_restore_host()
7154 vmx->spec_ctrl != hostval) in vmx_spec_ctrl_restore_host()
7222 if (vcpu->arch.cr2 != native_read_cr2()) in vmx_vcpu_enter_exit()
7223 native_write_cr2(vcpu->arch.cr2); in vmx_vcpu_enter_exit()
7225 vmx->fail = __vmx_vcpu_run(vmx, (unsigned long *)&vcpu->arch.regs, in vmx_vcpu_enter_exit()
7228 vcpu->arch.cr2 = native_read_cr2(); in vmx_vcpu_enter_exit()
7229 vcpu->arch.regs_avail &= ~VMX_REGS_LAZY_LOAD_SET; in vmx_vcpu_enter_exit()
7231 vmx->idt_vectoring_info = 0; in vmx_vcpu_enter_exit()
7235 if (unlikely(vmx->fail)) { in vmx_vcpu_enter_exit()
7236 vmx->vt.exit_reason.full = 0xdead; in vmx_vcpu_enter_exit()
7240 vmx->vt.exit_reason.full = vmcs_read32(VM_EXIT_REASON); in vmx_vcpu_enter_exit()
7242 vmx->idt_vectoring_info = vmcs_read32(IDT_VECTORING_INFO_FIELD); in vmx_vcpu_enter_exit()
7258 vmx->loaded_vmcs->soft_vnmi_blocked)) in vmx_vcpu_run()
7259 vmx->loaded_vmcs->entry_time = ktime_get(); in vmx_vcpu_run()
7264 * consistency check VM-Exit due to invalid guest state and bail. in vmx_vcpu_run()
7266 if (unlikely(vmx->vt.emulation_required)) { in vmx_vcpu_run()
7267 vmx->fail = 0; in vmx_vcpu_run()
7269 vmx->vt.exit_reason.full = EXIT_REASON_INVALID_STATE; in vmx_vcpu_run()
7270 vmx->vt.exit_reason.failed_vmentry = 1; in vmx_vcpu_run()
7272 vmx->vt.exit_qualification = ENTRY_FAIL_DEFAULT; in vmx_vcpu_run()
7274 vmx->vt.exit_intr_info = 0; in vmx_vcpu_run()
7280 if (vmx->ple_window_dirty) { in vmx_vcpu_run()
7281 vmx->ple_window_dirty = false; in vmx_vcpu_run()
7282 vmcs_write32(PLE_WINDOW, vmx->ple_window); in vmx_vcpu_run()
7289 WARN_ON_ONCE(vmx->nested.need_vmcs12_to_shadow_sync); in vmx_vcpu_run()
7292 vmcs_writel(GUEST_RSP, vcpu->arch.regs[VCPU_REGS_RSP]); in vmx_vcpu_run()
7294 vmcs_writel(GUEST_RIP, vcpu->arch.regs[VCPU_REGS_RIP]); in vmx_vcpu_run()
7295 vcpu->arch.regs_dirty = 0; in vmx_vcpu_run()
7298 set_debugreg(vcpu->arch.dr6, 6); in vmx_vcpu_run()
7305 * prior to VM-Enter, as the kernel may load a new ASID (PCID) any time in vmx_vcpu_run()
7306 * it switches back to the current->mm, which can occur in KVM context in vmx_vcpu_run()
7308 * toggles a static key while handling a VM-Exit. in vmx_vcpu_run()
7311 if (unlikely(cr3 != vmx->loaded_vmcs->host_state.cr3)) { in vmx_vcpu_run()
7313 vmx->loaded_vmcs->host_state.cr3 = cr3; in vmx_vcpu_run()
7317 if (unlikely(cr4 != vmx->loaded_vmcs->host_state.cr4)) { in vmx_vcpu_run()
7319 vmx->loaded_vmcs->host_state.cr4 = cr4; in vmx_vcpu_run()
7322 /* When single-stepping over STI and MOV SS, we must clear the in vmx_vcpu_run()
7327 if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP) in vmx_vcpu_run()
7341 smp_send_reschedule(vcpu->cpu); in vmx_vcpu_run()
7350 current_evmcs->hv_clean_fields |= in vmx_vcpu_run()
7353 current_evmcs->hv_vp_id = kvm_hv_get_vpindex(vcpu); in vmx_vcpu_run()
7357 if (vcpu->arch.host_debugctl) in vmx_vcpu_run()
7358 update_debugctlmsr(vcpu->arch.host_debugctl); in vmx_vcpu_run()
7382 if (vmx->nested.nested_run_pending && in vmx_vcpu_run()
7384 ++vcpu->stat.nested_run; in vmx_vcpu_run()
7386 vmx->nested.nested_run_pending = 0; in vmx_vcpu_run()
7389 if (unlikely(vmx->fail)) in vmx_vcpu_run()
7400 vmx->loaded_vmcs->launched = 1; in vmx_vcpu_run()
7414 free_vpid(vmx->vpid); in vmx_vcpu_free()
7416 free_loaded_vmcs(vmx->loaded_vmcs); in vmx_vcpu_free()
7417 free_page((unsigned long)vmx->ve_info); in vmx_vcpu_free()
7429 INIT_LIST_HEAD(&vmx->vt.pi_wakeup_list); in vmx_vcpu_create()
7431 err = -ENOMEM; in vmx_vcpu_create()
7433 vmx->vpid = allocate_vpid(); in vmx_vcpu_create()
7442 vmx->pml_pg = alloc_page(GFP_KERNEL_ACCOUNT | __GFP_ZERO); in vmx_vcpu_create()
7443 if (!vmx->pml_pg) in vmx_vcpu_create()
7448 vmx->guest_uret_msrs[i].mask = -1ull; in vmx_vcpu_create()
7457 tsx_ctrl->mask = ~(u64)TSX_CTRL_CPUID_CLEAR; in vmx_vcpu_create()
7460 err = alloc_loaded_vmcs(&vmx->vmcs01); in vmx_vcpu_create()
7465 * Use Hyper-V 'Enlightened MSR Bitmap' feature when KVM runs as a in vmx_vcpu_create()
7466 * nested (L1) hypervisor and Hyper-V in L0 supports it. Enable the in vmx_vcpu_create()
7472 struct hv_enlightened_vmcs *evmcs = (void *)vmx->vmcs01.vmcs; in vmx_vcpu_create()
7474 evmcs->hv_enlightenments_control.msr_bitmap = 1; in vmx_vcpu_create()
7477 vmx->loaded_vmcs = &vmx->vmcs01; in vmx_vcpu_create()
7480 err = kvm_alloc_apic_access_page(vcpu->kvm); in vmx_vcpu_create()
7486 err = init_rmode_identity_map(vcpu->kvm); in vmx_vcpu_create()
7491 err = -ENOMEM; in vmx_vcpu_create()
7495 BUILD_BUG_ON(sizeof(*vmx->ve_info) > PAGE_SIZE); in vmx_vcpu_create()
7502 vmx->ve_info = page_to_virt(page); in vmx_vcpu_create()
7506 WRITE_ONCE(to_kvm_vmx(vcpu->kvm)->pid_table[vcpu->vcpu_id], in vmx_vcpu_create()
7507 __pa(&vmx->vt.pi_desc) | PID_TABLE_ENTRY_VALID); in vmx_vcpu_create()
7512 free_loaded_vmcs(vmx->loaded_vmcs); in vmx_vcpu_create()
7516 free_vpid(vmx->vpid); in vmx_vcpu_create()
7520 …nt and SMT on, data leak possible. See CVE-2018-3646 and https://www.kernel.org/doc/html/latest/ad…
7521 …tualization mitigation disabled, data leak possible. See CVE-2018-3646 and https://www.kernel.org/…
7554 kvm->arch.cpu_dirty_log_size = PML_LOG_NR_ENTRIES; in vmx_vm_init()
7561 * Non-coherent DMA devices need the guest to flush CPU properly. in vmx_ignore_guest_pat()
7579 if (vmx_ignore_guest_pat(vcpu->kvm)) in vmx_get_mt_mask()
7606 * (indicating "allowed-1") if they are supported in the guest's CPUID.
7613 vmx->nested.msrs.cr0_fixed1 = 0xffffffff; in nested_vmx_cr_fixed1_bits_update()
7614 vmx->nested.msrs.cr4_fixed1 = X86_CR4_PCE; in nested_vmx_cr_fixed1_bits_update()
7617 if (entry && (entry->_reg & (_cpuid_mask))) \ in nested_vmx_cr_fixed1_bits_update()
7618 vmx->nested.msrs.cr4_fixed1 |= (_cr4_mask); \ in nested_vmx_cr_fixed1_bits_update()
7661 vmx->pt_desc.caps[CPUID_EAX + i*PT_CPUID_REGS_NUM] = best->eax; in update_intel_pt_cfg()
7662 vmx->pt_desc.caps[CPUID_EBX + i*PT_CPUID_REGS_NUM] = best->ebx; in update_intel_pt_cfg()
7663 vmx->pt_desc.caps[CPUID_ECX + i*PT_CPUID_REGS_NUM] = best->ecx; in update_intel_pt_cfg()
7664 vmx->pt_desc.caps[CPUID_EDX + i*PT_CPUID_REGS_NUM] = best->edx; in update_intel_pt_cfg()
7668 vmx->pt_desc.num_address_ranges = intel_pt_validate_cap(vmx->pt_desc.caps, in update_intel_pt_cfg()
7672 vmx->pt_desc.ctl_bitmask = ~(RTIT_CTL_TRACEEN | RTIT_CTL_OS | in update_intel_pt_cfg()
7680 if (intel_pt_validate_cap(vmx->pt_desc.caps, PT_CAP_cr3_filtering)) in update_intel_pt_cfg()
7681 vmx->pt_desc.ctl_bitmask &= ~RTIT_CTL_CR3EN; in update_intel_pt_cfg()
7687 if (intel_pt_validate_cap(vmx->pt_desc.caps, PT_CAP_psb_cyc)) in update_intel_pt_cfg()
7688 vmx->pt_desc.ctl_bitmask &= ~(RTIT_CTL_CYCLEACC | in update_intel_pt_cfg()
7694 if (intel_pt_validate_cap(vmx->pt_desc.caps, PT_CAP_mtc)) in update_intel_pt_cfg()
7695 vmx->pt_desc.ctl_bitmask &= ~(RTIT_CTL_MTC_EN | in update_intel_pt_cfg()
7699 if (intel_pt_validate_cap(vmx->pt_desc.caps, PT_CAP_ptwrite)) in update_intel_pt_cfg()
7700 vmx->pt_desc.ctl_bitmask &= ~(RTIT_CTL_FUP_ON_PTW | in update_intel_pt_cfg()
7704 if (intel_pt_validate_cap(vmx->pt_desc.caps, PT_CAP_power_event_trace)) in update_intel_pt_cfg()
7705 vmx->pt_desc.ctl_bitmask &= ~RTIT_CTL_PWR_EVT_EN; in update_intel_pt_cfg()
7708 if (intel_pt_validate_cap(vmx->pt_desc.caps, PT_CAP_topa_output)) in update_intel_pt_cfg()
7709 vmx->pt_desc.ctl_bitmask &= ~RTIT_CTL_TOPA; in update_intel_pt_cfg()
7712 if (intel_pt_validate_cap(vmx->pt_desc.caps, PT_CAP_output_subsys)) in update_intel_pt_cfg()
7713 vmx->pt_desc.ctl_bitmask &= ~RTIT_CTL_FABRIC_EN; in update_intel_pt_cfg()
7716 for (i = 0; i < vmx->pt_desc.num_address_ranges; i++) in update_intel_pt_cfg()
7717 vmx->pt_desc.ctl_bitmask &= ~(0xfULL << (32 + i * 4)); in update_intel_pt_cfg()
7739 vmx->msr_ia32_feature_control_valid_bits |= in vmx_vcpu_after_set_cpuid()
7743 vmx->msr_ia32_feature_control_valid_bits &= in vmx_vcpu_after_set_cpuid()
7767 vmx->msr_ia32_feature_control_valid_bits |= FEAT_CTL_SGX_ENABLED; in vmx_vcpu_after_set_cpuid()
7769 vmx->msr_ia32_feature_control_valid_bits &= ~FEAT_CTL_SGX_ENABLED; in vmx_vcpu_after_set_cpuid()
7772 vmx->msr_ia32_feature_control_valid_bits |= in vmx_vcpu_after_set_cpuid()
7775 vmx->msr_ia32_feature_control_valid_bits &= in vmx_vcpu_after_set_cpuid()
7826 * 3. Ensure LBR MSRs cannot hold host data on VM-Entry with in vmx_get_perf_capabilities()
7899 * If the 'use IO bitmaps' VM-execution control is 0, IO instruction in vmx_is_io_intercepted()
7900 * VM-exits depend on the 'unconditional IO exiting' VM-execution in vmx_is_io_intercepted()
7903 * Otherwise, IO instruction VM-exits are controlled by the IO bitmaps. in vmx_is_io_intercepted()
7908 if (info->intercept == x86_intercept_in || in vmx_is_io_intercepted()
7909 info->intercept == x86_intercept_ins) { in vmx_is_io_intercepted()
7910 port = info->src_val; in vmx_is_io_intercepted()
7911 size = info->dst_bytes; in vmx_is_io_intercepted()
7912 imm = info->src_type == OP_IMM; in vmx_is_io_intercepted()
7914 port = info->dst_val; in vmx_is_io_intercepted()
7915 size = info->src_bytes; in vmx_is_io_intercepted()
7916 imm = info->dst_type == OP_IMM; in vmx_is_io_intercepted()
7920 *exit_qualification = ((unsigned long)port << 16) | (size - 1); in vmx_is_io_intercepted()
7922 if (info->intercept == x86_intercept_ins || in vmx_is_io_intercepted()
7923 info->intercept == x86_intercept_outs) in vmx_is_io_intercepted()
7926 if (info->rep_prefix) in vmx_is_io_intercepted()
7945 switch (info->intercept) { in vmx_check_intercept()
7954 exception->vector = UD_VECTOR; in vmx_check_intercept()
7955 exception->error_code_valid = false; in vmx_check_intercept()
7981 if (info->intercept == x86_intercept_lldt || in vmx_check_intercept()
7982 info->intercept == x86_intercept_ltr || in vmx_check_intercept()
7983 info->intercept == x86_intercept_sldt || in vmx_check_intercept()
7984 info->intercept == x86_intercept_str) in vmx_check_intercept()
8003 * PAUSE is a single-byte NOP with a REPE prefix, i.e. collides in vmx_check_intercept()
8006 * PAUSE-loop-exiting, software can't expect a given PAUSE to in vmx_check_intercept()
8010 if ((info->rep_prefix != REPE_PREFIX) || in vmx_check_intercept()
8022 exit_insn_len = abs_diff((s64)info->next_rip, (s64)info->rip); in vmx_check_intercept()
8036 u64 low = a << shift, high = a >> (64 - shift); in u64_shl_div_u64()
8055 struct kvm_timer *ktimer = &vcpu->arch.apic->lapic_timer; in vmx_set_hv_timer()
8060 delta_tsc = max(guest_deadline_tsc, guest_tscl) - guest_tscl; in vmx_set_hv_timer()
8062 ktimer->timer_advance_ns); in vmx_set_hv_timer()
8065 delta_tsc -= lapic_timer_advance_cycles; in vmx_set_hv_timer()
8070 if (vcpu->arch.l1_tsc_scaling_ratio != kvm_caps.default_tsc_scaling_ratio && in vmx_set_hv_timer()
8073 vcpu->arch.l1_tsc_scaling_ratio, &delta_tsc)) in vmx_set_hv_timer()
8074 return -ERANGE; in vmx_set_hv_timer()
8083 return -ERANGE; in vmx_set_hv_timer()
8085 vmx->hv_deadline_tsc = tscl + delta_tsc; in vmx_set_hv_timer()
8092 to_vmx(vcpu)->hv_deadline_tsc = -1; in vmx_cancel_hv_timer()
8104 vmx->nested.update_vmcs01_cpu_dirty_logging = true; in vmx_update_cpu_dirty_logging()
8113 if (atomic_read(&vcpu->kvm->nr_memslots_dirty_logging)) in vmx_update_cpu_dirty_logging()
8121 if (vcpu->arch.mcg_cap & MCG_LMCE_P) in vmx_setup_mce()
8122 to_vmx(vcpu)->msr_ia32_feature_control_valid_bits |= in vmx_setup_mce()
8125 to_vmx(vcpu)->msr_ia32_feature_control_valid_bits &= in vmx_setup_mce()
8133 if (to_vmx(vcpu)->nested.nested_run_pending) in vmx_smi_allowed()
8134 return -EBUSY; in vmx_smi_allowed()
8144 * SMI and RSM. Using the common VM-Exit + VM-Enter routines is wrong in vmx_enter_smm()
8146 * E.g. most MSRs are left untouched, but many are modified by VM-Exit in vmx_enter_smm()
8147 * and VM-Enter, and thus L2's values may be corrupted on SMI+RSM. in vmx_enter_smm()
8149 vmx->nested.smm.guest_mode = is_guest_mode(vcpu); in vmx_enter_smm()
8150 if (vmx->nested.smm.guest_mode) in vmx_enter_smm()
8151 nested_vmx_vmexit(vcpu, -1, 0, 0); in vmx_enter_smm()
8153 vmx->nested.smm.vmxon = vmx->nested.vmxon; in vmx_enter_smm()
8154 vmx->nested.vmxon = false; in vmx_enter_smm()
8164 if (vmx->nested.smm.vmxon) { in vmx_leave_smm()
8165 vmx->nested.vmxon = true; in vmx_leave_smm()
8166 vmx->nested.smm.vmxon = false; in vmx_leave_smm()
8169 if (vmx->nested.smm.guest_mode) { in vmx_leave_smm()
8174 vmx->nested.nested_run_pending = 1; in vmx_leave_smm()
8175 vmx->nested.smm.guest_mode = false; in vmx_leave_smm()
8188 return to_vmx(vcpu)->nested.vmxon && !is_guest_mode(vcpu); in vmx_apic_init_signal_blocked()
8194 struct hrtimer *timer = &to_vmx(vcpu)->nested.preemption_timer; in vmx_migrate_timers()
8215 free_pages((unsigned long)kvm_vmx->pid_table, vmx_get_pid_table_order(kvm)); in vmx_vm_destroy()
8255 * Untag the address by sign-extending the lam_bit, but NOT to bit 63. in vmx_get_untagged_addr()
8272 (unsigned long *)&vcpu->arch.pmu.global_status); in vmx_handle_intel_pt_intr()
8280 * Though SYSCALL is only supported in 64-bit mode on Intel CPUs, kvm in vmx_setup_user_return_msrs()
8307 * On pre-MKTME system, boot_cpu_data.x86_phys_bits equals to in vmx_setup_me_spte_mask()
8315 kvm_host.maxphyaddr - 1); in vmx_setup_me_spte_mask()
8337 return -EIO; in vmx_hardware_setup()
8364 return -EOPNOTSUPP; in vmx_hardware_setup()
8446 * and EPT A/D bit features are enabled -- PML depends on them to work. in vmx_hardware_setup()
8482 return -EINVAL; in vmx_hardware_setup()
8509 * On Intel CPUs that lack self-snoop feature, letting the guest control in vmx_hardware_setup()
8514 * On certain Intel CPUs (e.g. SPR, ICX), though self-snoop feature is in vmx_hardware_setup()
8522 * On top of this, non-coherent DMA devices need the guest to flush CPU in vmx_hardware_setup()
8558 return -EOPNOTSUPP; in vmx_init()