26  *		Ingo Molnar	:	Added APIC timers, based on code
77 #include <asm/apic.h>
184 	 * point before an INIT_deassert IPI reaches the local APIC, so it  in ap_starting()
185 	 * is now safe to touch the local APIC.  in ap_starting()
187 	 * Set up this CPU, first the APIC, which is probably redundant on  in ap_starting()
673 	/* Be paranoid about clearing APIC errors. */  in send_init_sequence()
709 	 * Determine this based on the APIC version.  in wakeup_secondary_cpu_via_init()
710 	 * If we don't have an integrated APIC, don't send the STARTUP IPIs.  in wakeup_secondary_cpu_via_init()
769 		pr_err("APIC never delivered???\n");  in wakeup_secondary_cpu_via_init()
771 		pr_err("APIC delivery error (%lx)\n", accept_status);  in wakeup_secondary_cpu_via_init()
810 		pr_info("Booting Node %d Processor %d APIC 0x%x\n",  in announce_cpu()
837  * NOTE - on most systems this is a PHYSICAL apic ID, but on multiquad
838  * (ie clustered apic addressing mode), this is a LOGICAL apic ID.
849 	if (apic->wakeup_secondary_cpu_64)  in do_boot_cpu()
878 		 * Be paranoid about clearing APIC errors.  in do_boot_cpu()
890 	 * - Use a method from the APIC driver if one defined, with wakeup  in do_boot_cpu()
893 	 * - Use an INIT boot APIC message  in do_boot_cpu()
895 	if (apic->wakeup_secondary_cpu_64)  in do_boot_cpu()
896 		ret = apic->wakeup_secondary_cpu_64(apicid, start_ip, cpu);  in do_boot_cpu()
897 	else if (apic->wakeup_secondary_cpu)  in do_boot_cpu()
898 		ret = apic->wakeup_secondary_cpu(apicid, start_ip, cpu);  in do_boot_cpu()
910 	u32 apicid = apic->cpu_present_to_apicid(cpu);  in native_kick_ap()
918 		pr_err("CPU %u has invalid APIC ID %x. Aborting bringup\n", cpu, apicid);  in native_kick_ap()
923 		pr_err("CPU %u APIC ID %x is not present. Aborting bringup\n", cpu, apicid);  in native_kick_ap()
1213          * Disable the local APIC. Otherwise IPI broadcasts will reach  in native_cpu_disable()
1217          * Disabling the APIC must happen after cpu_disable_common()  in native_cpu_disable()
1220          * Disabling the APIC preserves already set bits in IRR, but  in native_cpu_disable()
1221          * an interrupt arriving after disabling the local APIC does not  in native_cpu_disable()
1227          * IOW, interrupts arriving after disabling the local APIC will  in native_cpu_disable()