Lines Matching defs:fpstate
47 struct fpstate init_fpstate __ro_after_init;
123 if (fpu->fpstate->regs.xsave.header.xfeatures & AVX512_TRACKING_MASK)
128 * Save the FPU register state in fpu->fpstate->regs. The register state is
144 os_xsave(fpu->fpstate);
150 fxsave(&fpu->fpstate->regs.fxsave);
158 asm volatile("fnsave %[fp]; fwait" : [fp] "=m" (fpu->fpstate->regs.fsave));
159 frstor(&fpu->fpstate->regs.fsave);
162 void restore_fpregs_from_fpstate(struct fpstate *fpstate, u64 mask)
175 : : [addr] "m" (*fpstate));
192 * in fpstate::regs::xsave::xfeatures.
194 xfd_update_state(fpstate);
201 * So fpstate->xfeatures cannot be used here, because then
207 os_xrstor(fpstate, mask);
210 fxrstor(&fpstate->regs.fxsave);
212 frstor(&fpstate->regs.fsave);
222 static void __fpstate_reset(struct fpstate *fpstate);
236 /* First fpstate allocation locks down permissions. */
244 struct fpstate *fpstate;
247 size = guest_default_cfg.size + ALIGN(offsetof(struct fpstate, regs), 64);
249 fpstate = vzalloc(size);
250 if (!fpstate)
253 /* Initialize indicators to reflect properties of the fpstate */
254 fpstate->is_valloc = true;
255 fpstate->is_guest = true;
257 __fpstate_reset(fpstate);
258 fpstate_init_user(fpstate);
260 gfpu->fpstate = fpstate;
284 struct fpstate *fpstate = gfpu->fpstate;
286 if (!fpstate)
289 if (WARN_ON_ONCE(!fpstate->is_valloc || !fpstate->is_guest || fpstate->in_use))
292 gfpu->fpstate = NULL;
293 vfree(fpstate);
322 struct fpstate *fpstate = guest_fpu->fpstate;
339 fpstate->regs.xsave.header.xfeatures &= ~xfd;
341 fpstate->xfd = xfd;
342 if (fpstate->in_use)
343 xfd_update_state(fpstate);
363 struct fpstate *fpstate = x86_task_fpu(current)->fpstate;
367 rdmsrq(MSR_IA32_XFD, fpstate->xfd);
368 __this_cpu_write(xfd_state, fpstate->xfd);
376 struct fpstate *guest_fps = guest_fpu->fpstate;
378 struct fpstate *cur_fps = fpu->fpstate;
384 /* Swap fpstate */
387 fpu->fpstate = guest_fps;
391 fpu->fpstate = fpu->__task_fpstate;
395 cur_fps = fpu->fpstate;
404 * running with guest fpstate
418 struct fpstate *kstate = gfpu->fpstate;
437 struct fpstate *kstate = gfpu->fpstate;
537 static inline void fpstate_init_fxstate(struct fpstate *fpstate)
539 fpstate->regs.fxsave.cwd = 0x37f;
540 fpstate->regs.fxsave.mxcsr = MXCSR_DEFAULT;
544 * Legacy x87 fpstate state init:
546 static inline void fpstate_init_fstate(struct fpstate *fpstate)
548 fpstate->regs.fsave.cwd = 0xffff037fu;
549 fpstate->regs.fsave.swd = 0xffff0000u;
550 fpstate->regs.fsave.twd = 0xffffffffu;
551 fpstate->regs.fsave.fos = 0xffff0000u;
559 void fpstate_init_user(struct fpstate *fpstate)
561 xstate_init_xcomp_bv(&fpstate->regs.xsave, fpstate->xfeatures);
564 fpstate_init_fxstate(fpstate);
566 fpstate_init_fstate(fpstate);
569 static void __fpstate_reset(struct fpstate *fpstate)
581 if (fpstate->is_guest) {
582 fpstate->size = guest_default_cfg.size;
583 fpstate->xfeatures = guest_default_cfg.features;
584 fpstate->xfd = 0;
586 fpstate->size = fpu_kernel_cfg.default_size;
587 fpstate->xfeatures = fpu_kernel_cfg.default_features;
588 fpstate->xfd = init_fpstate.xfd;
591 fpstate->user_size = fpu_user_cfg.default_size;
592 fpstate->user_xfeatures = fpu_user_cfg.default_features;
597 /* Set the fpstate pointer to the default fpstate */
598 fpu->fpstate = &fpu->__fpstate;
599 __fpstate_reset(fpu->fpstate);
638 xstate = get_xsave_addr(&x86_task_fpu(dst)->fpstate->regs.xsave,
690 memcpy(&dst_fpu->fpstate->regs, &init_fpstate.regs,
704 * saved, which enables skipping both the expansion of fpstate
723 dst_fpu->fpstate->regs.xsave.header.xfeatures &= ~XFEATURE_MASK_PASID;
752 * the fpstate. NOTE: it still leaves previous contents
784 * Clear FPU registers by setting them up from the init fpstate.
821 memcpy(&fpu->fpstate->regs, &init_fpstate.regs, init_fpstate_copy_size());
848 os_xrstor_supervisor(fpu->fpstate);
851 xfd_update_state(fpu->fpstate);
950 cwd = fpu->fpstate->regs.fxsave.cwd;
951 swd = fpu->fpstate->regs.fxsave.swd;
953 cwd = (unsigned short)fpu->fpstate->regs.fsave.cwd;
954 swd = (unsigned short)fpu->fpstate->regs.fsave.swd;
968 mxcsr = fpu->fpstate->regs.fxsave.mxcsr;