Lines Matching refs:hw_res
224 struct rdt_hw_resource *hw_res = resctrl_to_arch_res(r); in get_corrected_val() local
231 hw_res->mbm_width); in get_corrected_val()
238 return chunks * hw_res->mon_scale; in get_corrected_val()
408 struct rdt_hw_resource *hw_res = resctrl_to_arch_res(r); in rdt_get_l3_mon_config() local
415 hw_res->mon_scale = boot_cpu_data.x86_cache_occ_scale / snc_nodes_per_l3_cache; in rdt_get_l3_mon_config()
417 hw_res->mbm_width = MBM_CNTR_WIDTH_BASE; in rdt_get_l3_mon_config()
420 hw_res->mbm_width += mbm_offset; in rdt_get_l3_mon_config()
459 hw_res->mbm_cntr_assign_enabled = true; in rdt_get_l3_mon_config()
510 struct rdt_hw_resource *hw_res = resctrl_to_arch_res(r); in resctrl_arch_mbm_cntr_assign_set() local
513 hw_res->mbm_cntr_assign_enabled != enable) { in resctrl_arch_mbm_cntr_assign_set()
515 hw_res->mbm_cntr_assign_enabled = enable; in resctrl_arch_mbm_cntr_assign_set()
564 struct rdt_hw_resource *hw_res = resctrl_to_arch_res(r); in resctrl_arch_mbm_cntr_assign_set_one() local
566 resctrl_abmc_set_one_amd(&hw_res->mbm_cntr_assign_enabled); in resctrl_arch_mbm_cntr_assign_set_one()