Lines Matching defs:rev

100 		__u32 rev	 : 8,
190 static u32 get_cutoff_revision(u32 rev)
192 	switch (rev >> 8) {
319 	u32 rev, dummy __always_unused;
336 	native_rdmsr(MSR_AMD64_PATCH_LEVEL, rev, dummy);
337 	if (!rev) {
339 			return rev;
341 		rev = cpuid_to_ucode_rev(bsp_cpuid_1_eax);
342 		pr_info_once("No current revision, generating the lowest one: 0x%x\n", rev);
345 	return rev;
726 	ucode_dbg("updated rev: 0x%x\n", *cur_rev);
786 	u32 rev;
798 	rev = get_patch_level();
799 	ed->old_rev = rev;
821 	if (__apply_microcode_amd(mc, &rev, desc.psize))
822 		ed->new_rev = rev;
854 	n.patch_id  = uci->cpu_sig.rev;
875 		return zn.rev > zp.rev;
924 	uci->cpu_sig.rev = get_patch_level();
937 	u32 rev, dummy __always_unused;
947 	rev = get_patch_level();
948 	if (rev < mc->hdr.patch_id) {
949 		if (__apply_microcode_amd(mc, &rev, p->size))
950 			pr_info_once("reload revision: 0x%08x\n", rev);
960 	csig->rev = get_patch_level();
967 	if (p && (p->patch_id == csig->rev))
980 	u32 rev;
990 	rev = uci->cpu_sig.rev;
996 	if (rev > mc_amd->hdr.patch_id) {
1001 	if (!__apply_microcode_amd(mc_amd, &rev, p->size)) {
1007 	rev = mc_amd->hdr.patch_id;
1011 	uci->cpu_sig.rev = rev;
1012 	c->microcode	 = rev;
1016 		boot_cpu_data.microcode = rev;